Pub Date : 1989-01-03DOI: 10.1109/HICSS.1989.47151
K. Shin, Yogesh K. Muthuswamy
The issues involved in providing hardware communication support at each mode in a distributed real-time system are studied. First, a general architecture for each node of the system is described. An algorithm for message handling by dedicated hardware called a communication processor (CP) is proposed, to maximize the number of requests handled over the various constraints. A floating CP architecture is proposed, to maximize the number of requests handled under the various constraints. A floating CP architecture is proposed to maximize the utilization of the processors at a node and provide greater fault-tolerance in the system.<>
{"title":"A floating communication processor architecture in a distributed real-time system","authors":"K. Shin, Yogesh K. Muthuswamy","doi":"10.1109/HICSS.1989.47151","DOIUrl":"https://doi.org/10.1109/HICSS.1989.47151","url":null,"abstract":"The issues involved in providing hardware communication support at each mode in a distributed real-time system are studied. First, a general architecture for each node of the system is described. An algorithm for message handling by dedicated hardware called a communication processor (CP) is proposed, to maximize the number of requests handled over the various constraints. A floating CP architecture is proposed, to maximize the number of requests handled under the various constraints. A floating CP architecture is proposed to maximize the utilization of the processors at a node and provide greater fault-tolerance in the system.<<ETX>>","PeriodicalId":300182,"journal":{"name":"[1989] Proceedings of the Twenty-Second Annual Hawaii International Conference on System Sciences. Volume 1: Architecture Track","volume":"35 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1989-01-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131638762","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1989-01-03DOI: 10.1109/HICSS.1989.47150
B. Furht
The importance of real-time computing is constantly growing. It is required in a large number of systems, including but not limited to aerospace, defense, industrial automation, nuclear engineering, and decision support. The author defines a real-time computing system as a system capable of receiving inputs from an external process, performing the required data processing, and outputting the correct response back to the process fast enough to meet process requirements. In addition, a real-time system must be able to respond to external interrupts generated by I/O devices and other systems. Therefore, a real-time system can be viewed as a three-stage pipeline: data acquisition from sensors or other input devices, data processing, and output to actuators and/or displays. A high-performance real-time system can then be characterized by three key features: superior CPU computational speed; high I/O throughput; and efficient interrupt handling capability.<>
{"title":"Real-time computing-tri-dimensional computing","authors":"B. Furht","doi":"10.1109/HICSS.1989.47150","DOIUrl":"https://doi.org/10.1109/HICSS.1989.47150","url":null,"abstract":"The importance of real-time computing is constantly growing. It is required in a large number of systems, including but not limited to aerospace, defense, industrial automation, nuclear engineering, and decision support. The author defines a real-time computing system as a system capable of receiving inputs from an external process, performing the required data processing, and outputting the correct response back to the process fast enough to meet process requirements. In addition, a real-time system must be able to respond to external interrupts generated by I/O devices and other systems. Therefore, a real-time system can be viewed as a three-stage pipeline: data acquisition from sensors or other input devices, data processing, and output to actuators and/or displays. A high-performance real-time system can then be characterized by three key features: superior CPU computational speed; high I/O throughput; and efficient interrupt handling capability.<<ETX>>","PeriodicalId":300182,"journal":{"name":"[1989] Proceedings of the Twenty-Second Annual Hawaii International Conference on System Sciences. Volume 1: Architecture Track","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1989-01-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123761690","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1989-01-03DOI: 10.1109/HICSS.1989.47174
A. Hurson, L. Miller, S. Pakzad, D. Shin
The architectural features of the ASLM database machine are explored, and the retrieval aspect of incorporating a comprehensive null value policy into the design of ASLM is examined. The join operation is used as a performance measure in the evaluation of ASLM. The extension of ASLM to a multiuser/multiprogram environment by dynamic reconfigurability of the hardware resources among a set of concurrent queries is discussed.<>
{"title":"Extended ASLM-a reconfigurable database machine","authors":"A. Hurson, L. Miller, S. Pakzad, D. Shin","doi":"10.1109/HICSS.1989.47174","DOIUrl":"https://doi.org/10.1109/HICSS.1989.47174","url":null,"abstract":"The architectural features of the ASLM database machine are explored, and the retrieval aspect of incorporating a comprehensive null value policy into the design of ASLM is examined. The join operation is used as a performance measure in the evaluation of ASLM. The extension of ASLM to a multiuser/multiprogram environment by dynamic reconfigurability of the hardware resources among a set of concurrent queries is discussed.<<ETX>>","PeriodicalId":300182,"journal":{"name":"[1989] Proceedings of the Twenty-Second Annual Hawaii International Conference on System Sciences. Volume 1: Architecture Track","volume":"33 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1989-01-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114997852","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1989-01-03DOI: 10.1109/HICSS.1989.47185
A. Lohmann, F. Sauer, N. Streibl, R. Volkel
Thick holograms for the infrared based on dichromated gelatin have been studied. Since these holograms are recorded in the blue wavelength region, detuning techniques are necessary for reply with diode lasers. Beam-splitting and beam-combination devices have also been investigated. Beam splitters with low splitting ratios are needed for the implementation of symbolic substitution. Beam splitters with high splitting ratios are needed as array generators for power supply of two-dimensional arrays of optical logic gates.<>
{"title":"Interconnection and systems components for digital optics","authors":"A. Lohmann, F. Sauer, N. Streibl, R. Volkel","doi":"10.1109/HICSS.1989.47185","DOIUrl":"https://doi.org/10.1109/HICSS.1989.47185","url":null,"abstract":"Thick holograms for the infrared based on dichromated gelatin have been studied. Since these holograms are recorded in the blue wavelength region, detuning techniques are necessary for reply with diode lasers. Beam-splitting and beam-combination devices have also been investigated. Beam splitters with low splitting ratios are needed for the implementation of symbolic substitution. Beam splitters with high splitting ratios are needed as array generators for power supply of two-dimensional arrays of optical logic gates.<<ETX>>","PeriodicalId":300182,"journal":{"name":"[1989] Proceedings of the Twenty-Second Annual Hawaii International Conference on System Sciences. Volume 1: Architecture Track","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1989-01-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125268556","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1989-01-03DOI: 10.1109/HICSS.1989.47160
B. R. Rau, David W. L. Yen, Wei Yen, R. A. Towle
The Cydra 5 Departmental Supercomputer is a comparatively moderately priced supercomputer intended for use by small work groups or departments of scientists and engineers. It is priced at about the same level as a high-end superminicomputer but is able to achieve about one-fourth to two-thirds the performance of a supercomputer. The discussion covers the Cydra 5 system architecture, the directed data-flow architecture on which it is based, the selection of the numeric processor, and the main memory system.<>
{"title":"The Cydra 5 Departmental Supercomputer: design philosophies, decisions and trade-offs","authors":"B. R. Rau, David W. L. Yen, Wei Yen, R. A. Towle","doi":"10.1109/HICSS.1989.47160","DOIUrl":"https://doi.org/10.1109/HICSS.1989.47160","url":null,"abstract":"The Cydra 5 Departmental Supercomputer is a comparatively moderately priced supercomputer intended for use by small work groups or departments of scientists and engineers. It is priced at about the same level as a high-end superminicomputer but is able to achieve about one-fourth to two-thirds the performance of a supercomputer. The discussion covers the Cydra 5 system architecture, the directed data-flow architecture on which it is based, the selection of the numeric processor, and the main memory system.<<ETX>>","PeriodicalId":300182,"journal":{"name":"[1989] Proceedings of the Twenty-Second Annual Hawaii International Conference on System Sciences. Volume 1: Architecture Track","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1989-01-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128835874","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1989-01-03DOI: 10.1109/HICSS.1989.47187
N. Gallagher
Diffractive optical elements that can be used to manipulate the amplitude, phase, and polarization of a wavefront in very complex ways are treated. Optical components whose feature size is larger than one wavelength, about equal to one wavelength, and smaller than one wavelength are considered. The analytical development that describes these elements is outlined.<>
{"title":"Diffractive optical elements","authors":"N. Gallagher","doi":"10.1109/HICSS.1989.47187","DOIUrl":"https://doi.org/10.1109/HICSS.1989.47187","url":null,"abstract":"Diffractive optical elements that can be used to manipulate the amplitude, phase, and polarization of a wavefront in very complex ways are treated. Optical components whose feature size is larger than one wavelength, about equal to one wavelength, and smaller than one wavelength are considered. The analytical development that describes these elements is outlined.<<ETX>>","PeriodicalId":300182,"journal":{"name":"[1989] Proceedings of the Twenty-Second Annual Hawaii International Conference on System Sciences. Volume 1: Architecture Track","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1989-01-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127879332","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1989-01-03DOI: 10.1109/HICSS.1989.47138
Y. Cheng, R. Fujii
A method for two-dimensional IC symbolic layout compaction is presented. Distances between the layout elements and the selected origin are minimized to achieve a compacted layout. Compared to one-dimensional compaction, this algorithm gets better results and its time complexity is of the same order.<>
{"title":"A new method for two dimensional symbolic compaction of IC layout","authors":"Y. Cheng, R. Fujii","doi":"10.1109/HICSS.1989.47138","DOIUrl":"https://doi.org/10.1109/HICSS.1989.47138","url":null,"abstract":"A method for two-dimensional IC symbolic layout compaction is presented. Distances between the layout elements and the selected origin are minimized to achieve a compacted layout. Compared to one-dimensional compaction, this algorithm gets better results and its time complexity is of the same order.<<ETX>>","PeriodicalId":300182,"journal":{"name":"[1989] Proceedings of the Twenty-Second Annual Hawaii International Conference on System Sciences. Volume 1: Architecture Track","volume":"283 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1989-01-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122962277","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1989-01-03DOI: 10.1109/HICSS.1989.47161
T. Jones
The CONVEX C220 and C240 supercomputers, a family of 64-bit multiprocessors tightly coupled through a shared main memory, are discussed. The structure of the C2 family and of the C1 family that preceded it is described. The product definition process and the technology selection are examined. The way in which the project was organized and staffed, the tools used, and some of the significant crisis points during the program execution are discussed.<>
{"title":"Engineering design of the CONVEX C2","authors":"T. Jones","doi":"10.1109/HICSS.1989.47161","DOIUrl":"https://doi.org/10.1109/HICSS.1989.47161","url":null,"abstract":"The CONVEX C220 and C240 supercomputers, a family of 64-bit multiprocessors tightly coupled through a shared main memory, are discussed. The structure of the C2 family and of the C1 family that preceded it is described. The product definition process and the technology selection are examined. The way in which the project was organized and staffed, the tools used, and some of the significant crisis points during the program execution are discussed.<<ETX>>","PeriodicalId":300182,"journal":{"name":"[1989] Proceedings of the Twenty-Second Annual Hawaii International Conference on System Sciences. Volume 1: Architecture Track","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1989-01-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125962658","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1989-01-03DOI: 10.1109/HICSS.1989.47186
N. Farhat, Z. Shae
The authors report on what they believe to be the first demonstration of a fully operational optical learning machine. Learning in this machine takes place stochastically in a self-organizing trilayered optoelectronic neural net with plastic connectivity weights that are formed in a programmable nonvolatile spatial light modulator. The net learns by adapting its connectivity weights in accordance with environmental inputs. Learning is driven by error signals derived from state-vector correlation matrices accumulated at the end of fast annealing bursts that are induced by controlled optical injection of noise into the network. Operation of the machine is made possible by two developments: fast annealing by optically induced tremors in the energy landscape of the net, and stochastic learning with binary weights. Details of these developments together with the principal, architecture, structure, and performance evaluation of the machine are given.<>
{"title":"An optical learning machine","authors":"N. Farhat, Z. Shae","doi":"10.1109/HICSS.1989.47186","DOIUrl":"https://doi.org/10.1109/HICSS.1989.47186","url":null,"abstract":"The authors report on what they believe to be the first demonstration of a fully operational optical learning machine. Learning in this machine takes place stochastically in a self-organizing trilayered optoelectronic neural net with plastic connectivity weights that are formed in a programmable nonvolatile spatial light modulator. The net learns by adapting its connectivity weights in accordance with environmental inputs. Learning is driven by error signals derived from state-vector correlation matrices accumulated at the end of fast annealing bursts that are induced by controlled optical injection of noise into the network. Operation of the machine is made possible by two developments: fast annealing by optically induced tremors in the energy landscape of the net, and stochastic learning with binary weights. Details of these developments together with the principal, architecture, structure, and performance evaluation of the machine are given.<<ETX>>","PeriodicalId":300182,"journal":{"name":"[1989] Proceedings of the Twenty-Second Annual Hawaii International Conference on System Sciences. Volume 1: Architecture Track","volume":"63 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1989-01-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121086696","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1989-01-03DOI: 10.1109/HICSS.1989.47136
R. Ashany
The stringent requirements imposed by socioeconomic forces on the computer industry and on the community of scientists and engineers is examined. The ways in which these requirements have been met, through the use of technologies, design tools, equipment, process and facility control, quality assurance and testing, and sophisticated production methodologies are discussed.<>
{"title":"Emerging design style: how does it impact the way we design?","authors":"R. Ashany","doi":"10.1109/HICSS.1989.47136","DOIUrl":"https://doi.org/10.1109/HICSS.1989.47136","url":null,"abstract":"The stringent requirements imposed by socioeconomic forces on the computer industry and on the community of scientists and engineers is examined. The ways in which these requirements have been met, through the use of technologies, design tools, equipment, process and facility control, quality assurance and testing, and sophisticated production methodologies are discussed.<<ETX>>","PeriodicalId":300182,"journal":{"name":"[1989] Proceedings of the Twenty-Second Annual Hawaii International Conference on System Sciences. Volume 1: Architecture Track","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1989-01-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127249014","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
京公网安备 11010802042870号
京ICP备2023020795号-1
扫码关注我们
求助内容：
应助结果提醒方式：