Pub Date : 2010-05-20DOI: 10.1109/EIT.2010.5612179
Q. Alsafasfeh, I. Abdel-Qader, A. Harb
An important attribute of an electrical power system is the continuity of service with a high level of reliability. This motivated many researchers to investigate power systems in an effort to improve reliability by focusing on fault detection and classification. In this work, a new electrical protective relaying framework to detect and classify any fault type in an electrical power system is presented. This work will use readings of the phase current only during the first (1/4)th of a cycle in an integrated method that combines symmetrical components technique with the principal component analysis (PCA) to declare, identify, and classify a fault. Furthermore, our approach also distinguishes a real fault from a transient one and can be used in either a transmission or a distribution system. Implementation results using PSCAD are also presented.
{"title":"Symmetrical pattern and PCA based framework for fault detection and classification in power systems","authors":"Q. Alsafasfeh, I. Abdel-Qader, A. Harb","doi":"10.1109/EIT.2010.5612179","DOIUrl":"https://doi.org/10.1109/EIT.2010.5612179","url":null,"abstract":"An important attribute of an electrical power system is the continuity of service with a high level of reliability. This motivated many researchers to investigate power systems in an effort to improve reliability by focusing on fault detection and classification. In this work, a new electrical protective relaying framework to detect and classify any fault type in an electrical power system is presented. This work will use readings of the phase current only during the first (1/4)th of a cycle in an integrated method that combines symmetrical components technique with the principal component analysis (PCA) to declare, identify, and classify a fault. Furthermore, our approach also distinguishes a real fault from a transient one and can be used in either a transmission or a distribution system. Implementation results using PSCAD are also presented.","PeriodicalId":305049,"journal":{"name":"2010 IEEE International Conference on Electro/Information Technology","volume":"8 49 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-05-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114826609","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-05-20DOI: 10.1109/EIT.2010.5612171
K. Beemanpally, Karunakar R. Pottim, S. Kuo
This paper presents a new active noise control system for infant incubators in neonatal intensive care units. To overcome the problem of complexity of noise sources and their locations, a multi-channel hybrid ANC system using the filtered-x least mean square (FXLMS) algorithm was developed. This hybrid ANC system integrates both the feedforward and the feedback ANC systems to cancel noises from both inside and outside the incubator. Computer simulations and real-time experiments were performed to compare the proposed hybrid ANC algorithm with the existing feedforward ANC algorithms under various complex noise environments.
{"title":"Multi-channel hybrid active noise control system for infant incubators","authors":"K. Beemanpally, Karunakar R. Pottim, S. Kuo","doi":"10.1109/EIT.2010.5612171","DOIUrl":"https://doi.org/10.1109/EIT.2010.5612171","url":null,"abstract":"This paper presents a new active noise control system for infant incubators in neonatal intensive care units. To overcome the problem of complexity of noise sources and their locations, a multi-channel hybrid ANC system using the filtered-x least mean square (FXLMS) algorithm was developed. This hybrid ANC system integrates both the feedforward and the feedback ANC systems to cancel noises from both inside and outside the incubator. Computer simulations and real-time experiments were performed to compare the proposed hybrid ANC algorithm with the existing feedforward ANC algorithms under various complex noise environments.","PeriodicalId":305049,"journal":{"name":"2010 IEEE International Conference on Electro/Information Technology","volume":"282 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-05-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125865142","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-05-20DOI: 10.1109/EIT.2010.5612127
S. Subha
This paper proposes a global register allocation algorithm that makes decisions on register allocation based on the cost of spilling variables in linear scan allocation. The algorithm assumes registers are initially allocated based on linear scan algorithm. When there is a need to spill variables, either the allocated or the new variable is spilled based on the cost incurred in allocation. The cost is calculated as a function of number of definitions and uses of a variable for the rest of its live range. The variable with minimum number of uses that gives optimal cost is replaced. A mathematical model for determining the cost is proposed which decides register allocation. Given the live ranges of the variables the time complexity of the algorithm is derived. Simulations on an arbitrary program showed an improvement when compared to linear scan algorithm.
{"title":"A register allocation algorithm","authors":"S. Subha","doi":"10.1109/EIT.2010.5612127","DOIUrl":"https://doi.org/10.1109/EIT.2010.5612127","url":null,"abstract":"This paper proposes a global register allocation algorithm that makes decisions on register allocation based on the cost of spilling variables in linear scan allocation. The algorithm assumes registers are initially allocated based on linear scan algorithm. When there is a need to spill variables, either the allocated or the new variable is spilled based on the cost incurred in allocation. The cost is calculated as a function of number of definitions and uses of a variable for the rest of its live range. The variable with minimum number of uses that gives optimal cost is replaced. A mathematical model for determining the cost is proposed which decides register allocation. Given the live ranges of the variables the time complexity of the algorithm is derived. Simulations on an arbitrary program showed an improvement when compared to linear scan algorithm.","PeriodicalId":305049,"journal":{"name":"2010 IEEE International Conference on Electro/Information Technology","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-05-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125137903","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-05-20DOI: 10.1109/EIT.2010.5612177
Vijay Anand, J. Saniie, E. Oruklu
A hardware system entrusted with security is referred to as the trusted platform module (TPM) which is available for various processor architectures. The two important processor architectures which account for most of general computing systems are based on ARM and x86 processors. The ARM processors have a TPM referred to as TrustZone architecture. The x86 systems' security directives are dictated by the Trusted Computing Group (TCG) which defines the TPM coprocessor features. In this paper, we compare these two approaches of TPM architectures. An effective TPM needs to be adaptive as threats evolve. Threats can arise from firmware bugs in the TPM or decay in the complexity of ciphering algorithms. Therefore, we propose adaptive TPM architecture to counter evolving threats using an FPGA block to alter and patch firmware and change ciphering systems. This along with the one to one association of an explicit security policy with threat is shown to be a powerful counter towards evolving threats.
{"title":"Threat-adaptive architectures for trusted platform modules in secure computing systems","authors":"Vijay Anand, J. Saniie, E. Oruklu","doi":"10.1109/EIT.2010.5612177","DOIUrl":"https://doi.org/10.1109/EIT.2010.5612177","url":null,"abstract":"A hardware system entrusted with security is referred to as the trusted platform module (TPM) which is available for various processor architectures. The two important processor architectures which account for most of general computing systems are based on ARM and x86 processors. The ARM processors have a TPM referred to as TrustZone architecture. The x86 systems' security directives are dictated by the Trusted Computing Group (TCG) which defines the TPM coprocessor features. In this paper, we compare these two approaches of TPM architectures. An effective TPM needs to be adaptive as threats evolve. Threats can arise from firmware bugs in the TPM or decay in the complexity of ciphering algorithms. Therefore, we propose adaptive TPM architecture to counter evolving threats using an FPGA block to alter and patch firmware and change ciphering systems. This along with the one to one association of an explicit security policy with threat is shown to be a powerful counter towards evolving threats.","PeriodicalId":305049,"journal":{"name":"2010 IEEE International Conference on Electro/Information Technology","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-05-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123500157","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-05-20DOI: 10.1109/EIT.2010.5612088
Wen-Chen Hu, Yanjun Zuo, N. Kaabouch, Lei Chen
Since the launch of iPhones in 2007, smartphones become very popular these days. Because of their small sizes and high mobility, smartphones are easily lost or stolen. When people lost their smartphones, they are worried the private data stored in the phones may be revealed to strangers. This research proposes a novel approach for mobile data protection. Mobile usage data is first collected and usage patterns are then discovered and saved. An optimization Hopfield neural network is proposed to match the usage data with the stored usage patterns. When an unusual usage pattern such as an unlawful user trying to access the mobile data is detected, the device will automatically lock itself down until a further action is taken. Experimental results show this method is effective and convenient for mobile data protection.
{"title":"An optimization neural network for smartphone data protection","authors":"Wen-Chen Hu, Yanjun Zuo, N. Kaabouch, Lei Chen","doi":"10.1109/EIT.2010.5612088","DOIUrl":"https://doi.org/10.1109/EIT.2010.5612088","url":null,"abstract":"Since the launch of iPhones in 2007, smartphones become very popular these days. Because of their small sizes and high mobility, smartphones are easily lost or stolen. When people lost their smartphones, they are worried the private data stored in the phones may be revealed to strangers. This research proposes a novel approach for mobile data protection. Mobile usage data is first collected and usage patterns are then discovered and saved. An optimization Hopfield neural network is proposed to match the usage data with the stored usage patterns. When an unusual usage pattern such as an unlawful user trying to access the mobile data is detected, the device will automatically lock itself down until a further action is taken. Experimental results show this method is effective and convenient for mobile data protection.","PeriodicalId":305049,"journal":{"name":"2010 IEEE International Conference on Electro/Information Technology","volume":"29 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-05-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123566147","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-05-20DOI: 10.1109/EIT.2010.5612173
C. Desmouliers, S. Aslan, E. Oruklu, J. Saniie, F. M. Vallina
The objective of this work is to design and implement an Image and Video Processing Platform (IVPP) on FGPAs using PICO based HLS. This hardware/software codesign platform has been implemented on a Xilinx Virtex-5 FPGA. The video interface blocks are done in RTL and the initialization phase is done using a MicroBlaze processor allowing the support of multiple video resolutions. This paper discusses the architectural building blocks showing the flexibility of the proposed platform. This flexibility is achieved by using a new design flow based on PICO. IVPP allows custom-processing blocks to be plugged-in to the platform architecture without modifying the front-end (capturing video data) and back-end (displaying processed output). This paper presents several examples of video processing applications, such as a Canny edge detector, motion detector and object tracking that have been realized using IVPP for real-time video processing.
{"title":"HW/SW co-design platform for image and video processing applications on Virtex-5 FPGA using PICO","authors":"C. Desmouliers, S. Aslan, E. Oruklu, J. Saniie, F. M. Vallina","doi":"10.1109/EIT.2010.5612173","DOIUrl":"https://doi.org/10.1109/EIT.2010.5612173","url":null,"abstract":"The objective of this work is to design and implement an Image and Video Processing Platform (IVPP) on FGPAs using PICO based HLS. This hardware/software codesign platform has been implemented on a Xilinx Virtex-5 FPGA. The video interface blocks are done in RTL and the initialization phase is done using a MicroBlaze processor allowing the support of multiple video resolutions. This paper discusses the architectural building blocks showing the flexibility of the proposed platform. This flexibility is achieved by using a new design flow based on PICO. IVPP allows custom-processing blocks to be plugged-in to the platform architecture without modifying the front-end (capturing video data) and back-end (displaying processed output). This paper presents several examples of video processing applications, such as a Canny edge detector, motion detector and object tracking that have been realized using IVPP for real-time video processing.","PeriodicalId":305049,"journal":{"name":"2010 IEEE International Conference on Electro/Information Technology","volume":"217 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-05-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130289971","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-05-20DOI: 10.1109/EIT.2010.5612103
Haiqing Nan, Kyung Ki Kim, K. Choi
This paper proposes a new design of carbon nanotube FETs (CNFETs) based SRAM cell operating in subthreshold region. By using optimum back-gate biasing scheme for each transistor, the proposed SRAM cell achieves the best overall performance considering noise margin, delay and power. Compared with traditional subthreshold CNFET SRAM cell, the proposed SRAM cell increases static voltage noise margin (SVNM) 36%, increases static current noise margin (SINM) 2.5X, and reduces delay 61% with power consumption increasing only 1% for read operation. For write operation, the proposed SRAM cell increases write noise margin (WNM) 2.5X and reduces power consumption and delay 17% and 56% respectively compared with traditional subthreshold CNFET SRAM cell. In terms of total number of nanotubes (area) of CNFET SRAM cell, the proposed subthreshold CNFET SRAM cell can reduce at least half of total number of nanotubes without compromising noise margin, power and delay. New CNFET SRAM cell structure is proposed to dynamically bias each transistor at different operation modes.
{"title":"Novel CNFET SRAM cell design operating in sub-threshold region using back-gate biasing","authors":"Haiqing Nan, Kyung Ki Kim, K. Choi","doi":"10.1109/EIT.2010.5612103","DOIUrl":"https://doi.org/10.1109/EIT.2010.5612103","url":null,"abstract":"This paper proposes a new design of carbon nanotube FETs (CNFETs) based SRAM cell operating in subthreshold region. By using optimum back-gate biasing scheme for each transistor, the proposed SRAM cell achieves the best overall performance considering noise margin, delay and power. Compared with traditional subthreshold CNFET SRAM cell, the proposed SRAM cell increases static voltage noise margin (SVNM) 36%, increases static current noise margin (SINM) 2.5X, and reduces delay 61% with power consumption increasing only 1% for read operation. For write operation, the proposed SRAM cell increases write noise margin (WNM) 2.5X and reduces power consumption and delay 17% and 56% respectively compared with traditional subthreshold CNFET SRAM cell. In terms of total number of nanotubes (area) of CNFET SRAM cell, the proposed subthreshold CNFET SRAM cell can reduce at least half of total number of nanotubes without compromising noise margin, power and delay. New CNFET SRAM cell structure is proposed to dynamically bias each transistor at different operation modes.","PeriodicalId":305049,"journal":{"name":"2010 IEEE International Conference on Electro/Information Technology","volume":"29 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-05-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133925226","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-05-20DOI: 10.1109/EIT.2010.5612108
B. Nasri, J. Rydh, M. T. Savadkouhi, M. Andalibizadeh
In routing, which is an important step in designing an IC, related nets should be connected together in the best way according to the design rules. The importance of routing is due to its effect on delay and noise specification of the design. An overview on routing is presented in this paper, which overall flow of the information are base on reference [3] and by comparing and competing in other research papers. In this paper a general routing flow is described by common algorithms used for routing, router and fabrication considerations, and also angled routing. It's shown routing does not need any complicated mathematics but based on a few algorithms that are common in different subjects which are discussed and explained. On the other hand the precise selection of heuristic estimations acts as a crucial factor in success of routing.
{"title":"Routing's algorithms and considerations","authors":"B. Nasri, J. Rydh, M. T. Savadkouhi, M. Andalibizadeh","doi":"10.1109/EIT.2010.5612108","DOIUrl":"https://doi.org/10.1109/EIT.2010.5612108","url":null,"abstract":"In routing, which is an important step in designing an IC, related nets should be connected together in the best way according to the design rules. The importance of routing is due to its effect on delay and noise specification of the design. An overview on routing is presented in this paper, which overall flow of the information are base on reference [3] and by comparing and competing in other research papers. In this paper a general routing flow is described by common algorithms used for routing, router and fabrication considerations, and also angled routing. It's shown routing does not need any complicated mathematics but based on a few algorithms that are common in different subjects which are discussed and explained. On the other hand the precise selection of heuristic estimations acts as a crucial factor in success of routing.","PeriodicalId":305049,"journal":{"name":"2010 IEEE International Conference on Electro/Information Technology","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-05-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130025587","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-05-20DOI: 10.1109/EIT.2010.5612091
Riyadh Kenaya, R. Chabaan
Modern electric cars require electrical power steering systems (EPAS). Many control algorithms where employed in this field. Some of these controllers exhibit robustness and stability problems for certain road conditions. Neural networks are known for their ability to imitate systems and stay stable if operation conditions change. In this paper we use neural controllers to imitate the Hoo controller we have already designed to control the EAPS system. We collect the Hoo performance signals and use them as training data for the suggested neural controllers. Fuzzy Adaptive Resonance Theory (fuzzy ARTMAP) and back propagation neural controllers are used in this paper to do the control act. The performance of each controller is recorded for comparison purposes.
{"title":"Neural controllers for electrical power steering systems","authors":"Riyadh Kenaya, R. Chabaan","doi":"10.1109/EIT.2010.5612091","DOIUrl":"https://doi.org/10.1109/EIT.2010.5612091","url":null,"abstract":"Modern electric cars require electrical power steering systems (EPAS). Many control algorithms where employed in this field. Some of these controllers exhibit robustness and stability problems for certain road conditions. Neural networks are known for their ability to imitate systems and stay stable if operation conditions change. In this paper we use neural controllers to imitate the Hoo controller we have already designed to control the EAPS system. We collect the Hoo performance signals and use them as training data for the suggested neural controllers. Fuzzy Adaptive Resonance Theory (fuzzy ARTMAP) and back propagation neural controllers are used in this paper to do the control act. The performance of each controller is recorded for comparison purposes.","PeriodicalId":305049,"journal":{"name":"2010 IEEE International Conference on Electro/Information Technology","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-05-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130271278","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-05-20DOI: 10.1109/EIT.2010.5612187
A. Khaligh
As world continues to rely more and more upon vehicular transportation, the looming problems of fuel supply and air pollution become more imminent. The internal combustion engine (ICE) has long been the mechanism that propels our vehicles, and gasoline has been its major source of energy. This fuel supply is dwindling and researchers are looking for new sources of energy. Demands for higher fuel economy, performance, reliability, and reduced emissions push the automotive industry to seek advanced technologies such as electrification of ancillaries and engine augmentations. An immediate solution to this problem is essential, and the most promising answer lies in hybrid electric and plug-in hybrid electric vehicle (HEV and PHEV) technologies. The proposed long-term sustainable solution includes (1) integrating the transportation industry with the electric power industry, (2) using electricity as the carrier, and (3) generating electricity from renewable energy sources. In this presentation, different HEV and PHEV configurations will be presented with a focus on engineering fundamentals as well as state-of-the-art research and development in the components and system integration. In addition, it is focused on drive train configurations and presents a review of conversion strategies to hybridize different vehicles.
{"title":"Advancements towards sustainable transportation systems: 1.5 PDH's","authors":"A. Khaligh","doi":"10.1109/EIT.2010.5612187","DOIUrl":"https://doi.org/10.1109/EIT.2010.5612187","url":null,"abstract":"As world continues to rely more and more upon vehicular transportation, the looming problems of fuel supply and air pollution become more imminent. The internal combustion engine (ICE) has long been the mechanism that propels our vehicles, and gasoline has been its major source of energy. This fuel supply is dwindling and researchers are looking for new sources of energy. Demands for higher fuel economy, performance, reliability, and reduced emissions push the automotive industry to seek advanced technologies such as electrification of ancillaries and engine augmentations. An immediate solution to this problem is essential, and the most promising answer lies in hybrid electric and plug-in hybrid electric vehicle (HEV and PHEV) technologies. The proposed long-term sustainable solution includes (1) integrating the transportation industry with the electric power industry, (2) using electricity as the carrier, and (3) generating electricity from renewable energy sources. In this presentation, different HEV and PHEV configurations will be presented with a focus on engineering fundamentals as well as state-of-the-art research and development in the components and system integration. In addition, it is focused on drive train configurations and presents a review of conversion strategies to hybridize different vehicles.","PeriodicalId":305049,"journal":{"name":"2010 IEEE International Conference on Electro/Information Technology","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-05-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131362079","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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