Pub Date : 2015-05-26DOI: 10.1109/APEMC.2015.7175389
X. Gao, D. Su, Yujun Li
Electric Vehicle (EV) is driven by electromotor, whose power comes from vehicle power battery. The advantage of the EV is the mechanical simplicity of the drivetrain, but the electromagnetic interference (EMI) is a difficult problem to solve. This paper first describes the electromagnetic interference (EMI) phenomenon generated by one kind of DC/DC converter, Then analyses the reason of the EMI, and finally puts forward the design optimization direction of EMC from the vehicle.
{"title":"Study on electromagnetic interference of DC/DC converter used in the EV","authors":"X. Gao, D. Su, Yujun Li","doi":"10.1109/APEMC.2015.7175389","DOIUrl":"https://doi.org/10.1109/APEMC.2015.7175389","url":null,"abstract":"Electric Vehicle (EV) is driven by electromotor, whose power comes from vehicle power battery. The advantage of the EV is the mechanical simplicity of the drivetrain, but the electromagnetic interference (EMI) is a difficult problem to solve. This paper first describes the electromagnetic interference (EMI) phenomenon generated by one kind of DC/DC converter, Then analyses the reason of the EMI, and finally puts forward the design optimization direction of EMC from the vehicle.","PeriodicalId":325138,"journal":{"name":"2015 Asia-Pacific Symposium on Electromagnetic Compatibility (APEMC)","volume":"229 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-05-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116254085","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-05-26DOI: 10.1109/APEMC.2015.7175374
S. Cruciani, M. Feliziani, F. Maradei
The paper provides an investigation on the shielding effectiveness (SE) of graphene planar sheets and enclosures by a numerical tool. The finite element method-impedance network boundary conditions (FEM-INBC) method has been recently used to model planar graphene layers. Here, this method is applied to model complex geometries as two-dimensional enclosures with shaped graphene sheet walls.
{"title":"Prediction of shielding effectiveness in graphene enclosures by FEM-INBC method","authors":"S. Cruciani, M. Feliziani, F. Maradei","doi":"10.1109/APEMC.2015.7175374","DOIUrl":"https://doi.org/10.1109/APEMC.2015.7175374","url":null,"abstract":"The paper provides an investigation on the shielding effectiveness (SE) of graphene planar sheets and enclosures by a numerical tool. The finite element method-impedance network boundary conditions (FEM-INBC) method has been recently used to model planar graphene layers. Here, this method is applied to model complex geometries as two-dimensional enclosures with shaped graphene sheet walls.","PeriodicalId":325138,"journal":{"name":"2015 Asia-Pacific Symposium on Electromagnetic Compatibility (APEMC)","volume":"26 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-05-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123626683","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-05-26DOI: 10.1109/APEMC.2015.7175313
Bichen Chen, X. Ye, Bill Samaras, J. Fan
A novel de-embedding method on transmission line device under testing (DUT) is introduced in this paper. The technique can be used as an alternative to classic calibration approaches, such as SOLT, TRL, LRM, or LRRM whenever the de-embedded structure is a transmission line. The method only requires two measurement patterns: a true through as test fixture and a total pattern with targeting DUT embedded in. With a quasi-symmetry requirement in test fixtures, it is also a good substitute for newly released two-pattern de-embedding methodologies which have rigid symmetric demanding in text fixtures design and manufactures.
{"title":"A novel de-embedding method suitable for transmission-line measurement","authors":"Bichen Chen, X. Ye, Bill Samaras, J. Fan","doi":"10.1109/APEMC.2015.7175313","DOIUrl":"https://doi.org/10.1109/APEMC.2015.7175313","url":null,"abstract":"A novel de-embedding method on transmission line device under testing (DUT) is introduced in this paper. The technique can be used as an alternative to classic calibration approaches, such as SOLT, TRL, LRM, or LRRM whenever the de-embedded structure is a transmission line. The method only requires two measurement patterns: a true through as test fixture and a total pattern with targeting DUT embedded in. With a quasi-symmetry requirement in test fixtures, it is also a good substitute for newly released two-pattern de-embedding methodologies which have rigid symmetric demanding in text fixtures design and manufactures.","PeriodicalId":325138,"journal":{"name":"2015 Asia-Pacific Symposium on Electromagnetic Compatibility (APEMC)","volume":"191 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-05-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123761617","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-05-26DOI: 10.1109/APEMC.2015.7175407
Kangrong Li, K. See
To demonstrate the impact of the line impedance stabilization network (LISN) on conducted electromagnetic interference (EMI) measurement, an in-circuit impedance extraction method based on inductive coupling approach is developed to extract the common mode (CM) and the differential mode (DM) noise impedances of AC mains, LISN, and switched-mode power supply (SMPS) under operating condition. By treating two inductive coupling probes and the device-under-test (DUT) for impedance extraction as three cascaded two-port ABCD networks, the CM and DM noise impedances can be extracted with ease. The extracted CM/DM noise impedance of AC mains is compared with the extracted SMPS and LISN CM/DM noise impedances, respectively. By analyzing the impedance comparisons, the impact of LISN on conducted EMI measurement for EMI filter design under real operating condition is evaluated. Finally, the evaluation is validated with the conducted EMI currents measured with and without LISN.
{"title":"Evaluation of conducted EMI measurement without LISN using two-port ABCD network approach for EMI filter design under real operating condition","authors":"Kangrong Li, K. See","doi":"10.1109/APEMC.2015.7175407","DOIUrl":"https://doi.org/10.1109/APEMC.2015.7175407","url":null,"abstract":"To demonstrate the impact of the line impedance stabilization network (LISN) on conducted electromagnetic interference (EMI) measurement, an in-circuit impedance extraction method based on inductive coupling approach is developed to extract the common mode (CM) and the differential mode (DM) noise impedances of AC mains, LISN, and switched-mode power supply (SMPS) under operating condition. By treating two inductive coupling probes and the device-under-test (DUT) for impedance extraction as three cascaded two-port ABCD networks, the CM and DM noise impedances can be extracted with ease. The extracted CM/DM noise impedance of AC mains is compared with the extracted SMPS and LISN CM/DM noise impedances, respectively. By analyzing the impedance comparisons, the impact of LISN on conducted EMI measurement for EMI filter design under real operating condition is evaluated. Finally, the evaluation is validated with the conducted EMI currents measured with and without LISN.","PeriodicalId":325138,"journal":{"name":"2015 Asia-Pacific Symposium on Electromagnetic Compatibility (APEMC)","volume":"602 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-05-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131098242","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-05-26DOI: 10.1109/APEMC.2015.7175292
F. Lafon, A. Ramanujan, P. Fernandez-Lopez
In order to perform EMC design activities, engineers need to have some tools for preliminary risk analysis to determine filters needs and/or architecture orientation choices. Huge variations in term of requirements between different carmakers can be observed (40 dB difference for example for a simple conducted emission test can be observed between OEMs). The product nature that we develop can be also very different (from small cameras to DC/DC converter for Electric Vehicle applications). As a consequence we decided to develop simulation capabilities based on Pspice, instead of using generic rules or simple return on experiences to design our products. This paper provides a synthesis of these capabilities, for emission, immunity and ESD testing, focusing on the latest modeling techniques developed for these different aspects.
{"title":"Pspice libraries development for EMC analysis","authors":"F. Lafon, A. Ramanujan, P. Fernandez-Lopez","doi":"10.1109/APEMC.2015.7175292","DOIUrl":"https://doi.org/10.1109/APEMC.2015.7175292","url":null,"abstract":"In order to perform EMC design activities, engineers need to have some tools for preliminary risk analysis to determine filters needs and/or architecture orientation choices. Huge variations in term of requirements between different carmakers can be observed (40 dB difference for example for a simple conducted emission test can be observed between OEMs). The product nature that we develop can be also very different (from small cameras to DC/DC converter for Electric Vehicle applications). As a consequence we decided to develop simulation capabilities based on Pspice, instead of using generic rules or simple return on experiences to design our products. This paper provides a synthesis of these capabilities, for emission, immunity and ESD testing, focusing on the latest modeling techniques developed for these different aspects.","PeriodicalId":325138,"journal":{"name":"2015 Asia-Pacific Symposium on Electromagnetic Compatibility (APEMC)","volume":"22 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-05-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131224708","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-05-26DOI: 10.1109/APEMC.2015.7175349
S. Sekioka
This paper discusses flashover on a medium voltage line caused by nearby lightning. Simulations are carried out using analytical formulas for the lightning-induced voltage and the ground potential rise as a fundamental study. A flashover is determined using an integration method, which is a flashover model and can consider an influence of voltage waveform on the flashover. From the simulation results, the lightning overvoltages and the flashover on a medium voltage line are affected by the ground potential rise as the soil resistivity becomes higher.
{"title":"Flashover analysis in distribution system affected by lightning-induced voltage and ground potential rise","authors":"S. Sekioka","doi":"10.1109/APEMC.2015.7175349","DOIUrl":"https://doi.org/10.1109/APEMC.2015.7175349","url":null,"abstract":"This paper discusses flashover on a medium voltage line caused by nearby lightning. Simulations are carried out using analytical formulas for the lightning-induced voltage and the ground potential rise as a fundamental study. A flashover is determined using an integration method, which is a flashover model and can consider an influence of voltage waveform on the flashover. From the simulation results, the lightning overvoltages and the flashover on a medium voltage line are affected by the ground potential rise as the soil resistivity becomes higher.","PeriodicalId":325138,"journal":{"name":"2015 Asia-Pacific Symposium on Electromagnetic Compatibility (APEMC)","volume":"3 5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-05-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125994865","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-05-26DOI: 10.1109/APEMC.2015.7175281
Alexandre Boyer, B. Vrignon, M. Cavarroc, J. Shepherd
Near-field injection is a promising method in order to induce local faults in integrated circuits. This paper aims at proposing a model of the coupling between the injection probe and the circuit under test. This study relies on measurements performed on a test chip by on-chip voltage sensors.
{"title":"Near-field injection at die level","authors":"Alexandre Boyer, B. Vrignon, M. Cavarroc, J. Shepherd","doi":"10.1109/APEMC.2015.7175281","DOIUrl":"https://doi.org/10.1109/APEMC.2015.7175281","url":null,"abstract":"Near-field injection is a promising method in order to induce local faults in integrated circuits. This paper aims at proposing a model of the coupling between the injection probe and the circuit under test. This study relies on measurements performed on a test chip by on-chip voltage sensors.","PeriodicalId":325138,"journal":{"name":"2015 Asia-Pacific Symposium on Electromagnetic Compatibility (APEMC)","volume":"104 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-05-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122578125","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-05-26DOI: 10.1109/APEMC.2015.7175398
Xu Gao, Chunchun Sui, S. Hemmady, Joey Rivera, L. Andivahis, D. Pommerenke, D. Beetner
Integrated circuits (ICs) sometimes fail when their power supply is disrupted by external noise, such as might occur during an electrical fast transient (EFT). A delay model was proposed in [1] which can be used to predict the variations in the delays through logic circuits caused by electromagnetic induced noise in the power supply voltage. This model is relatively simple and requires few parameters, giving it the potential to be used even when the IC is a “black bos” and little information is available about the inner circuits. While design information might be approximated through testing, critical process characteristics may not be available which are needed for accurate results. The parameter of greatest concern is the velocity saturation index, since this parameter can exponentially increase the impact of power supply noise on delay. This paper describes an investigation of the sensitivity of the delay model in [1] to the velocity saturation index. Results indicate that the estimated delay, found while treating much of the circuit as a black box, is largely insensitive to the velocity saturation index. This result suggests that this model can be used effectively for prediction of electromagnetically-induced delay errors, even when limited process or circuit information is known.
{"title":"Predicting EMI induced delay errors in integrated circuits: Sensitivity to the velocity saturation index","authors":"Xu Gao, Chunchun Sui, S. Hemmady, Joey Rivera, L. Andivahis, D. Pommerenke, D. Beetner","doi":"10.1109/APEMC.2015.7175398","DOIUrl":"https://doi.org/10.1109/APEMC.2015.7175398","url":null,"abstract":"Integrated circuits (ICs) sometimes fail when their power supply is disrupted by external noise, such as might occur during an electrical fast transient (EFT). A delay model was proposed in [1] which can be used to predict the variations in the delays through logic circuits caused by electromagnetic induced noise in the power supply voltage. This model is relatively simple and requires few parameters, giving it the potential to be used even when the IC is a “black bos” and little information is available about the inner circuits. While design information might be approximated through testing, critical process characteristics may not be available which are needed for accurate results. The parameter of greatest concern is the velocity saturation index, since this parameter can exponentially increase the impact of power supply noise on delay. This paper describes an investigation of the sensitivity of the delay model in [1] to the velocity saturation index. Results indicate that the estimated delay, found while treating much of the circuit as a black box, is largely insensitive to the velocity saturation index. This result suggests that this model can be used effectively for prediction of electromagnetically-induced delay errors, even when limited process or circuit information is known.","PeriodicalId":325138,"journal":{"name":"2015 Asia-Pacific Symposium on Electromagnetic Compatibility (APEMC)","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-05-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121859395","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-05-26DOI: 10.1109/APEMC.2015.7175361
J. Hsu, T. Su, G. Ouyang, Patt Chang, Kai Xiao, Falconee Lee, Y. L. Li
Channel noise scan (CNS) approach is proposed in this paper to efficiently analyse the potential VR-signal coupling issue in the post-layout printed circuit board (PCB) check and the post-silicon debugging of the platform development. CNS is based on a new simulation methodology that includes the whole PCB with signals, voltage regulator (VR) networks, and the interaction. A frequency domain indicator is proposed to systematically analyse the VR-signal coupling problems. This methodology can also provide the ability for the designer to do performance/cost trade-off, layout optimization.
{"title":"Channel noise scan for post-layout check of printed circuit board","authors":"J. Hsu, T. Su, G. Ouyang, Patt Chang, Kai Xiao, Falconee Lee, Y. L. Li","doi":"10.1109/APEMC.2015.7175361","DOIUrl":"https://doi.org/10.1109/APEMC.2015.7175361","url":null,"abstract":"Channel noise scan (CNS) approach is proposed in this paper to efficiently analyse the potential VR-signal coupling issue in the post-layout printed circuit board (PCB) check and the post-silicon debugging of the platform development. CNS is based on a new simulation methodology that includes the whole PCB with signals, voltage regulator (VR) networks, and the interaction. A frequency domain indicator is proposed to systematically analyse the VR-signal coupling problems. This methodology can also provide the ability for the designer to do performance/cost trade-off, layout optimization.","PeriodicalId":325138,"journal":{"name":"2015 Asia-Pacific Symposium on Electromagnetic Compatibility (APEMC)","volume":"45 ","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-05-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131589546","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-05-26DOI: 10.1109/APEMC.2015.7175304
S. van de Beek, R. Vogt-Ardatjew, F. Leferink
There is an increasing use of wireless applications in today's society. A big disadvantage of wireless communication is the high vulnerability to denial-of-service (DoS) attacks. Intentional electromagnetic interference can saturate, and thereby block and desensitize, the wireless receiver. This mechanism of causing a DoS is different from well-studied jamming attacks. It is important to determine and quantify saturation levels of a receiver. The saturation is quantified by the 1-dB compression point, P1-dB. An experimental method is presented that can determine P1-dB over a wide frequency band in a fast and accurate way. Results show the need for a high quality front door filter to be robust against out-of-band interference.
{"title":"Intentional electromagnetic interference through saturation of the RF front end","authors":"S. van de Beek, R. Vogt-Ardatjew, F. Leferink","doi":"10.1109/APEMC.2015.7175304","DOIUrl":"https://doi.org/10.1109/APEMC.2015.7175304","url":null,"abstract":"There is an increasing use of wireless applications in today's society. A big disadvantage of wireless communication is the high vulnerability to denial-of-service (DoS) attacks. Intentional electromagnetic interference can saturate, and thereby block and desensitize, the wireless receiver. This mechanism of causing a DoS is different from well-studied jamming attacks. It is important to determine and quantify saturation levels of a receiver. The saturation is quantified by the 1-dB compression point, P1-dB. An experimental method is presented that can determine P1-dB over a wide frequency band in a fast and accurate way. Results show the need for a high quality front door filter to be robust against out-of-band interference.","PeriodicalId":325138,"journal":{"name":"2015 Asia-Pacific Symposium on Electromagnetic Compatibility (APEMC)","volume":"47 10","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-05-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"113938954","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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