Pub Date : 2007-08-01DOI: 10.1109/ICEPT.2007.4441569
X. Liu, T. Shaw, E. Liniger, M. Lane, G. Bonilla, J. Doyle, B. Herbst, D. Questad
In this paper a methodology based on fracture mechanics has been used to investigate the chip package interaction of ultra low-k/copper interconnect. When a wafer is diced into chips, defects can be generated at the edge of the chips. Under the thermal stress from the package the defects can propagate into the dielectric and cause the chip failure.
{"title":"Chip Package Interaction in Ultra Low-k/Copper Interconnect Technology","authors":"X. Liu, T. Shaw, E. Liniger, M. Lane, G. Bonilla, J. Doyle, B. Herbst, D. Questad","doi":"10.1109/ICEPT.2007.4441569","DOIUrl":"https://doi.org/10.1109/ICEPT.2007.4441569","url":null,"abstract":"In this paper a methodology based on fracture mechanics has been used to investigate the chip package interaction of ultra low-k/copper interconnect. When a wafer is diced into chips, defects can be generated at the edge of the chips. Under the thermal stress from the package the defects can propagate into the dielectric and cause the chip failure.","PeriodicalId":325619,"journal":{"name":"2007 8th International Conference on Electronic Packaging Technology","volume":"92 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133721320","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-08-01DOI: 10.1109/ICEPT.2007.4441461
Yongdian Han, H. Jing, Lianyong Xu, Jun Wei
In this study, multi-walled carbon nanotubes were successfully incorporated into Sn95.5Ag3.8Cu0.7 solder to synthesize novel lead-free composite solders. The paper presents a numerical approach to track the shear stress and creep strain behaviors at the solder joint in lap-shear specimen subject to thermal process. Some notches with different sizes and shapes are designed on the substrate next to the solder. In the investigation, using FEM, the distribution of shear stress and creep strain is simulated and compared under the same conditions but different notch designs. The analytical results show that the distribution of shear stress and creep strain embodies obvious periodicity. The shear stress varies nearly in-phase with the temperature while creep strain does out of phase with temperature. The triangular and round notches are helpful to uniform the range of shear strain. In triangular and round notch designs, notch size does little to affect the distribution of creep strain.
{"title":"Optimal Design of SnAgCu-CNT Solder Lap-shear Specimen under Thermal Cycles with FEM","authors":"Yongdian Han, H. Jing, Lianyong Xu, Jun Wei","doi":"10.1109/ICEPT.2007.4441461","DOIUrl":"https://doi.org/10.1109/ICEPT.2007.4441461","url":null,"abstract":"In this study, multi-walled carbon nanotubes were successfully incorporated into Sn95.5Ag3.8Cu0.7 solder to synthesize novel lead-free composite solders. The paper presents a numerical approach to track the shear stress and creep strain behaviors at the solder joint in lap-shear specimen subject to thermal process. Some notches with different sizes and shapes are designed on the substrate next to the solder. In the investigation, using FEM, the distribution of shear stress and creep strain is simulated and compared under the same conditions but different notch designs. The analytical results show that the distribution of shear stress and creep strain embodies obvious periodicity. The shear stress varies nearly in-phase with the temperature while creep strain does out of phase with temperature. The triangular and round notches are helpful to uniform the range of shear strain. In triangular and round notch designs, notch size does little to affect the distribution of creep strain.","PeriodicalId":325619,"journal":{"name":"2007 8th International Conference on Electronic Packaging Technology","volume":"27 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131801062","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-08-01DOI: 10.1109/ICEPT.2007.4441522
Deng Yaohua, L. Guixiong, Wu Liming, Zhang Yingmin, W. Guitang
High SNR (signal to noise ratio) image is deeply needed in the precise analysis of IC wafer micro-image; current denoising algorithms cant reach the analytic precision in some level. In tins paper, one image denoising algorithms is putted forward based on adaptive lifting scheme, the construction of Haar wavelet and CDF (2,2) is given, the signal is decomposed by wavelet base Haar or wavelet base CDF (2,2) adaptively along four directions (horizon, verticality, 45 degree and 135 degree) in the step of predicting, the wavelet coefficients are calculated separately at each direction, all the thresholds are gained using wavelet soft-thresholding principle, the optimal thresholds minimize the error of the result as compared to these the signal is decomposed along horizon and verticality. Finally the definition of the image is appraised with gray gradient judging function, the experimental data shows that the focus error is no more 4 um, the display definition of the image is improved.
{"title":"Automatic Focus Algorithm for IC Wafer Image Sampling by Adaptive Lifting Scheme Denoising","authors":"Deng Yaohua, L. Guixiong, Wu Liming, Zhang Yingmin, W. Guitang","doi":"10.1109/ICEPT.2007.4441522","DOIUrl":"https://doi.org/10.1109/ICEPT.2007.4441522","url":null,"abstract":"High SNR (signal to noise ratio) image is deeply needed in the precise analysis of IC wafer micro-image; current denoising algorithms cant reach the analytic precision in some level. In tins paper, one image denoising algorithms is putted forward based on adaptive lifting scheme, the construction of Haar wavelet and CDF (2,2) is given, the signal is decomposed by wavelet base Haar or wavelet base CDF (2,2) adaptively along four directions (horizon, verticality, 45 degree and 135 degree) in the step of predicting, the wavelet coefficients are calculated separately at each direction, all the thresholds are gained using wavelet soft-thresholding principle, the optimal thresholds minimize the error of the result as compared to these the signal is decomposed along horizon and verticality. Finally the definition of the image is appraised with gray gradient judging function, the experimental data shows that the focus error is no more 4 um, the display definition of the image is improved.","PeriodicalId":325619,"journal":{"name":"2007 8th International Conference on Electronic Packaging Technology","volume":"27 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132120323","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-08-01DOI: 10.1109/ICEPT.2007.4441467
Kailin Liu, Huiqin Ling, Ming Li, D. Mao
Microcones arrays of cobalt were prepared by electrodeposition with special crystallization conditioning agent. The influence of electrodepositing conditions and form factor effect on the morphology of microcones array is reported. X-ray diffraction result indicated that the Co arrays growing with (110) preferred orientation. The Co array had an obvious magnetic anisotropy. The coercive and saturation field perpendicular and parallel to the surface of Co were FE-SEM, XRD and VSM, respectively.
{"title":"Preparation of Microcones Array Material for Microelectronic Package","authors":"Kailin Liu, Huiqin Ling, Ming Li, D. Mao","doi":"10.1109/ICEPT.2007.4441467","DOIUrl":"https://doi.org/10.1109/ICEPT.2007.4441467","url":null,"abstract":"Microcones arrays of cobalt were prepared by electrodeposition with special crystallization conditioning agent. The influence of electrodepositing conditions and form factor effect on the morphology of microcones array is reported. X-ray diffraction result indicated that the Co arrays growing with (110) preferred orientation. The Co array had an obvious magnetic anisotropy. The coercive and saturation field perpendicular and parallel to the surface of Co were FE-SEM, XRD and VSM, respectively.","PeriodicalId":325619,"journal":{"name":"2007 8th International Conference on Electronic Packaging Technology","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123092429","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-08-01DOI: 10.1109/ICEPT.2007.4441480
L. Mao, Z.O. Wang
The effects of a vacancy on the electronic conductance in a finite one dimensional imperfect quantum wire represents by a sequence of delta function potential were discussed. The results show that the peak of the maximum electronic conductance in the forbidden band caused by vacancy will be largely affected if the position of the vacancy changes. And the position of vacancy is found to have a little effect on the position of the maximum electronic conductance in the forbidden region. All these results demonstrate that for one vacancy existing in a nanowire, the electronic conductance in the conduction band will be deteriorated due to destructive interference of electronic waves.
{"title":"Simulation the Effect of the Defect on the Conductance of Nanowire","authors":"L. Mao, Z.O. Wang","doi":"10.1109/ICEPT.2007.4441480","DOIUrl":"https://doi.org/10.1109/ICEPT.2007.4441480","url":null,"abstract":"The effects of a vacancy on the electronic conductance in a finite one dimensional imperfect quantum wire represents by a sequence of delta function potential were discussed. The results show that the peak of the maximum electronic conductance in the forbidden band caused by vacancy will be largely affected if the position of the vacancy changes. And the position of vacancy is found to have a little effect on the position of the maximum electronic conductance in the forbidden region. All these results demonstrate that for one vacancy existing in a nanowire, the electronic conductance in the conduction band will be deteriorated due to destructive interference of electronic waves.","PeriodicalId":325619,"journal":{"name":"2007 8th International Conference on Electronic Packaging Technology","volume":"28 26 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124715609","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-08-01DOI: 10.1109/ICEPT.2007.4441511
Shinan Wang, L. Liang, Yuanxiang Zhang, Y. Liu, S. Irving, T. Luk
This paper studies the numerical simulation method for electromigration in the solder joint of a chip scale package. The three dimensional electromigration finite element model for solder joint reliability is developed. Numerical experiments are carried out to obtain the electrical, thermal and stress fields with the migration failure under high current density loads. The indirect coupled analysis that includes electrical, thermal and stress fields are investigated and discussed. The viscoplastic and constitutive material model with both SnPb and SnAgCu solder materials is considered in the paper. The sub-model technique is studied with indirect coupled multiple fields. The impacts of geometry parameters, which include ball shape, trace width and UBM diameter for void formation and electromigration time to failure (TTF) are finally investigated.
{"title":"Electromigration Time to Failure Simulation for Solder Bumps of a Chip Scale Package","authors":"Shinan Wang, L. Liang, Yuanxiang Zhang, Y. Liu, S. Irving, T. Luk","doi":"10.1109/ICEPT.2007.4441511","DOIUrl":"https://doi.org/10.1109/ICEPT.2007.4441511","url":null,"abstract":"This paper studies the numerical simulation method for electromigration in the solder joint of a chip scale package. The three dimensional electromigration finite element model for solder joint reliability is developed. Numerical experiments are carried out to obtain the electrical, thermal and stress fields with the migration failure under high current density loads. The indirect coupled analysis that includes electrical, thermal and stress fields are investigated and discussed. The viscoplastic and constitutive material model with both SnPb and SnAgCu solder materials is considered in the paper. The sub-model technique is studied with indirect coupled multiple fields. The impacts of geometry parameters, which include ball shape, trace width and UBM diameter for void formation and electromigration time to failure (TTF) are finally investigated.","PeriodicalId":325619,"journal":{"name":"2007 8th International Conference on Electronic Packaging Technology","volume":"290 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123271898","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-08-01DOI: 10.1109/ICEPT.2007.4441385
Hongbo Xu, Mingyu Li, Gang Cheng, Jongmyung Kim, Daewon Kim
This work focuses on the nonuniform melting process and its theoretical explanation. After induction heating for 0.8 s, 1.0 s, 1.4 s and 2.0 s, different welding state can be obtained, which gives a proof of the melting process. The experiment results demonstrate that the skin effect of induction heating forms the great temperature gradient in the solder bump. The computation results give a theoretical support of the local melting phenomena. The surface melting of solder ball can affect the height and shape of the solder bumps, which is an important factor of the thermal reliability for BGA.
{"title":"Local Melting and Formation Steps of Solder Bumps via Induction Heating Reflow","authors":"Hongbo Xu, Mingyu Li, Gang Cheng, Jongmyung Kim, Daewon Kim","doi":"10.1109/ICEPT.2007.4441385","DOIUrl":"https://doi.org/10.1109/ICEPT.2007.4441385","url":null,"abstract":"This work focuses on the nonuniform melting process and its theoretical explanation. After induction heating for 0.8 s, 1.0 s, 1.4 s and 2.0 s, different welding state can be obtained, which gives a proof of the melting process. The experiment results demonstrate that the skin effect of induction heating forms the great temperature gradient in the solder bump. The computation results give a theoretical support of the local melting phenomena. The surface melting of solder ball can affect the height and shape of the solder bumps, which is an important factor of the thermal reliability for BGA.","PeriodicalId":325619,"journal":{"name":"2007 8th International Conference on Electronic Packaging Technology","volume":"352 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123404642","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-08-01DOI: 10.1109/ICEPT.2007.4441537
Wang Geng-lin, Wang Li-yan, Dong Li-jun, Huang Zheng
In the course of analyzing and deducing leak rate formula of fine leak test measurement of helium mass spectrometer, equivalent standard leak rate L is replaced with standard helium leak rate LHe . Helium gas exchange time constant zetaHe is cited, and the contents of typical gases inside hermetic cavity is calculated. It shows that after properly handling the measured leak rate deviation, a series of formulas of the paper can be used to perform engineering calculation on the process of gas exchange. zetaHes are calculated corresponding to leak rate criterion under various test conditions of current Chinese national military standards and US military standards in fine leak test of helium mass spectrometer, so real LHe is preferable to virtual L. Additionally, it is noted that zetaHe is the characteristic parameter to measure the relative hermeticity, and especially, most leak rate criterions in current military standards cannot guarantee meeting the requirement of internal vapor content, so by analyzing the improvement in the standards and existing hermeticity levels, it is evident that there still exists the necessity for the standards to be further improved.
{"title":"Study on Leak Rate Formula and Criterion for Helium Mass Spectrometer Fine Leak Test","authors":"Wang Geng-lin, Wang Li-yan, Dong Li-jun, Huang Zheng","doi":"10.1109/ICEPT.2007.4441537","DOIUrl":"https://doi.org/10.1109/ICEPT.2007.4441537","url":null,"abstract":"In the course of analyzing and deducing leak rate formula of fine leak test measurement of helium mass spectrometer, equivalent standard leak rate L is replaced with standard helium leak rate LHe . Helium gas exchange time constant zetaHe is cited, and the contents of typical gases inside hermetic cavity is calculated. It shows that after properly handling the measured leak rate deviation, a series of formulas of the paper can be used to perform engineering calculation on the process of gas exchange. zetaHes are calculated corresponding to leak rate criterion under various test conditions of current Chinese national military standards and US military standards in fine leak test of helium mass spectrometer, so real LHe is preferable to virtual L. Additionally, it is noted that zetaHe is the characteristic parameter to measure the relative hermeticity, and especially, most leak rate criterions in current military standards cannot guarantee meeting the requirement of internal vapor content, so by analyzing the improvement in the standards and existing hermeticity levels, it is evident that there still exists the necessity for the standards to be further improved.","PeriodicalId":325619,"journal":{"name":"2007 8th International Conference on Electronic Packaging Technology","volume":"152 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122828670","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-08-01DOI: 10.1109/ICEPT.2007.4441439
Feng Gao, C. P. Wang, X. J. Liu, K. Ishida
Sn-Ag-Cu base solders are the most potential candidates to substitute of Sn-Pb eutectic solder. Gold (Au) coatings are used to protect conductor surface from oxidation and thereby to promote the solderability, and nickel (Ni) is often used as a diffusion barrier layer between lead-free solders and substrates to restrict the growing of intermetallic compound layers. And the gold and nickel also are added to the Pb-free solders to improve their performance. In the present work, the thermodynamic calculations of phase equilibria in the Sn-Ag-Cu-Ni-Au system were carried out using the CALPHAD method. Some examples of application are presented, and it is shown that the CALPHAD method is a good tool to design Pb-free solders and understand the interfacial reaction.
{"title":"Thermodynamic Calculation of Phase Equilibria and Its Applications in the Sn-Ag-Cu-Ni-Au System","authors":"Feng Gao, C. P. Wang, X. J. Liu, K. Ishida","doi":"10.1109/ICEPT.2007.4441439","DOIUrl":"https://doi.org/10.1109/ICEPT.2007.4441439","url":null,"abstract":"Sn-Ag-Cu base solders are the most potential candidates to substitute of Sn-Pb eutectic solder. Gold (Au) coatings are used to protect conductor surface from oxidation and thereby to promote the solderability, and nickel (Ni) is often used as a diffusion barrier layer between lead-free solders and substrates to restrict the growing of intermetallic compound layers. And the gold and nickel also are added to the Pb-free solders to improve their performance. In the present work, the thermodynamic calculations of phase equilibria in the Sn-Ag-Cu-Ni-Au system were carried out using the CALPHAD method. Some examples of application are presented, and it is shown that the CALPHAD method is a good tool to design Pb-free solders and understand the interfacial reaction.","PeriodicalId":325619,"journal":{"name":"2007 8th International Conference on Electronic Packaging Technology","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125940932","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-08-01DOI: 10.1109/ICEPT.2007.4441382
Y. Chapuis, A. Debray, H. Fujita
In this paper, we discuss a flip-chip packaging method using liquid solder for 3D large-scale electronic/MEMS co-integration. This approach has been inspired from self-assembly technique which is emerging as one of the main methods for fabrication of heterogeneous micro-and nano-systems. We proposed to form solder bump by coating liquid solder directly on electrodes of a MEMS chip based on sophisticate microstructures of electrostatic microactuator array. Self-alignment and assembly techniques for electronic receptor chip were also detailed in order to achieve efficient flip-chip of MEMS and Electronic chip without any stiction and contamination problem. Functionality of the system has been validated and perspectives discussed.
{"title":"3-D Large-Scale IC/MEMS Co-Integration Using Liquid Solder for Flip-Chip Assembly","authors":"Y. Chapuis, A. Debray, H. Fujita","doi":"10.1109/ICEPT.2007.4441382","DOIUrl":"https://doi.org/10.1109/ICEPT.2007.4441382","url":null,"abstract":"In this paper, we discuss a flip-chip packaging method using liquid solder for 3D large-scale electronic/MEMS co-integration. This approach has been inspired from self-assembly technique which is emerging as one of the main methods for fabrication of heterogeneous micro-and nano-systems. We proposed to form solder bump by coating liquid solder directly on electrodes of a MEMS chip based on sophisticate microstructures of electrostatic microactuator array. Self-alignment and assembly techniques for electronic receptor chip were also detailed in order to achieve efficient flip-chip of MEMS and Electronic chip without any stiction and contamination problem. Functionality of the system has been validated and perspectives discussed.","PeriodicalId":325619,"journal":{"name":"2007 8th International Conference on Electronic Packaging Technology","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129789990","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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