Pub Date : 2007-08-01DOI: 10.1109/ICEPT.2007.4441433
H. Ji, Mingyu Li, Y. Kweon, W. Chang, Chunqing Wang
Due to small bond size, short bonding time, especially slight interface reaction, bonding details cannot be recognized using scanning electron microscope and energy density X-ray spectrum. In order to understand the physical mechanism of ultrasonic wedge bonding, in this paper, bond interface of ultrasonic AlSi wire wedge bonding on Au/Ni/Cu pad was investigated under high resolution transmission electron microscope. Au8Al3 intermetallic compounds were identified by convergent beam electron diffraction, thickness of which was about 200 nm and its lattice images were captured. Solid-state diffusion theory cannot be used to explain why such thick compound formed within milliseconds at room temperature. Ultrasonic effects attributed to formation of the metallurgical bonds.
{"title":"Observation of Ultrasonic Al-Si Wire Wedge Bond Interface Using High Resolution Transmission Electron Microscope","authors":"H. Ji, Mingyu Li, Y. Kweon, W. Chang, Chunqing Wang","doi":"10.1109/ICEPT.2007.4441433","DOIUrl":"https://doi.org/10.1109/ICEPT.2007.4441433","url":null,"abstract":"Due to small bond size, short bonding time, especially slight interface reaction, bonding details cannot be recognized using scanning electron microscope and energy density X-ray spectrum. In order to understand the physical mechanism of ultrasonic wedge bonding, in this paper, bond interface of ultrasonic AlSi wire wedge bonding on Au/Ni/Cu pad was investigated under high resolution transmission electron microscope. Au8Al3 intermetallic compounds were identified by convergent beam electron diffraction, thickness of which was about 200 nm and its lattice images were captured. Solid-state diffusion theory cannot be used to explain why such thick compound formed within milliseconds at room temperature. Ultrasonic effects attributed to formation of the metallurgical bonds.","PeriodicalId":325619,"journal":{"name":"2007 8th International Conference on Electronic Packaging Technology","volume":"145 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114460432","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-08-01DOI: 10.1109/ICEPT.2007.4441514
Yumin Liu, Y. Liu, S. Irving
Handheld electronic products are more prone to being dropped during their lifetime of use. Therefore, the reliability performance of these products during a drop impact has become a concern. Although a new board level test method has been standardized through JEDEC (JESD22-B111). characterization tests are usually expensive and time consuming to complete. In order to reduce costs and the design cycle, many efforts have been made to study the reliability performance under drop impact loading by numerical modeling. In tins paper, the implicit Input-G method is adopted to simulate the board level drop test of an advanced molded leaded package (MLP) by using a commercial FEA code. Parametric study on package location at the test board, solder joints height and MLP package thickness is conducted in the board level drop test simulations. The peeling stress and first principle stress of the solder joints are checked and compared. Simulation results show that when the thickness of the package increases the solder joint becomes weaker. Similar trends are obtained for the solder joints height, i.e.. lower solder joints are more reliable during the board level drop test.
{"title":"Board Level Drop Test Simulation for an Advanced MLP","authors":"Yumin Liu, Y. Liu, S. Irving","doi":"10.1109/ICEPT.2007.4441514","DOIUrl":"https://doi.org/10.1109/ICEPT.2007.4441514","url":null,"abstract":"Handheld electronic products are more prone to being dropped during their lifetime of use. Therefore, the reliability performance of these products during a drop impact has become a concern. Although a new board level test method has been standardized through JEDEC (JESD22-B111). characterization tests are usually expensive and time consuming to complete. In order to reduce costs and the design cycle, many efforts have been made to study the reliability performance under drop impact loading by numerical modeling. In tins paper, the implicit Input-G method is adopted to simulate the board level drop test of an advanced molded leaded package (MLP) by using a commercial FEA code. Parametric study on package location at the test board, solder joints height and MLP package thickness is conducted in the board level drop test simulations. The peeling stress and first principle stress of the solder joints are checked and compared. Simulation results show that when the thickness of the package increases the solder joint becomes weaker. Similar trends are obtained for the solder joints height, i.e.. lower solder joints are more reliable during the board level drop test.","PeriodicalId":325619,"journal":{"name":"2007 8th International Conference on Electronic Packaging Technology","volume":"51 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115125245","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-08-01DOI: 10.1109/ICEPT.2007.4441437
Qiang Wang, Yuanxiang Zhang, L. Liang, Y. Liu, S. Irving
A series of tensile tests for Pb-free solder material 95.7Sn3.8Ag0.5Cu have been conducted under a wide range of temperatures and constant strain rates to obtain the required data for fitting the material parameters of Anand model. Based on these test results, empirical equations of the tensile strength, elastic modulus and yield stress are fitted as the functions of temperature. It is found that the temperature and strain rate have demonstrated crucial effects on tensile and creep properties of SnAgCu solder material. The test results have also displayed certain viscoplastic behavior, temperature dependence, strain rate sensitivity and creep resistance. A procedure for the determination of Anand material parameters through data fitting is proposed to find nine Anand constants. Three-dimensional finite element analysis has been applied to predict the fatigue life of solder joints under thermal cycling conditions. Finally the solder joint life prediction and comparison of Pb-free material 95.7Sn3.8Ag0.5Cu and standard Pb material 62Sn36Pb2Ag solder for a CSP are examined.
{"title":"Anand Parameter Test for Pb-Free Material SnAgCu and Life Prediction for a CSP","authors":"Qiang Wang, Yuanxiang Zhang, L. Liang, Y. Liu, S. Irving","doi":"10.1109/ICEPT.2007.4441437","DOIUrl":"https://doi.org/10.1109/ICEPT.2007.4441437","url":null,"abstract":"A series of tensile tests for Pb-free solder material 95.7Sn3.8Ag0.5Cu have been conducted under a wide range of temperatures and constant strain rates to obtain the required data for fitting the material parameters of Anand model. Based on these test results, empirical equations of the tensile strength, elastic modulus and yield stress are fitted as the functions of temperature. It is found that the temperature and strain rate have demonstrated crucial effects on tensile and creep properties of SnAgCu solder material. The test results have also displayed certain viscoplastic behavior, temperature dependence, strain rate sensitivity and creep resistance. A procedure for the determination of Anand material parameters through data fitting is proposed to find nine Anand constants. Three-dimensional finite element analysis has been applied to predict the fatigue life of solder joints under thermal cycling conditions. Finally the solder joint life prediction and comparison of Pb-free material 95.7Sn3.8Ag0.5Cu and standard Pb material 62Sn36Pb2Ag solder for a CSP are examined.","PeriodicalId":325619,"journal":{"name":"2007 8th International Conference on Electronic Packaging Technology","volume":"34 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114549530","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-08-01DOI: 10.1109/ICEPT.2007.4441574
G.Q. Zhang
In the past decades, the main stream of microelectronics progresses is mainly powered by Moore's law, with two focused development arenas, namely, IC miniaturization down to nano scale, and SoC based system integration. While microelectronics community continues to invent new solutions around the world to keep Moore's law alive, there is increasing momentum for the development of "More than Moore" (MtM) products and technology that are based upon or derived from silicon technologies but do not simply scale with Moore's law. Typical examples are RF, Power/HV, Passive, Sensor/Actuator/MEMS, Bio-chi/packages, SiP, SSL. This increasing momentum of MtM is trigged by the increasing social needs for high level heterogeneous system integration including non-digital functions, the necessity to speed up innovative product creation and to broaden the product portfolio of wafer fabs, and the limiting cost and time factors of advanced SoC development. It is believed that MtM will add value to society on top of and beyond advanced CMOS and conventional packaging, with fast increasing marketing potentials. This two hours course will cover mainly: - Technology development trends of Micro/nanoelectronics - Business development trends of Micro/nanoelectronics - Strategic research agenda of "More than Moore" - Paradigm of "More than Moore" business creation - European's vision, strategy and practices for micro/nanoelectronics
{"title":"\"More than Moore\" - The changing international landscape, strategy and solutions of micro/nanoelectronics","authors":"G.Q. Zhang","doi":"10.1109/ICEPT.2007.4441574","DOIUrl":"https://doi.org/10.1109/ICEPT.2007.4441574","url":null,"abstract":"In the past decades, the main stream of microelectronics progresses is mainly powered by Moore's law, with two focused development arenas, namely, IC miniaturization down to nano scale, and SoC based system integration. While microelectronics community continues to invent new solutions around the world to keep Moore's law alive, there is increasing momentum for the development of \"More than Moore\" (MtM) products and technology that are based upon or derived from silicon technologies but do not simply scale with Moore's law. Typical examples are RF, Power/HV, Passive, Sensor/Actuator/MEMS, Bio-chi/packages, SiP, SSL. This increasing momentum of MtM is trigged by the increasing social needs for high level heterogeneous system integration including non-digital functions, the necessity to speed up innovative product creation and to broaden the product portfolio of wafer fabs, and the limiting cost and time factors of advanced SoC development. It is believed that MtM will add value to society on top of and beyond advanced CMOS and conventional packaging, with fast increasing marketing potentials. This two hours course will cover mainly: - Technology development trends of Micro/nanoelectronics - Business development trends of Micro/nanoelectronics - Strategic research agenda of \"More than Moore\" - Paradigm of \"More than Moore\" business creation - European's vision, strategy and practices for micro/nanoelectronics","PeriodicalId":325619,"journal":{"name":"2007 8th International Conference on Electronic Packaging Technology","volume":"179 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116163702","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-08-01DOI: 10.1109/ICEPT.2007.4441542
Z. Hua, C.Y. Li, Y.X. Luo, L.Q. Cao, J. Zhang
Stacked Die Packaging technology is the key technique to meet the requirements of higher density, smaller size of electronic products. Moisture has big influence on the reliability of packaging, in which the major failures are corrosion, delamination and crack. In stacked die packages, the main risks of the moisture also exist. The focus of this paper is to investigate the hygroscopic characteristic of stacked die using commercial FEA software. In this study, according to the JEDEC standard, the moisture diffusion characteristic under different conditions is investigated. Results show that the substrate and bottom adhesive absorb rapidly in moisture diffusion simulation. This reduces the mechanical properties of the stacked die and the result may give a proper answer to those failure observed in industry. More tests are needed in order to get a more precise investigation.
{"title":"FEM Analysis of Moisture Distribution in Stacked Die Package","authors":"Z. Hua, C.Y. Li, Y.X. Luo, L.Q. Cao, J. Zhang","doi":"10.1109/ICEPT.2007.4441542","DOIUrl":"https://doi.org/10.1109/ICEPT.2007.4441542","url":null,"abstract":"Stacked Die Packaging technology is the key technique to meet the requirements of higher density, smaller size of electronic products. Moisture has big influence on the reliability of packaging, in which the major failures are corrosion, delamination and crack. In stacked die packages, the main risks of the moisture also exist. The focus of this paper is to investigate the hygroscopic characteristic of stacked die using commercial FEA software. In this study, according to the JEDEC standard, the moisture diffusion characteristic under different conditions is investigated. Results show that the substrate and bottom adhesive absorb rapidly in moisture diffusion simulation. This reduces the mechanical properties of the stacked die and the result may give a proper answer to those failure observed in industry. More tests are needed in order to get a more precise investigation.","PeriodicalId":325619,"journal":{"name":"2007 8th International Conference on Electronic Packaging Technology","volume":"46 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116354821","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-08-01DOI: 10.1109/ICEPT.2007.4441488
Chenxi Wang, E. Higurashi, T. Suga
Wafer direct bonding technique offers flexible and inexpensive ways to fabricate novel semiconductor devices. But its application is much limited by high temperature process and void problem. In this study, room temperature Si/Si wafer direct bonding has been performed using sequential plasma pretreatment prior to bonding. A shorter O2 reactive ion etching (RIE) pretreatment (~10 s) and followed by N2 radicals for 60 s is used for surface activation. Strong bonding strength (about 2-2.5 J/m2) is achieved at room temperature without requiring any annealing process. It is close to the bulk-fracture of silicon. Furthermore, no voids are observed at Si/Si interfaces even if the bonded wafer pairs are heated from 200degC to 800degC in subsequent annealing process. The bonding mechanism is proposed in this paper. The authors believe that this void-free, room temperature bonding technique by sequential plasma activation is suitable for the microelectromechanical systems manufacture process and wafer-scale packaging.
{"title":"Room Temperature Si/Si Wafer Direct Bonding in Air","authors":"Chenxi Wang, E. Higurashi, T. Suga","doi":"10.1109/ICEPT.2007.4441488","DOIUrl":"https://doi.org/10.1109/ICEPT.2007.4441488","url":null,"abstract":"Wafer direct bonding technique offers flexible and inexpensive ways to fabricate novel semiconductor devices. But its application is much limited by high temperature process and void problem. In this study, room temperature Si/Si wafer direct bonding has been performed using sequential plasma pretreatment prior to bonding. A shorter O2 reactive ion etching (RIE) pretreatment (~10 s) and followed by N2 radicals for 60 s is used for surface activation. Strong bonding strength (about 2-2.5 J/m2) is achieved at room temperature without requiring any annealing process. It is close to the bulk-fracture of silicon. Furthermore, no voids are observed at Si/Si interfaces even if the bonded wafer pairs are heated from 200degC to 800degC in subsequent annealing process. The bonding mechanism is proposed in this paper. The authors believe that this void-free, room temperature bonding technique by sequential plasma activation is suitable for the microelectromechanical systems manufacture process and wafer-scale packaging.","PeriodicalId":325619,"journal":{"name":"2007 8th International Conference on Electronic Packaging Technology","volume":"27 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123574708","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-08-01DOI: 10.1109/ICEPT.2007.4441445
Yujuan Zhang, Zliuoslien Shen, Zhensong Tong
Due to their good thermophysical properties, the metal matrix composites, especially particle reinforced isotropic composites, have been the research focus of thermal management materials for electronic packaging. Although there are lots of researches on these composites, the thermal conduction mechanism of them has not been understood profoundly. Several actual common models for calculating thermal conductivity are presented in this paper. Due to the interfacial thermal barrier resistance induced by the inclusion of particles, the experimental results are usually below the calculated value of above models. Hassehnan and Johnson induced the concept of an interfacial thermal barrier resistance and modified the Maxwell's formula by the boundary conductance. In this paper, the Maxwell's formula modified by Hasselman and Johnson is discussed. Many results show the variations of boundary conductance of composites, which attribute to the bonding conditions of the interfaces between the particles and the matrix phase in various synthesis conditions.
{"title":"Thermal Conductivity and Interfacial Thermal Barrier Resistance of the Particle Reinforced Metal Matrix Composites","authors":"Yujuan Zhang, Zliuoslien Shen, Zhensong Tong","doi":"10.1109/ICEPT.2007.4441445","DOIUrl":"https://doi.org/10.1109/ICEPT.2007.4441445","url":null,"abstract":"Due to their good thermophysical properties, the metal matrix composites, especially particle reinforced isotropic composites, have been the research focus of thermal management materials for electronic packaging. Although there are lots of researches on these composites, the thermal conduction mechanism of them has not been understood profoundly. Several actual common models for calculating thermal conductivity are presented in this paper. Due to the interfacial thermal barrier resistance induced by the inclusion of particles, the experimental results are usually below the calculated value of above models. Hassehnan and Johnson induced the concept of an interfacial thermal barrier resistance and modified the Maxwell's formula by the boundary conductance. In this paper, the Maxwell's formula modified by Hasselman and Johnson is discussed. Many results show the variations of boundary conductance of composites, which attribute to the bonding conditions of the interfaces between the particles and the matrix phase in various synthesis conditions.","PeriodicalId":325619,"journal":{"name":"2007 8th International Conference on Electronic Packaging Technology","volume":"183 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121944554","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-08-01DOI: 10.1109/ICEPT.2007.4441446
Zhensong Tong, Zhu Shen, Yujuan Zhang
For the outstanding properties of diamond and aluminum, diamond reinforced aluminum matrix composites have been developed. In nowadays, Al/diamond composites can be fabricated by many different techniques. Among these fabrication methods, gas pressure infiltration and squeeze casting infiltration are regarded promising and effective. The micro structure and interface reaction of Al/diamond composites are discussed in this paper. The results show that though the forming of Al4C3 on the interface of Al/diamond composite can improve the bonding condition, it also has negative effect on the thermal properties of the composites. The thermal conductivities and CTEs of Al/diamond composites are the property mainly studied. Unfortunately, the thermal degradation of diamond has precluded its use as reinforcement. Now, MER Corporation has developed commercial products of Al/diamond composites, and has used them in some electronic packages. We can believe that Al/diamond composite materials will play much more important roles in the thermal management of electronic packaging.
{"title":"Aluminum/Diamond Composites and Their Applications in Electronic Packaging","authors":"Zhensong Tong, Zhu Shen, Yujuan Zhang","doi":"10.1109/ICEPT.2007.4441446","DOIUrl":"https://doi.org/10.1109/ICEPT.2007.4441446","url":null,"abstract":"For the outstanding properties of diamond and aluminum, diamond reinforced aluminum matrix composites have been developed. In nowadays, Al/diamond composites can be fabricated by many different techniques. Among these fabrication methods, gas pressure infiltration and squeeze casting infiltration are regarded promising and effective. The micro structure and interface reaction of Al/diamond composites are discussed in this paper. The results show that though the forming of Al4C3 on the interface of Al/diamond composite can improve the bonding condition, it also has negative effect on the thermal properties of the composites. The thermal conductivities and CTEs of Al/diamond composites are the property mainly studied. Unfortunately, the thermal degradation of diamond has precluded its use as reinforcement. Now, MER Corporation has developed commercial products of Al/diamond composites, and has used them in some electronic packages. We can believe that Al/diamond composite materials will play much more important roles in the thermal management of electronic packaging.","PeriodicalId":325619,"journal":{"name":"2007 8th International Conference on Electronic Packaging Technology","volume":"29 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129345318","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-08-01DOI: 10.1109/ICEPT.2007.4441576
I. M. Sham, Zhong Chen
To enable automotives to be more intelligent and reliable, increasing amounts of electronic systems are embedded inside automotives. Moreover, adopting advanced packaging technologies, such as System-in-Package (SiP), not only can reduce the overall module size but also the number of components, i.e. less handling and bill-of-materials. Nevertheless, reliability is always critical in the development of automotive electronics, particularly when the solder joint materials in automotive electronics work under prolonged harsh working environment, it always requires additional attention to ensure the solder joint reliability can meet the stringent requirements in various international standards.
{"title":"Electronics Packaging Technologies for Automotive Electronics","authors":"I. M. Sham, Zhong Chen","doi":"10.1109/ICEPT.2007.4441576","DOIUrl":"https://doi.org/10.1109/ICEPT.2007.4441576","url":null,"abstract":"To enable automotives to be more intelligent and reliable, increasing amounts of electronic systems are embedded inside automotives. Moreover, adopting advanced packaging technologies, such as System-in-Package (SiP), not only can reduce the overall module size but also the number of components, i.e. less handling and bill-of-materials. Nevertheless, reliability is always critical in the development of automotive electronics, particularly when the solder joint materials in automotive electronics work under prolonged harsh working environment, it always requires additional attention to ensure the solder joint reliability can meet the stringent requirements in various international standards.","PeriodicalId":325619,"journal":{"name":"2007 8th International Conference on Electronic Packaging Technology","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129566575","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-08-01DOI: 10.1109/ICEPT.2007.4441517
Wen-li Wang, Yong-sheng Liang
This paper introduces the solder joints of BGA on PCB top side appearing crack phenomenon after the bottom side passed wave soldering, the reason for solder joints crack is that partial solder joints are dewetting on the component side IMC pad. Through many kinds of failure analysis method, the failure analysis conclusion is that BGA solder joints crack is due to the solder joints melting during wave soldering. The direct reason is that component side pad's coating is gold on nickel, but PCB side pad's coating is HASL finish, copper from PCB pad migrates across the BGA ball while the solder joint melt, thus Ni-Sn-Cu IMC is formed on the component side pad.
{"title":"Study on Failure Mechanism of BGA Solder Joints Crack during Wave Soldering","authors":"Wen-li Wang, Yong-sheng Liang","doi":"10.1109/ICEPT.2007.4441517","DOIUrl":"https://doi.org/10.1109/ICEPT.2007.4441517","url":null,"abstract":"This paper introduces the solder joints of BGA on PCB top side appearing crack phenomenon after the bottom side passed wave soldering, the reason for solder joints crack is that partial solder joints are dewetting on the component side IMC pad. Through many kinds of failure analysis method, the failure analysis conclusion is that BGA solder joints crack is due to the solder joints melting during wave soldering. The direct reason is that component side pad's coating is gold on nickel, but PCB side pad's coating is HASL finish, copper from PCB pad migrates across the BGA ball while the solder joint melt, thus Ni-Sn-Cu IMC is formed on the component side pad.","PeriodicalId":325619,"journal":{"name":"2007 8th International Conference on Electronic Packaging Technology","volume":" 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132011397","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
京公网安备 11010802042870号
京ICP备2023020795号-1
扫码关注我们
求助内容：
应助结果提醒方式：