Pub Date : 2007-08-01DOI: 10.1109/ICEPT.2007.4441494
Y. Ai, Xiaobing Luo, Sheng Liu
This paper presents the design and modeling of a micromachined thermal convective gyroscope with bidirectional jets. Unlike earlier reported thermal convective gyroscopes, the proposed gyroscope comprises two chambers for gas jet deflection. Mathematical analysis was applied to investigate the centrifugal acceleration coupling in both single directional jet detection method and bidirectional jets detection method. Analysis results revealed that bidirectional jets detection method can effectively reduce centrifugal acceleration coupling which induces the nonlinearity of the output electric signal. The applicable range of bidirectional jets detection method is twice wider than that of single directional jet detection method. Numerical simulation was applied to investigate the gyroscope performance, which concluded that the temperature difference DeltaT shows good linearity to the angular rate omega, the nonlinearity is 0.6%. The sensitivity of the proposed gyroscope was estimated to be 1.26mV/deg/s with the supply voltage of 15 V.
{"title":"Design and Modeling of Micromachined Thermal Convective Gyroscope with Bidirectional Jets","authors":"Y. Ai, Xiaobing Luo, Sheng Liu","doi":"10.1109/ICEPT.2007.4441494","DOIUrl":"https://doi.org/10.1109/ICEPT.2007.4441494","url":null,"abstract":"This paper presents the design and modeling of a micromachined thermal convective gyroscope with bidirectional jets. Unlike earlier reported thermal convective gyroscopes, the proposed gyroscope comprises two chambers for gas jet deflection. Mathematical analysis was applied to investigate the centrifugal acceleration coupling in both single directional jet detection method and bidirectional jets detection method. Analysis results revealed that bidirectional jets detection method can effectively reduce centrifugal acceleration coupling which induces the nonlinearity of the output electric signal. The applicable range of bidirectional jets detection method is twice wider than that of single directional jet detection method. Numerical simulation was applied to investigate the gyroscope performance, which concluded that the temperature difference DeltaT shows good linearity to the angular rate omega, the nonlinearity is 0.6%. The sensitivity of the proposed gyroscope was estimated to be 1.26mV/deg/s with the supply voltage of 15 V.","PeriodicalId":325619,"journal":{"name":"2007 8th International Conference on Electronic Packaging Technology","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128038200","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-08-01DOI: 10.1109/ICEPT.2007.4441538
Dong Wang, Xiaosong Ma, Dan Guo
The purpose of this paper is to study effect of thermal cycle condition on the reliability of lead-free flip chip solder joint. Flip chip assembly was subjected to thermal cycle (MIT-STD-883) condition. Two dimensional finite element analysis (FEA) has been carried out using ANSYS commercial software. There are two types of lead-free solder (Sn96.5-Ag3.5 and Sn95.5-Ag3.8-Cu0.7). They used flip chip solder joints have been evaluated. For each lead-free flip chip solder joint, thermal stress and strain have been studied. The plastic strain is mainly effect on thermal fatigue of solder joint, so two types of lead-free solder joint compare with Sn63-Pb37 solder joint in equivalent plastic strain, and thermal fatigue life of these three types of solder joint has been analyzed and assessed.
{"title":"Reliability Analysis of Lead-free Flip Chip Solder Joint","authors":"Dong Wang, Xiaosong Ma, Dan Guo","doi":"10.1109/ICEPT.2007.4441538","DOIUrl":"https://doi.org/10.1109/ICEPT.2007.4441538","url":null,"abstract":"The purpose of this paper is to study effect of thermal cycle condition on the reliability of lead-free flip chip solder joint. Flip chip assembly was subjected to thermal cycle (MIT-STD-883) condition. Two dimensional finite element analysis (FEA) has been carried out using ANSYS commercial software. There are two types of lead-free solder (Sn96.5-Ag3.5 and Sn95.5-Ag3.8-Cu0.7). They used flip chip solder joints have been evaluated. For each lead-free flip chip solder joint, thermal stress and strain have been studied. The plastic strain is mainly effect on thermal fatigue of solder joint, so two types of lead-free solder joint compare with Sn63-Pb37 solder joint in equivalent plastic strain, and thermal fatigue life of these three types of solder joint has been analyzed and assessed.","PeriodicalId":325619,"journal":{"name":"2007 8th International Conference on Electronic Packaging Technology","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128566536","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-08-01DOI: 10.1109/ICEPT.2007.4441562
Y.C. Lee
Packaging is critical to the advancement of microsystems integrating microelectromechanical systems (MEMS) with microelectronic, optoelectronic and microwave devices. This paper discusses microsystems packaging with three cases: a) packaging of MEMS: flip-chip assembly to interconnect MEMS devices with other components; b) packaging for MEMS: novel MEMS devices fabricated using packaging technologies such as flexible circuit; and c) MEMS for packaging: MEMS devices used for active alignment for optoelectronic packaging. With such a close relationship between packaging and MEMS, we expect to see many novel microsystems with packaging and MEMS technologies fully integrated in the future.
{"title":"Packaging and Microelectromechanical Systems (MEMS)","authors":"Y.C. Lee","doi":"10.1109/ICEPT.2007.4441562","DOIUrl":"https://doi.org/10.1109/ICEPT.2007.4441562","url":null,"abstract":"Packaging is critical to the advancement of microsystems integrating microelectromechanical systems (MEMS) with microelectronic, optoelectronic and microwave devices. This paper discusses microsystems packaging with three cases: a) packaging of MEMS: flip-chip assembly to interconnect MEMS devices with other components; b) packaging for MEMS: novel MEMS devices fabricated using packaging technologies such as flexible circuit; and c) MEMS for packaging: MEMS devices used for active alignment for optoelectronic packaging. With such a close relationship between packaging and MEMS, we expect to see many novel microsystems with packaging and MEMS technologies fully integrated in the future.","PeriodicalId":325619,"journal":{"name":"2007 8th International Conference on Electronic Packaging Technology","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129835291","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-08-01DOI: 10.1109/ICEPT.2007.4441386
Dapeng Zhu, Jiuirong Guo, L. Luo
The Kelvin structure was designed on alumina MCM-D substrate to evaluate the substrate electromigration (EM) reliability. The Median Time To Failure (t50) and the resistance shift of the interconnection via of Kelvin structure were measured by applying different current (DC) under different ambient temperatures. A thermal compensation method was adopted which ensured the packaged test structures fail at the same condition. The test results show that the active energy and the current density exponent of anodic alumina substrate are 0.57 eV and 1.03 respectively. The failure of the Kelvin structure during EM test is caused by the void formation at the interconnection of lines and vias where the current bending in 90-degree corner accelerate the EM process.
{"title":"Electromigration Study on Micro-vias of Multi-layer Anodic Alumina Substrate with a Thermal Compensated on-line Measurement Scheme","authors":"Dapeng Zhu, Jiuirong Guo, L. Luo","doi":"10.1109/ICEPT.2007.4441386","DOIUrl":"https://doi.org/10.1109/ICEPT.2007.4441386","url":null,"abstract":"The Kelvin structure was designed on alumina MCM-D substrate to evaluate the substrate electromigration (EM) reliability. The Median Time To Failure (t50) and the resistance shift of the interconnection via of Kelvin structure were measured by applying different current (DC) under different ambient temperatures. A thermal compensation method was adopted which ensured the packaged test structures fail at the same condition. The test results show that the active energy and the current density exponent of anodic alumina substrate are 0.57 eV and 1.03 respectively. The failure of the Kelvin structure during EM test is caused by the void formation at the interconnection of lines and vias where the current bending in 90-degree corner accelerate the EM process.","PeriodicalId":325619,"journal":{"name":"2007 8th International Conference on Electronic Packaging Technology","volume":"227 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122372510","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-08-01DOI: 10.1109/ICEPT.2007.4441473
W. Fang, Hongbo Yang, Ming Zhou, A. Tsui
Nowadays, power management semiconductor suppliers have taken big steps to provide environmentally sound and green product solutions to meet the ever increasing demand of high performance electronics in the global consumer, industrial, computer, communication and automotive markets. The challenges are two fold. Very strict reliability performance and the green requirements have to be met at the same time. These requirements mainly bring three challenges to current electronic device manufacturers: Lead-free plating process, green compound package and Pb-free die attach materials. GEM. as an international power management manufacturing services provider, has already taken action to meet the global new requirement. In tins paper, the research path and process improvement of green package manufacturing in GEM is presented, and the packaging trend of future high power and high thermal capability power management device is also discussed.
{"title":"Green Policy in an International Power Management Manufacturing Services Provider in China","authors":"W. Fang, Hongbo Yang, Ming Zhou, A. Tsui","doi":"10.1109/ICEPT.2007.4441473","DOIUrl":"https://doi.org/10.1109/ICEPT.2007.4441473","url":null,"abstract":"Nowadays, power management semiconductor suppliers have taken big steps to provide environmentally sound and green product solutions to meet the ever increasing demand of high performance electronics in the global consumer, industrial, computer, communication and automotive markets. The challenges are two fold. Very strict reliability performance and the green requirements have to be met at the same time. These requirements mainly bring three challenges to current electronic device manufacturers: Lead-free plating process, green compound package and Pb-free die attach materials. GEM. as an international power management manufacturing services provider, has already taken action to meet the global new requirement. In tins paper, the research path and process improvement of green package manufacturing in GEM is presented, and the packaging trend of future high power and high thermal capability power management device is also discussed.","PeriodicalId":325619,"journal":{"name":"2007 8th International Conference on Electronic Packaging Technology","volume":"97 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122218181","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-08-01DOI: 10.1109/ICEPT.2007.4441573
Xiao-Feng Guo
This work reviews the LIP packaging application in the company of Huatian Technology.
本文综述了LIP包装在华天科技公司的应用情况。
{"title":"Independent Intellectual Property Product LIP Package of Huatian Technology","authors":"Xiao-Feng Guo","doi":"10.1109/ICEPT.2007.4441573","DOIUrl":"https://doi.org/10.1109/ICEPT.2007.4441573","url":null,"abstract":"This work reviews the LIP packaging application in the company of Huatian Technology.","PeriodicalId":325619,"journal":{"name":"2007 8th International Conference on Electronic Packaging Technology","volume":"45 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116921859","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-08-01DOI: 10.1109/ICEPT.2007.4441396
R. Guan
Silicon pressure sensors which are based on piezoresistive effect are in use for many fields, because of their high performance and productivity. However, when work environment temperature is over 125degC, silicon piezoresistive pressure sensors have not been used because of worse temperature performance. SOI piezoresistor pressure chip has better temperature performance than silicon pressure sensor and has evidence advantage in aspects of resisting temperature, radiation and corrosion. The SOI pressure sensor of beam-diaphragm packaging structure which can resist high temperature of 250degC has been developed and its packaging process is analyzed in the paper.
{"title":"Die Bonding Process Research for SOI Membrane Pressure Sensor","authors":"R. Guan","doi":"10.1109/ICEPT.2007.4441396","DOIUrl":"https://doi.org/10.1109/ICEPT.2007.4441396","url":null,"abstract":"Silicon pressure sensors which are based on piezoresistive effect are in use for many fields, because of their high performance and productivity. However, when work environment temperature is over 125degC, silicon piezoresistive pressure sensors have not been used because of worse temperature performance. SOI piezoresistor pressure chip has better temperature performance than silicon pressure sensor and has evidence advantage in aspects of resisting temperature, radiation and corrosion. The SOI pressure sensor of beam-diaphragm packaging structure which can resist high temperature of 250degC has been developed and its packaging process is analyzed in the paper.","PeriodicalId":325619,"journal":{"name":"2007 8th International Conference on Electronic Packaging Technology","volume":"40 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132589049","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-08-01DOI: 10.1109/ICEPT.2007.4441425
Hongwen He, Guangchen Xu, H. Hao, F. Guo
Electromigration is one of the severe reliability problems in IC progress. In this paper, the electromigration of eutectic Sn3.8Ag0.7Cu solder reaction couples were studied under high temperature (150degC) and high current density (5times103 A/cm2) in three days. An original design which could reduce the local Joule heating caused by current crowding was produced. Voltage change was also monitored during this experiment. Hillocks and valleys were found at the anode side and cathode side respectively. Unlike aging test, electromigration could promote the formation of intermetallic compound (IMC) at cathode side and inhibit the formation of IMC at anode side. Cracks also appeared along the cathode side after electromigration in three days, but they were not leading the solder reaction couple to failure.
{"title":"Electromigration in Lead-Free Sn3.8Ag0.7Cu Solder Reaction Couple","authors":"Hongwen He, Guangchen Xu, H. Hao, F. Guo","doi":"10.1109/ICEPT.2007.4441425","DOIUrl":"https://doi.org/10.1109/ICEPT.2007.4441425","url":null,"abstract":"Electromigration is one of the severe reliability problems in IC progress. In this paper, the electromigration of eutectic Sn3.8Ag0.7Cu solder reaction couples were studied under high temperature (150degC) and high current density (5times103 A/cm2) in three days. An original design which could reduce the local Joule heating caused by current crowding was produced. Voltage change was also monitored during this experiment. Hillocks and valleys were found at the anode side and cathode side respectively. Unlike aging test, electromigration could promote the formation of intermetallic compound (IMC) at cathode side and inhibit the formation of IMC at anode side. Cracks also appeared along the cathode side after electromigration in three days, but they were not leading the solder reaction couple to failure.","PeriodicalId":325619,"journal":{"name":"2007 8th International Conference on Electronic Packaging Technology","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128452468","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-08-01DOI: 10.1109/ICEPT.2007.4441377
Xiaogang Li, Jian Cai, Y. Sohn, Qian Wang, Woon-Bae Kim, Shuidi Wang
Different metallization systems and bonding designs of Ag-Sn bonding were investigated to achieve good bonding. The bonding strength was evaluated by shear force. The microstructure of bonding interface was inspected by scanning electronic microscopy and ED AX. Shear force test was performed for as-bonded dice. The test results indicate differences among different metallization systems. The bonding pair with Ti/Au as the UBM has a quite low shear strength because of the bad adhesion on the silicon substrate. The bonding pair of Ti/Ni/Sn/Au and Ti/Ni/Au/Ag obviously has higher shear strength than that of Ti/Ni/Sn/Au and Ti/Ni/Au/Ag/Au. The former is 55.17 MPa on average while the later is 36.05 MPa. The shear strength of the pair of Ti/Ni/Sn/Au and Ti/Ni/Au/Ag is similar to that of Ti/Ni/Sn/Au and Ti/Ag which has the shear strength of 55.32 MPa on average. The Ni and Au in the Ag-Sn bonding system have significant effect on the microstructure of the bonding interface. The diffusion of Au into Sn is quicker than both Ag and Ni. The diffusion between Au and Sn would induce the obstacle of the inter-diffusion between Sn and Ag. Ni will also diffuse quickly into Sn and form Ni3Sn4. The existence of Ni in Sn will also influence the diffusion of Ag into Sn and make the bad wettability during bonding. After several metallization systems have been investigated, finally a uniform bonding layer has been achieved by excluding Ni and Au in the bonding system. The bonding interface is Ag3Sn layer dispersed with some pure Ag.
{"title":"Microstructure of Ag-Sn Bonding for MEMS Packaging","authors":"Xiaogang Li, Jian Cai, Y. Sohn, Qian Wang, Woon-Bae Kim, Shuidi Wang","doi":"10.1109/ICEPT.2007.4441377","DOIUrl":"https://doi.org/10.1109/ICEPT.2007.4441377","url":null,"abstract":"Different metallization systems and bonding designs of Ag-Sn bonding were investigated to achieve good bonding. The bonding strength was evaluated by shear force. The microstructure of bonding interface was inspected by scanning electronic microscopy and ED AX. Shear force test was performed for as-bonded dice. The test results indicate differences among different metallization systems. The bonding pair with Ti/Au as the UBM has a quite low shear strength because of the bad adhesion on the silicon substrate. The bonding pair of Ti/Ni/Sn/Au and Ti/Ni/Au/Ag obviously has higher shear strength than that of Ti/Ni/Sn/Au and Ti/Ni/Au/Ag/Au. The former is 55.17 MPa on average while the later is 36.05 MPa. The shear strength of the pair of Ti/Ni/Sn/Au and Ti/Ni/Au/Ag is similar to that of Ti/Ni/Sn/Au and Ti/Ag which has the shear strength of 55.32 MPa on average. The Ni and Au in the Ag-Sn bonding system have significant effect on the microstructure of the bonding interface. The diffusion of Au into Sn is quicker than both Ag and Ni. The diffusion between Au and Sn would induce the obstacle of the inter-diffusion between Sn and Ag. Ni will also diffuse quickly into Sn and form Ni3Sn4. The existence of Ni in Sn will also influence the diffusion of Ag into Sn and make the bad wettability during bonding. After several metallization systems have been investigated, finally a uniform bonding layer has been achieved by excluding Ni and Au in the bonding system. The bonding interface is Ag3Sn layer dispersed with some pure Ag.","PeriodicalId":325619,"journal":{"name":"2007 8th International Conference on Electronic Packaging Technology","volume":"39 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134041038","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-08-01DOI: 10.1109/ICEPT.2007.4441483
Ho-Yi Tsai, J. Huang, S. Chiu, C. Hsiao
In this paper, new molding underfill structure is proposed. It shows many advantages, including a) good package coplanarity b) lower bump stress c) lower 2nd level ball stress d) provide no limitation component design. Mold compound can hold big die and substrate together to keep good package coplanarity and give a uniform interface condition within big die area. Droping in heat spreader design gives the largest flexibility of die size and passive component size/number. Mold compound properties can be tailored to meet solder bump and low-K requirements. In addition, mold compound properties have high potential to meet Pb-free solder bump and low-K requirements. A high reliability, high thermal performance, and low package stress molding flip chip ball grid arrays structure is named terminator FCBGA. It has many benefits, like better coplanarity. high through put (multi pes per shut in molding process), low bump stress, and high thermal performance. In conventional flip chip structure, underfill dispenses and cure processes are a bottleneck due to low through put (dispensing unit by unit). For the high performance demand (high pin counts are necessary), large package/die size with more integrated functions needs to meet reliability criteria. Low k dielectric material, lead free bump especially and the package coplanarity are also challenges for package development. Besides, thermal performance is also a key concern with high power device. Low-k has become a hot topic as most 90nm devices and all 65nm devices utilize low-k dielectric. But low-k materials have very low mechanical strength compared to the traditional dielectric films due to their porous nature, which results in lower cohesive strength. Additionally, the tight bump pitch and low standoff height of future packages reduce the flow performance of conventional liquid capillary underfill (CUF) that results in low productivity (low unit per hour (UPH)) and low throughput. From simulation and reliability data, this new structure can provide strong bump protection and reach high reliability performance and can be applied for low-K chip and all kind of bump composition such as tin-lead, high lead, and lead free.
{"title":"High Performance Molding FCBGA Packaging Development","authors":"Ho-Yi Tsai, J. Huang, S. Chiu, C. Hsiao","doi":"10.1109/ICEPT.2007.4441483","DOIUrl":"https://doi.org/10.1109/ICEPT.2007.4441483","url":null,"abstract":"In this paper, new molding underfill structure is proposed. It shows many advantages, including a) good package coplanarity b) lower bump stress c) lower 2nd level ball stress d) provide no limitation component design. Mold compound can hold big die and substrate together to keep good package coplanarity and give a uniform interface condition within big die area. Droping in heat spreader design gives the largest flexibility of die size and passive component size/number. Mold compound properties can be tailored to meet solder bump and low-K requirements. In addition, mold compound properties have high potential to meet Pb-free solder bump and low-K requirements. A high reliability, high thermal performance, and low package stress molding flip chip ball grid arrays structure is named terminator FCBGA. It has many benefits, like better coplanarity. high through put (multi pes per shut in molding process), low bump stress, and high thermal performance. In conventional flip chip structure, underfill dispenses and cure processes are a bottleneck due to low through put (dispensing unit by unit). For the high performance demand (high pin counts are necessary), large package/die size with more integrated functions needs to meet reliability criteria. Low k dielectric material, lead free bump especially and the package coplanarity are also challenges for package development. Besides, thermal performance is also a key concern with high power device. Low-k has become a hot topic as most 90nm devices and all 65nm devices utilize low-k dielectric. But low-k materials have very low mechanical strength compared to the traditional dielectric films due to their porous nature, which results in lower cohesive strength. Additionally, the tight bump pitch and low standoff height of future packages reduce the flow performance of conventional liquid capillary underfill (CUF) that results in low productivity (low unit per hour (UPH)) and low throughput. From simulation and reliability data, this new structure can provide strong bump protection and reach high reliability performance and can be applied for low-K chip and all kind of bump composition such as tin-lead, high lead, and lead free.","PeriodicalId":325619,"journal":{"name":"2007 8th International Conference on Electronic Packaging Technology","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133256273","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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