Pub Date : 2019-02-01DOI: 10.1109/KBEI.2019.8735020
S. Mahdavi, F. Noruzpur, Shahram Esmaeilie, Amin Sadeghi, Arvin Mohammady
This work describes a novel high-speed, high-gain and low-noise CMOS operational amplifier with interior CMFB for high-speed applications. In the proposed structure, the design employs an auxiliary interior CMFB technique to enhance the effective transconductance and hence achieves high gain and high unity-gain bandwidth (UGB), as well. Meanwhile, all the transistors are biased to operate in sub-threshold region to decrease power consumption. Applying the proposed idea, the AC response of the amplifier shows the 88.42dB Dc gain and Unity-Gain Bandwidth (UGB) of 1.45 GHz and the phase margin of 78.2°, respectively. The output and input referred noise plot gives a peak value of 1.83pV/√Hz and 81nV/√Hz, respectively. It is notable that, the noise analysis has been performed with a 6mV signal applied at the input nodes. To measure the ICMR, the DC transfer characteristic of the proposed amplifier is simulated by setting up the amplifier in a unity-gain, non-inverting configuration with a 1.8V supply. The DC transfer characteristic almost rail-to-rail ICMR, from 421µV to 1.756V, as well. Meanwhile, at the 1.8volts power supply and load capacitance of 1pF, the overall power consumed by instrumentation amplifier is 1.39mW. The layout of the proposed amplifier is designed by using the Cadence Virtuoso, the amplifier core occupies an active area of the only 36.05μm×13.40μm (0.483mm2). The simulation results of the proposed amplifier is performed by HSPICE using the BSIM3 model of a 180nm CMOS technology.
{"title":"A Novel High-Speed High-Gain and Low-Noise CMOS Amplifier in 0.18µm Process","authors":"S. Mahdavi, F. Noruzpur, Shahram Esmaeilie, Amin Sadeghi, Arvin Mohammady","doi":"10.1109/KBEI.2019.8735020","DOIUrl":"https://doi.org/10.1109/KBEI.2019.8735020","url":null,"abstract":"This work describes a novel high-speed, high-gain and low-noise CMOS operational amplifier with interior CMFB for high-speed applications. In the proposed structure, the design employs an auxiliary interior CMFB technique to enhance the effective transconductance and hence achieves high gain and high unity-gain bandwidth (UGB), as well. Meanwhile, all the transistors are biased to operate in sub-threshold region to decrease power consumption. Applying the proposed idea, the AC response of the amplifier shows the 88.42dB Dc gain and Unity-Gain Bandwidth (UGB) of 1.45 GHz and the phase margin of 78.2°, respectively. The output and input referred noise plot gives a peak value of 1.83pV/√Hz and 81nV/√Hz, respectively. It is notable that, the noise analysis has been performed with a 6mV signal applied at the input nodes. To measure the ICMR, the DC transfer characteristic of the proposed amplifier is simulated by setting up the amplifier in a unity-gain, non-inverting configuration with a 1.8V supply. The DC transfer characteristic almost rail-to-rail ICMR, from 421µV to 1.756V, as well. Meanwhile, at the 1.8volts power supply and load capacitance of 1pF, the overall power consumed by instrumentation amplifier is 1.39mW. The layout of the proposed amplifier is designed by using the Cadence Virtuoso, the amplifier core occupies an active area of the only 36.05μm×13.40μm (0.483mm2). The simulation results of the proposed amplifier is performed by HSPICE using the BSIM3 model of a 180nm CMOS technology.","PeriodicalId":339990,"journal":{"name":"2019 5th Conference on Knowledge Based Engineering and Innovation (KBEI)","volume":"29 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131540268","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2019-02-01DOI: 10.1109/KBEI.2019.8735098
J. Vahidi, Maral Rahmati
Cloud computing system due to Pay-Per-Use Model has been popular among Cloud resource users. However, large volume of resource and requests from users have made the issue of resource allocation challenging in this kind of system. Therefore, the present paper aims to recognize the role of innovative Grasshopper Optimization Algorithm (GOA) and strongly highlights the significance of such an algorithm for optimized resource allocation in a Cloud computing environment. To do so, the proposed algorithm (i.e., GOA) was simulated with MATLAB and eight datasets were used. Moreover, GOA was compared with GA and SEIRA algorithms in order to have precise evaluation of its performance. Results strongly acknowledged the application of the proposed GOA and highlighted its high ability to solve the resource allocation problem in Cloud computing. Findings also revealed that the functions designed for the basic operators of the GOA could appropriately look into the space of the problem response, resulting in optimization of the discovered responses, and finally providing opportunities to obtain an acceptable response regarding the allocation problem. It was undeniably recommended that other optimization algorithms can be investigated and compared with GOA in order for the users and service providers to be armed with practical solutions concerning the resource allocation problem.
{"title":"Optimization of Resource Allocation in Cloud Computing by Grasshopper Optimization Algorithm","authors":"J. Vahidi, Maral Rahmati","doi":"10.1109/KBEI.2019.8735098","DOIUrl":"https://doi.org/10.1109/KBEI.2019.8735098","url":null,"abstract":"Cloud computing system due to Pay-Per-Use Model has been popular among Cloud resource users. However, large volume of resource and requests from users have made the issue of resource allocation challenging in this kind of system. Therefore, the present paper aims to recognize the role of innovative Grasshopper Optimization Algorithm (GOA) and strongly highlights the significance of such an algorithm for optimized resource allocation in a Cloud computing environment. To do so, the proposed algorithm (i.e., GOA) was simulated with MATLAB and eight datasets were used. Moreover, GOA was compared with GA and SEIRA algorithms in order to have precise evaluation of its performance. Results strongly acknowledged the application of the proposed GOA and highlighted its high ability to solve the resource allocation problem in Cloud computing. Findings also revealed that the functions designed for the basic operators of the GOA could appropriately look into the space of the problem response, resulting in optimization of the discovered responses, and finally providing opportunities to obtain an acceptable response regarding the allocation problem. It was undeniably recommended that other optimization algorithms can be investigated and compared with GOA in order for the users and service providers to be armed with practical solutions concerning the resource allocation problem.","PeriodicalId":339990,"journal":{"name":"2019 5th Conference on Knowledge Based Engineering and Innovation (KBEI)","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122201141","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2019-02-01DOI: 10.1109/KBEI.2019.8734978
Sanaz Tavakoli-Someh, Mohammad Hossein Rezvani
Network functions virtualization (NFVs) is a paradigm shift in order to integrate network functions (NFs). Moreover, Virtual Network Functions (VNFs) can easily be transferred from one device to another without the need for a new special hardware installation. On the other hand, VNF placement (VNF-P) is proved to be NP-hard. In this paper we present a multi-objective meta-heuristic solution using the NSGA-II algorithm for the VNF-P problem. The goal of our algorithm is to place VNFs corresponding to different service chains onto physical hosts, in such a way that could increase the physical resource utilization, and reduce the number of used (active) physical hosts. The simulation results using the well-known CloudSim framework show robustness of the proposed method in terms of criteria such as resource utilization, number of used physical hosts and so on.
{"title":"Utilization-aware Virtual Network Function Placement Using NSGA-II Evolutionary Computing","authors":"Sanaz Tavakoli-Someh, Mohammad Hossein Rezvani","doi":"10.1109/KBEI.2019.8734978","DOIUrl":"https://doi.org/10.1109/KBEI.2019.8734978","url":null,"abstract":"Network functions virtualization (NFVs) is a paradigm shift in order to integrate network functions (NFs). Moreover, Virtual Network Functions (VNFs) can easily be transferred from one device to another without the need for a new special hardware installation. On the other hand, VNF placement (VNF-P) is proved to be NP-hard. In this paper we present a multi-objective meta-heuristic solution using the NSGA-II algorithm for the VNF-P problem. The goal of our algorithm is to place VNFs corresponding to different service chains onto physical hosts, in such a way that could increase the physical resource utilization, and reduce the number of used (active) physical hosts. The simulation results using the well-known CloudSim framework show robustness of the proposed method in terms of criteria such as resource utilization, number of used physical hosts and so on.","PeriodicalId":339990,"journal":{"name":"2019 5th Conference on Knowledge Based Engineering and Innovation (KBEI)","volume":"74 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115032318","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2019-02-01DOI: 10.1109/KBEI.2019.8735053
Mohammad Ghanatian, S. Taghvaei, S. Haghpanah
Pipettes are tools that are used for transporting a measured volume of liquid and they are widely used in laboratories. Pipettes have a disposable tip that is called "pipette tip". A huge number of these pipette tips are kept in a container called "rack". Putting the pipette tips in a rack is a task done several times a day by lab technicians and each time 96 pipette tips should be placed in a rack. As this task is very boring and repetitive, engineers wondered if they can design a mechanized device for doing this chore. This research will describe the design of a one degree of freedom mechanism for sorting and finally filling pipette tips in racks. Since one degree of freedom mechanisms can operate with a single ordinary motor, the mechanism designed in this research has the benefits of high simplicity and low manufacturing cost. After putting the pipette tips in this mechanism and also placing a rack in its specified position and following this, activating the motor, the lab technician can get the rack while the pipette tips are placed in their particular positions.
{"title":"Design of a mechanism for sorting and filling of pipette tips into racks","authors":"Mohammad Ghanatian, S. Taghvaei, S. Haghpanah","doi":"10.1109/KBEI.2019.8735053","DOIUrl":"https://doi.org/10.1109/KBEI.2019.8735053","url":null,"abstract":"Pipettes are tools that are used for transporting a measured volume of liquid and they are widely used in laboratories. Pipettes have a disposable tip that is called \"pipette tip\". A huge number of these pipette tips are kept in a container called \"rack\". Putting the pipette tips in a rack is a task done several times a day by lab technicians and each time 96 pipette tips should be placed in a rack. As this task is very boring and repetitive, engineers wondered if they can design a mechanized device for doing this chore. This research will describe the design of a one degree of freedom mechanism for sorting and finally filling pipette tips in racks. Since one degree of freedom mechanisms can operate with a single ordinary motor, the mechanism designed in this research has the benefits of high simplicity and low manufacturing cost. After putting the pipette tips in this mechanism and also placing a rack in its specified position and following this, activating the motor, the lab technician can get the rack while the pipette tips are placed in their particular positions.","PeriodicalId":339990,"journal":{"name":"2019 5th Conference on Knowledge Based Engineering and Innovation (KBEI)","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115037601","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2019-02-01DOI: 10.1109/KBEI.2019.8735034
Maryam Yalsavar, Yasaman Salmanpour, Mojtaba Hajihosseini, P. Karimaghaee
The considerable advances in semi-conductors technology and emergence of power transistors with high voltage, switching and frequency has led to optimizing the efficiency of power electronic converters and increasing their applications. Inverter is one of the most common converters which can convert DC to AC. Inverters play an important role in industrial applications such as electrical vehicles, piezoelectric operation, motors and renewable energy systems. This suggests the importance of inverter parameters such as high frequency, power and safety factor. In this research, a modular inverter with high frequency and power and the capability to determine the type of output (complete sine or square) and select the inverter phase (single phase or 3 phase) was designed and then laboratorial implementation was used to verify its validity.
{"title":"Design and Manufacturing Modular Inverter with High Power and Frequency for Increasing Safety Factor in Industrial Applications","authors":"Maryam Yalsavar, Yasaman Salmanpour, Mojtaba Hajihosseini, P. Karimaghaee","doi":"10.1109/KBEI.2019.8735034","DOIUrl":"https://doi.org/10.1109/KBEI.2019.8735034","url":null,"abstract":"The considerable advances in semi-conductors technology and emergence of power transistors with high voltage, switching and frequency has led to optimizing the efficiency of power electronic converters and increasing their applications. Inverter is one of the most common converters which can convert DC to AC. Inverters play an important role in industrial applications such as electrical vehicles, piezoelectric operation, motors and renewable energy systems. This suggests the importance of inverter parameters such as high frequency, power and safety factor. In this research, a modular inverter with high frequency and power and the capability to determine the type of output (complete sine or square) and select the inverter phase (single phase or 3 phase) was designed and then laboratorial implementation was used to verify its validity.","PeriodicalId":339990,"journal":{"name":"2019 5th Conference on Knowledge Based Engineering and Innovation (KBEI)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129878802","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
This study deals with image based visual servoing (IBVS) of robot manipulators in the presence of uncertainties. The proposed control technique is composed of a pre-compensated term, proportional-derivative (PD) controller and a sliding mode controller (SMC) to reach fast, accurate and robust motions. Practical stability of the closed-loop system is guaranteed by using Lyapunov method. Simulation results are used to demonstrate the effectiveness of the proposed controller in the normal and uncertain conditions.
{"title":"Pre-Compensated Proportional Derivative Sliding Mode Controller Design for Image Based Visual Servoing","authors":"Hamid NouriSola, Askar Azizi, Sajjad Shoja Majidabad","doi":"10.1109/KBEI.2019.8735049","DOIUrl":"https://doi.org/10.1109/KBEI.2019.8735049","url":null,"abstract":"This study deals with image based visual servoing (IBVS) of robot manipulators in the presence of uncertainties. The proposed control technique is composed of a pre-compensated term, proportional-derivative (PD) controller and a sliding mode controller (SMC) to reach fast, accurate and robust motions. Practical stability of the closed-loop system is guaranteed by using Lyapunov method. Simulation results are used to demonstrate the effectiveness of the proposed controller in the normal and uncertain conditions.","PeriodicalId":339990,"journal":{"name":"2019 5th Conference on Knowledge Based Engineering and Innovation (KBEI)","volume":"1922 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131644115","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2019-02-01DOI: 10.1109/KBEI.2019.8735097
Hamid NouriSola, Askar Azizi, S. Shoja-Majidabad
Translational Oscillator with a Rotational Actuator (TORA) system is known as a nonlinear benchmark with fourth-order dynamics. This system consists of an eccentric rotational proof-mass and a translational oscillator while they have nonlinear interactions together. This paper proposes an Output Feedback-Adaptive Sliding Mode Control (OFL-ASMC) for TORA as an underactuated system. The control law is constructed based on output feedback linearization and a sliding mode controller with an adaptive law. The most important characteristic of the proposed control scheme is its inherent robustness and ability to handle the nonlinear behavior of the system. The effectiveness of the designed control scheme for TORA system is verified by MATLAB/Simulink simulations.
{"title":"Output Feedback Linearization-Adaptive Sliding Mode Control of TORA System","authors":"Hamid NouriSola, Askar Azizi, S. Shoja-Majidabad","doi":"10.1109/KBEI.2019.8735097","DOIUrl":"https://doi.org/10.1109/KBEI.2019.8735097","url":null,"abstract":"Translational Oscillator with a Rotational Actuator (TORA) system is known as a nonlinear benchmark with fourth-order dynamics. This system consists of an eccentric rotational proof-mass and a translational oscillator while they have nonlinear interactions together. This paper proposes an Output Feedback-Adaptive Sliding Mode Control (OFL-ASMC) for TORA as an underactuated system. The control law is constructed based on output feedback linearization and a sliding mode controller with an adaptive law. The most important characteristic of the proposed control scheme is its inherent robustness and ability to handle the nonlinear behavior of the system. The effectiveness of the designed control scheme for TORA system is verified by MATLAB/Simulink simulations.","PeriodicalId":339990,"journal":{"name":"2019 5th Conference on Knowledge Based Engineering and Innovation (KBEI)","volume":"784 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133182178","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2019-02-01DOI: 10.1109/KBEI.2019.8735091
N. S. Shahraki, A. Mohammadi, Sadegh Mohammadi-Esfahrood, S. Zahiri
Low-Noise Amplifier (LNA) is the first critical component and an important part of the analog integrated systems and wireless communication technology. LNA plays a key role in the design of Radio Frequency (RF) circuits. High voltage gain, low power consumption, high bandwidth and low Noise Figure (NF) are among the most prominent characteristics of LNAs. In this paper, in order to establish an appropriate tradeoff between circuit contradictory objectives and overcoming the design problem of an efficient LNA, the approach is focused on utilizing metaheuristic optimization methods for elements intelligent sizing and circuit automatic design. For this purpose, the Computer-Aided Design (CAD) tool based on the new and powerful version of Multi-Objective Gray Wolf Optimization (MOGWO) has been used. Implementation of algorithms in Matlab and circuit simulations in Hspice has done. Simulation results, in contrast to other research, not only meet the design specifications, but also provide a variety of solutions under the "Pareto-optimality", which allows designers to have more design options. Also, the evaluations indicate the close competition between the proposed method and other commonly used methods.
{"title":"Improving the Performance of Analog Integrated Circuits using Multi-Objective Metaheuristic Algorithms","authors":"N. S. Shahraki, A. Mohammadi, Sadegh Mohammadi-Esfahrood, S. Zahiri","doi":"10.1109/KBEI.2019.8735091","DOIUrl":"https://doi.org/10.1109/KBEI.2019.8735091","url":null,"abstract":"Low-Noise Amplifier (LNA) is the first critical component and an important part of the analog integrated systems and wireless communication technology. LNA plays a key role in the design of Radio Frequency (RF) circuits. High voltage gain, low power consumption, high bandwidth and low Noise Figure (NF) are among the most prominent characteristics of LNAs. In this paper, in order to establish an appropriate tradeoff between circuit contradictory objectives and overcoming the design problem of an efficient LNA, the approach is focused on utilizing metaheuristic optimization methods for elements intelligent sizing and circuit automatic design. For this purpose, the Computer-Aided Design (CAD) tool based on the new and powerful version of Multi-Objective Gray Wolf Optimization (MOGWO) has been used. Implementation of algorithms in Matlab and circuit simulations in Hspice has done. Simulation results, in contrast to other research, not only meet the design specifications, but also provide a variety of solutions under the \"Pareto-optimality\", which allows designers to have more design options. Also, the evaluations indicate the close competition between the proposed method and other commonly used methods.","PeriodicalId":339990,"journal":{"name":"2019 5th Conference on Knowledge Based Engineering and Innovation (KBEI)","volume":"99 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130758613","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2019-02-01DOI: 10.1109/kbei.2019.8734957
{"title":"KBEI 2019 Technical and Executive_Committees","authors":"","doi":"10.1109/kbei.2019.8734957","DOIUrl":"https://doi.org/10.1109/kbei.2019.8734957","url":null,"abstract":"","PeriodicalId":339990,"journal":{"name":"2019 5th Conference on Knowledge Based Engineering and Innovation (KBEI)","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133538181","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2019-02-01DOI: 10.1109/KBEI.2019.8734997
Seyed Javad Vaez Jalali, A. Falahati
Social networks are a part of today's society. In such networks, privacy-preserving is considered as an important field since the user's identity is usually revealed by inference attacks. Within this context, security system designers use an isomorphic graph to stop attackers by editing nodes and links, so, the attackers cannot access to users' identities when the vertexes and links of the graph are converted into isomorphic parameters. The security system designers employ random links, clustering of the nodes, weight balancing, nodes addition or de-anonymization techniques (nodes labeling) to confuse malicious attackers. But, these techniques have many defects, such as the loss of information and the reduction of usefulness parameters that evaluate the final social network graph. This paper proposes a new method named as a splitting method where three techniques are proposed to improve mentioned parameters and in general, to improve further the network management.
{"title":"Increasing the Anonymity of a Social Network Based on Splitting Users into Constant Usefulness and Zero Information Loss","authors":"Seyed Javad Vaez Jalali, A. Falahati","doi":"10.1109/KBEI.2019.8734997","DOIUrl":"https://doi.org/10.1109/KBEI.2019.8734997","url":null,"abstract":"Social networks are a part of today's society. In such networks, privacy-preserving is considered as an important field since the user's identity is usually revealed by inference attacks. Within this context, security system designers use an isomorphic graph to stop attackers by editing nodes and links, so, the attackers cannot access to users' identities when the vertexes and links of the graph are converted into isomorphic parameters. The security system designers employ random links, clustering of the nodes, weight balancing, nodes addition or de-anonymization techniques (nodes labeling) to confuse malicious attackers. But, these techniques have many defects, such as the loss of information and the reduction of usefulness parameters that evaluate the final social network graph. This paper proposes a new method named as a splitting method where three techniques are proposed to improve mentioned parameters and in general, to improve further the network management.","PeriodicalId":339990,"journal":{"name":"2019 5th Conference on Knowledge Based Engineering and Innovation (KBEI)","volume":"37 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131968852","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
京公网安备 11010802042870号
京ICP备2023020795号-1
扫码关注我们
求助内容：
应助结果提醒方式：