Pub Date : 1992-05-04DOI: 10.1109/CMPEUR.1992.218404
I. Gaviotis, A. Hatzimanikatis, D. Christodoulakis
The combination of hypertext and distributed systems technologies enhances effectiveness in information management and dissemination. An architecture which integrates these technologies is presented, the issues that influenced its design are cited, and its realization is outlined. Easy and graceful integration of new applications in the framework is supported by the generic and extensible character of the architecture. The proposed architecture caters for activity; event-driven computations constantly cheek for the preservation of consistency and rigidly enforce the behavior specified by the application programmer. A production rule formalism is used to customize the structure of the hypergraph and define additional constraints on the semantics of the server operations.<>
{"title":"An architecture for active hypertext on distributed systems","authors":"I. Gaviotis, A. Hatzimanikatis, D. Christodoulakis","doi":"10.1109/CMPEUR.1992.218404","DOIUrl":"https://doi.org/10.1109/CMPEUR.1992.218404","url":null,"abstract":"The combination of hypertext and distributed systems technologies enhances effectiveness in information management and dissemination. An architecture which integrates these technologies is presented, the issues that influenced its design are cited, and its realization is outlined. Easy and graceful integration of new applications in the framework is supported by the generic and extensible character of the architecture. The proposed architecture caters for activity; event-driven computations constantly cheek for the preservation of consistency and rigidly enforce the behavior specified by the application programmer. A production rule formalism is used to customize the structure of the hypergraph and define additional constraints on the semantics of the server operations.<<ETX>>","PeriodicalId":390273,"journal":{"name":"CompEuro 1992 Proceedings Computer Systems and Software Engineering","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-05-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122598505","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1992-05-04DOI: 10.1109/CMPEUR.1992.218401
G. Yang
A new tool for modeling systems called bidirectional Petri nets (BPNs) is presented. It increases the degree of abstraction drastically, and makes it possible to model complicated systems concisely. The method uses a two-level system modeling technique. The first level has the responsibility for all basic transmissions, and the second level models the higher-level structure of the whole system. The abstraction process is demonstrated by means of an example. The queue migration algorithm for mutual exclusion in computer networks is chosen as an example.<>
{"title":"Distributed system modeling with bidirectional Petri nets","authors":"G. Yang","doi":"10.1109/CMPEUR.1992.218401","DOIUrl":"https://doi.org/10.1109/CMPEUR.1992.218401","url":null,"abstract":"A new tool for modeling systems called bidirectional Petri nets (BPNs) is presented. It increases the degree of abstraction drastically, and makes it possible to model complicated systems concisely. The method uses a two-level system modeling technique. The first level has the responsibility for all basic transmissions, and the second level models the higher-level structure of the whole system. The abstraction process is demonstrated by means of an example. The queue migration algorithm for mutual exclusion in computer networks is chosen as an example.<<ETX>>","PeriodicalId":390273,"journal":{"name":"CompEuro 1992 Proceedings Computer Systems and Software Engineering","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-05-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122839787","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1992-05-04DOI: 10.1109/CMPEUR.1992.218427
M. Massink, L. Rooijakkers
LOTOS is a formal description technique for specifying and analyzing distributed systems. It is shown that equational semantics can be given for a subset called Basic LOTOS. A method based on Boolean equations is used. The semantics are shown to be consistent and complete. The equations for Basic LOTOS are found to form a sufficient basis for writing elegant proofs in a transformational style, which has many advantages compared to the more informal style in which proofs are normally presented. An example of such a transformational proof is given.<>
{"title":"Equational semantics for Basic LOTOS and an example of its use in a transformational proof style","authors":"M. Massink, L. Rooijakkers","doi":"10.1109/CMPEUR.1992.218427","DOIUrl":"https://doi.org/10.1109/CMPEUR.1992.218427","url":null,"abstract":"LOTOS is a formal description technique for specifying and analyzing distributed systems. It is shown that equational semantics can be given for a subset called Basic LOTOS. A method based on Boolean equations is used. The semantics are shown to be consistent and complete. The equations for Basic LOTOS are found to form a sufficient basis for writing elegant proofs in a transformational style, which has many advantages compared to the more informal style in which proofs are normally presented. An example of such a transformational proof is given.<<ETX>>","PeriodicalId":390273,"journal":{"name":"CompEuro 1992 Proceedings Computer Systems and Software Engineering","volume":"57 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-05-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115315870","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1992-05-04DOI: 10.1109/CMPEUR.1992.218496
V. Dvorák
The minimum-cost ordered (binary) decision diagram (OBDD) (also a reduced OBDD or ROBDD) is a canonical representation for a logic function, given an ordering on its variables (R. Bryant, 1986). A new optimization technique is presented for suboptimal synthesis of ODDs of complete as well as partial multiple-output Boolean functions. The method is based on iterative decomposition. The central notion in this process is that of subfunctions, whereas in ODDs there are decision nodes. There is, however, 1:1 mapping between them: a level of decision nodes in the ODD corresponds to a set of subfunctions recognized in a corresponding decomposition step. The technique is computationally effective and deals with incomplete functions frequently used in practice. A small synthesis example is given to introduce a new technique for ROBDDs. The results and some experience with the optimization program are described.<>
{"title":"An optimization technique for ordered (binary) decision diagrams","authors":"V. Dvorák","doi":"10.1109/CMPEUR.1992.218496","DOIUrl":"https://doi.org/10.1109/CMPEUR.1992.218496","url":null,"abstract":"The minimum-cost ordered (binary) decision diagram (OBDD) (also a reduced OBDD or ROBDD) is a canonical representation for a logic function, given an ordering on its variables (R. Bryant, 1986). A new optimization technique is presented for suboptimal synthesis of ODDs of complete as well as partial multiple-output Boolean functions. The method is based on iterative decomposition. The central notion in this process is that of subfunctions, whereas in ODDs there are decision nodes. There is, however, 1:1 mapping between them: a level of decision nodes in the ODD corresponds to a set of subfunctions recognized in a corresponding decomposition step. The technique is computationally effective and deals with incomplete functions frequently used in practice. A small synthesis example is given to introduce a new technique for ROBDDs. The results and some experience with the optimization program are described.<<ETX>>","PeriodicalId":390273,"journal":{"name":"CompEuro 1992 Proceedings Computer Systems and Software Engineering","volume":"101 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-05-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116103609","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1992-05-04DOI: 10.1109/CMPEUR.1992.218487
T. A. Rotting, A. Gjelsvik
A dual dynamic programming (DDP) technique for staircase linear programs was applied to problems arising in multistage scheduling of hydroelectric power systems. The approach has some similarity to nested Benders' decompositions (J.F. Benders, 1962). The contribution is a computational strategy to arrange the iterations so as to improve convergence over the standard DDP approach. The application also favors use of relaxation in the subproblem, and this is discussed.<>
{"title":"Application of a dual dynamic programming algorithm to staircase linear programs arising in scheduling of hydro power plants","authors":"T. A. Rotting, A. Gjelsvik","doi":"10.1109/CMPEUR.1992.218487","DOIUrl":"https://doi.org/10.1109/CMPEUR.1992.218487","url":null,"abstract":"A dual dynamic programming (DDP) technique for staircase linear programs was applied to problems arising in multistage scheduling of hydroelectric power systems. The approach has some similarity to nested Benders' decompositions (J.F. Benders, 1962). The contribution is a computational strategy to arrange the iterations so as to improve convergence over the standard DDP approach. The application also favors use of relaxation in the subproblem, and this is discussed.<<ETX>>","PeriodicalId":390273,"journal":{"name":"CompEuro 1992 Proceedings Computer Systems and Software Engineering","volume":"70 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-05-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115104036","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1992-05-04DOI: 10.1109/CMPEUR.1992.218490
A. De Gloria, P. Faraboschi
While very long instruction word (VLIW) architectures permit static extraction of a valuable amount of concurrency, their major drawback lies in the considerable code memory size requirements, due to the horizontal nature of the instruction set. To overcome this inefficiency, the authors propose a programmable instruction format extension, where the compiler is responsible for the choice of the best combinations of operations which are allowed to be concurrently executed. This results in a substantial saving of instruction bits, at the only expense of some additional memory for decoding circuitry. An applicative example on a sample architecture shows how performance decay is strongly limited also when the instruction width is reduced by a factor of three.<>
{"title":"A programmable instruction format extension to VLIW architectures","authors":"A. De Gloria, P. Faraboschi","doi":"10.1109/CMPEUR.1992.218490","DOIUrl":"https://doi.org/10.1109/CMPEUR.1992.218490","url":null,"abstract":"While very long instruction word (VLIW) architectures permit static extraction of a valuable amount of concurrency, their major drawback lies in the considerable code memory size requirements, due to the horizontal nature of the instruction set. To overcome this inefficiency, the authors propose a programmable instruction format extension, where the compiler is responsible for the choice of the best combinations of operations which are allowed to be concurrently executed. This results in a substantial saving of instruction bits, at the only expense of some additional memory for decoding circuitry. An applicative example on a sample architecture shows how performance decay is strongly limited also when the instruction width is reduced by a factor of three.<<ETX>>","PeriodicalId":390273,"journal":{"name":"CompEuro 1992 Proceedings Computer Systems and Software Engineering","volume":"121 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-05-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122639829","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1992-05-04DOI: 10.1109/CMPEUR.1992.218468
M. Guizani
The author presents a design prototype of a packet flow controller using optical interference filters. Optical bistable devices can be used to implement logic gates. Various design issues are discussed.<>
提出了一种基于光干涉滤光片的包流控制器的设计原型。光双稳器件可用于实现逻辑门。讨论了各种设计问题。
{"title":"Fast switching using nonlinear optics","authors":"M. Guizani","doi":"10.1109/CMPEUR.1992.218468","DOIUrl":"https://doi.org/10.1109/CMPEUR.1992.218468","url":null,"abstract":"The author presents a design prototype of a packet flow controller using optical interference filters. Optical bistable devices can be used to implement logic gates. Various design issues are discussed.<<ETX>>","PeriodicalId":390273,"journal":{"name":"CompEuro 1992 Proceedings Computer Systems and Software Engineering","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-05-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126917203","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1992-05-04DOI: 10.1109/CMPEUR.1992.218465
G. Klas
An approach for the hierarchical solution of large generalized stochastic Petri net models is presented. The method is based on the aggregation of submodels to substitute networks. The stochastic equivalence between these models is achieved by matching the flow time distributions of tokens in the submodel and in the aggregate net. This leads to a nonlinear optimization problem for finding the best aggregate net. As the main result, some insight is provided into the crucial point of estimating the parameters of a suitable aggregate net from a flow time distribution of the original net. The approach is demonstrated by means of an example.<>
{"title":"Net level aggregation using nonlinear optimization for the solution of hierarchical GSPN in performance evaluation","authors":"G. Klas","doi":"10.1109/CMPEUR.1992.218465","DOIUrl":"https://doi.org/10.1109/CMPEUR.1992.218465","url":null,"abstract":"An approach for the hierarchical solution of large generalized stochastic Petri net models is presented. The method is based on the aggregation of submodels to substitute networks. The stochastic equivalence between these models is achieved by matching the flow time distributions of tokens in the submodel and in the aggregate net. This leads to a nonlinear optimization problem for finding the best aggregate net. As the main result, some insight is provided into the crucial point of estimating the parameters of a suitable aggregate net from a flow time distribution of the original net. The approach is demonstrated by means of an example.<<ETX>>","PeriodicalId":390273,"journal":{"name":"CompEuro 1992 Proceedings Computer Systems and Software Engineering","volume":"98 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-05-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133364711","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1992-05-04DOI: 10.1109/CMPEUR.1992.218416
B. Gromoll
A general look at the development of cooling systems for multichip modules over the last few years reveals a clear increase in the levels of power dissipation. Heat transfer and cooling methods for multichip modules are considered. The extremely high demands placed on cooling systems are leading to increasingly cost-intensive technical solutions. Microcooling systems must be capable of integration in order to cool the 3D computer structures of the future. A microcooler produced in Si etched technology is presented as the foundation of this type of cooling system.<>
{"title":"Trends in cooling technology for high-density packaging","authors":"B. Gromoll","doi":"10.1109/CMPEUR.1992.218416","DOIUrl":"https://doi.org/10.1109/CMPEUR.1992.218416","url":null,"abstract":"A general look at the development of cooling systems for multichip modules over the last few years reveals a clear increase in the levels of power dissipation. Heat transfer and cooling methods for multichip modules are considered. The extremely high demands placed on cooling systems are leading to increasingly cost-intensive technical solutions. Microcooling systems must be capable of integration in order to cool the 3D computer structures of the future. A microcooler produced in Si etched technology is presented as the foundation of this type of cooling system.<<ETX>>","PeriodicalId":390273,"journal":{"name":"CompEuro 1992 Proceedings Computer Systems and Software Engineering","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-05-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131588207","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1992-05-04DOI: 10.1109/CMPEUR.1992.218407
S. Fujino
The effects of memory bank conflict on some typical vector supercomputers were investigated. The numerical experiments were carried out on the NEC SX-2, the Hitachi S-820/80, and the Fujitsu VP-2600/20 and in part on an NEC SX-3. The deterioration of performance due to memory bank conflict is studied, and a recipe is given for choosing the numbers of gridpoints in the x, y and z directions for efficiently solving a linear system of equations which arise from the discretization of the partial differential equations.<>
{"title":"Memory bank conflict on some vector supercomputers","authors":"S. Fujino","doi":"10.1109/CMPEUR.1992.218407","DOIUrl":"https://doi.org/10.1109/CMPEUR.1992.218407","url":null,"abstract":"The effects of memory bank conflict on some typical vector supercomputers were investigated. The numerical experiments were carried out on the NEC SX-2, the Hitachi S-820/80, and the Fujitsu VP-2600/20 and in part on an NEC SX-3. The deterioration of performance due to memory bank conflict is studied, and a recipe is given for choosing the numbers of gridpoints in the x, y and z directions for efficiently solving a linear system of equations which arise from the discretization of the partial differential equations.<<ETX>>","PeriodicalId":390273,"journal":{"name":"CompEuro 1992 Proceedings Computer Systems and Software Engineering","volume":"43 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-05-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123764588","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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