Pub Date : 2021-09-10DOI: 10.22068/IJEEE.17.3.1945
M. Mohiti, S. Sabzevari, P. Siano
Islanding detection is essential for reliable and safe operation of systems with distributed generations (DG). In systems with multiple DGs, the interaction between DGs can make the islanding detection process more challenging. To address this concern, this paper proposes a two-stage islanding detection method for power systems equipped with multiple-DGs through estimation of high frequency impedance (Zf) and determination of the total harmonic distortion (THD). The impedances of the DGs are estimated at distinct frequencies to avoid interval overlaps. The concept of different frequency bands makes the proposed method applicable to multiple DG systems. To evaluate the effectiveness of the proposed method, a test system with multiple DGs is simulated through several case studies in PSCAD/EMTDC. The simulation results demonstrate the accuracy of the proposed islanding detection method in both single and multi-DG systems. It is also shown that the proposed method remains robust under different operating conditions and events.
{"title":"Two-Stage Islanding Detection Method via High Frequency Impedance and Harmonic Distortion Evaluation in Multi-DG Networks","authors":"M. Mohiti, S. Sabzevari, P. Siano","doi":"10.22068/IJEEE.17.3.1945","DOIUrl":"https://doi.org/10.22068/IJEEE.17.3.1945","url":null,"abstract":"Islanding detection is essential for reliable and safe operation of systems with distributed generations (DG). In systems with multiple DGs, the interaction between DGs can make the islanding detection process more challenging. To address this concern, this paper proposes a two-stage islanding detection method for power systems equipped with multiple-DGs through estimation of high frequency impedance (Zf) and determination of the total harmonic distortion (THD). The impedances of the DGs are estimated at distinct frequencies to avoid interval overlaps. The concept of different frequency bands makes the proposed method applicable to multiple DG systems. To evaluate the effectiveness of the proposed method, a test system with multiple DGs is simulated through several case studies in PSCAD/EMTDC. The simulation results demonstrate the accuracy of the proposed islanding detection method in both single and multi-DG systems. It is also shown that the proposed method remains robust under different operating conditions and events.","PeriodicalId":39055,"journal":{"name":"Iranian Journal of Electrical and Electronic Engineering","volume":"17 1","pages":"1945-1945"},"PeriodicalIF":0.0,"publicationDate":"2021-09-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"41906774","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-09-10DOI: 10.22068/IJEEE.17.3.1965
F. Rezaee‐Alam, B. Rezaeealam, S. M. Moosavi
Poor modeling of air-gap is the main defect of conventional magnetic equivalent circuit (CMEC) model for performance analysis of electric machines. This paper presents an improved magnetic equivalent circuit (IMEC) which considers all components of air-gap permeance such as the mutual permeances between stator and rotor teeth, and the leakage permeances between adjacent stator teeth and adjacent rotor teeth in the air-gap. Since the conformal mapping (CM) method can accurately take into account the air-gap region, IMEC gets help from the CM method for calculating the air-gap permeance components. Therefore, the obtained model is a hybrid analytical model, which can accurately take into account the magnetic saturation in iron parts by using the CMEC, and the real paths of fringing flux, leakage flux, and the main flux in the air-gap by using the CM method. For a typical wound rotor induction motor, the accuracy of the results obtained by IMEC is verified by comparing them with the corresponding results determined through CMEC, improved conformal mapping (ICM), finite element method (FEM), and the experiment results.
{"title":"An Improved Magnetic Equivalent Circuit Model for Electromagnetic Modeling of Electric Machines","authors":"F. Rezaee‐Alam, B. Rezaeealam, S. M. Moosavi","doi":"10.22068/IJEEE.17.3.1965","DOIUrl":"https://doi.org/10.22068/IJEEE.17.3.1965","url":null,"abstract":"Poor modeling of air-gap is the main defect of conventional magnetic equivalent circuit (CMEC) model for performance analysis of electric machines. This paper presents an improved magnetic equivalent circuit (IMEC) which considers all components of air-gap permeance such as the mutual permeances between stator and rotor teeth, and the leakage permeances between adjacent stator teeth and adjacent rotor teeth in the air-gap. Since the conformal mapping (CM) method can accurately take into account the air-gap region, IMEC gets help from the CM method for calculating the air-gap permeance components. Therefore, the obtained model is a hybrid analytical model, which can accurately take into account the magnetic saturation in iron parts by using the CMEC, and the real paths of fringing flux, leakage flux, and the main flux in the air-gap by using the CM method. For a typical wound rotor induction motor, the accuracy of the results obtained by IMEC is verified by comparing them with the corresponding results determined through CMEC, improved conformal mapping (ICM), finite element method (FEM), and the experiment results.","PeriodicalId":39055,"journal":{"name":"Iranian Journal of Electrical and Electronic Engineering","volume":"17 1","pages":"1965-1965"},"PeriodicalIF":0.0,"publicationDate":"2021-09-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"49399066","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-09-10DOI: 10.22068/IJEEE.17.3.1722
M. A. Jirdehi, V. Sohrabi-Tabar
Control center of modern power system utilizes state estimation as an important function. In such structures, voltage phasor of buses is known as state variables that should be determined during operation. To specify the optimal operation of all components, an accurate estimation is required. Hence, various mathematical and heuristic methods can be applied for the mentioned goal. In this paper, an advanced power system state estimator is presented based on the adaptive neuro-fuzzy interface system. Indeed, this estimator uses advantages of both artificial neural networks and fuzzy method simultaneously. To analyze the operation of estimator, various scenarios are proposed including impact of load uncertainty and probability of false data injection as the important issues in the electrical energy networks. In this regard, the capability of false data detection and correction are also evaluated. Moreover, the operation of presented estimator is compared with artificial neural networks and weighted least square estimators. The results show that the adaptive neurofuzzy estimator overcomes the main drawbacks of the conventional methods such as accuracy and complexity as well as it is able to detect and correct the false data more precisely. Simulations are carried out on IEEE 14-bus and 30-bus test systems to demonstrate the effectiveness of the approach.
{"title":"State Estimation in Electric Power Systems Based on Adaptive Neuro-Fuzzy System Considering Load Uncertainty and False Data","authors":"M. A. Jirdehi, V. Sohrabi-Tabar","doi":"10.22068/IJEEE.17.3.1722","DOIUrl":"https://doi.org/10.22068/IJEEE.17.3.1722","url":null,"abstract":"Control center of modern power system utilizes state estimation as an important function. In such structures, voltage phasor of buses is known as state variables that should be determined during operation. To specify the optimal operation of all components, an accurate estimation is required. Hence, various mathematical and heuristic methods can be applied for the mentioned goal. In this paper, an advanced power system state estimator is presented based on the adaptive neuro-fuzzy interface system. Indeed, this estimator uses advantages of both artificial neural networks and fuzzy method simultaneously. To analyze the operation of estimator, various scenarios are proposed including impact of load uncertainty and probability of false data injection as the important issues in the electrical energy networks. In this regard, the capability of false data detection and correction are also evaluated. Moreover, the operation of presented estimator is compared with artificial neural networks and weighted least square estimators. The results show that the adaptive neurofuzzy estimator overcomes the main drawbacks of the conventional methods such as accuracy and complexity as well as it is able to detect and correct the false data more precisely. Simulations are carried out on IEEE 14-bus and 30-bus test systems to demonstrate the effectiveness of the approach.","PeriodicalId":39055,"journal":{"name":"Iranian Journal of Electrical and Electronic Engineering","volume":"17 1","pages":"1722-1722"},"PeriodicalIF":0.0,"publicationDate":"2021-09-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"49291583","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-09-10DOI: 10.22068/IJEEE.17.3.1626
Z. Najafniya, G. Karimi, M. Ranjbar
Neural synchronization is considered as a key role in several neurological diseases, such as Parkinson’s and Epilepsy’s disease. During these diseases, there is increased synchronization of massive numbers of neurons. In addition, evidences show that astrocytes modulate the synaptic interactions of the neuronal population. The Astrocyte is an important part of a neural network that can be involved in the desynchronization of the neuronal population. In this paper, we design a new analog neuromorphic circuit to implement the effect of astrocyte in the desynchronization of neural networks. The simulation results demonstrate that the astrocyte circuit as a feedback path can be desynchronized to a synchronized neural population. In this circuit, as a first step, the population of twenty neurons is synchronized with the same input currents. Next, by involving an astrocyte feedback circuit, the synchronization of the neural network is disturbed. Then, the neuronal population will be desynchronized. The proposed circuit is designed and simulated using HSPICE simulator in 0.35 μm standard CMOS technology.
{"title":"Role of Astrocyte in Desynchronization Analogue Neural Network","authors":"Z. Najafniya, G. Karimi, M. Ranjbar","doi":"10.22068/IJEEE.17.3.1626","DOIUrl":"https://doi.org/10.22068/IJEEE.17.3.1626","url":null,"abstract":"Neural synchronization is considered as a key role in several neurological diseases, such as Parkinson’s and Epilepsy’s disease. During these diseases, there is increased synchronization of massive numbers of neurons. In addition, evidences show that astrocytes modulate the synaptic interactions of the neuronal population. The Astrocyte is an important part of a neural network that can be involved in the desynchronization of the neuronal population. In this paper, we design a new analog neuromorphic circuit to implement the effect of astrocyte in the desynchronization of neural networks. The simulation results demonstrate that the astrocyte circuit as a feedback path can be desynchronized to a synchronized neural population. In this circuit, as a first step, the population of twenty neurons is synchronized with the same input currents. Next, by involving an astrocyte feedback circuit, the synchronization of the neural network is disturbed. Then, the neuronal population will be desynchronized. The proposed circuit is designed and simulated using HSPICE simulator in 0.35 μm standard CMOS technology.","PeriodicalId":39055,"journal":{"name":"Iranian Journal of Electrical and Electronic Engineering","volume":"17 1","pages":"1626-1626"},"PeriodicalIF":0.0,"publicationDate":"2021-09-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"41967423","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-09-10DOI: 10.22068/IJEEE.17.3.1857
S. Gudey, S. Andavarapu
A three-phase dual-port T-type asymmetrical multilevel inverter (ASMLI) using two sources, solar forming the high voltage level and the battery forming the low voltage level, is considered for grid interconnection. A vertical shifted SPWM is used for the ASMLI circuit. A transformerless system for grid interconnection is achieved for a 100-kW power range. A well-designed boost converter and a Buck/Boost converter is used on the front side of the inverter. Design of battery charge controller and its controlling logic are done and its SOC is found to be efficient during charging and discharging conditions. A closed-loop control using PQ theory is implemented for obtaining power balance at 0.7 modulation index. The THD of the current harmonics in the system is observed to be 0.01% and voltage harmonics is 0.029% which are well within the permissible limits of IEEE-519 standard. The power balance is found to be good between the inverter, load, and the grid during load disconnection for a period of 0.15s. A comparison of THD’s, voltage, current stresses on the switches, and conduction losses is also presented for a single-phase system with respect to a two-level inverter which shows improved efficiency and low THD. Hence this system can be proposed for use in grid interconnection with renewable energy sources.
{"title":"Grid Interconnection of Solar and Battery System Using an Asymmetrical T-Type Multilevel Inverter to improve Conversion Efficiency with Reduced THD","authors":"S. Gudey, S. Andavarapu","doi":"10.22068/IJEEE.17.3.1857","DOIUrl":"https://doi.org/10.22068/IJEEE.17.3.1857","url":null,"abstract":"A three-phase dual-port T-type asymmetrical multilevel inverter (ASMLI) using two sources, solar forming the high voltage level and the battery forming the low voltage level, is considered for grid interconnection. A vertical shifted SPWM is used for the ASMLI circuit. A transformerless system for grid interconnection is achieved for a 100-kW power range. A well-designed boost converter and a Buck/Boost converter is used on the front side of the inverter. Design of battery charge controller and its controlling logic are done and its SOC is found to be efficient during charging and discharging conditions. A closed-loop control using PQ theory is implemented for obtaining power balance at 0.7 modulation index. The THD of the current harmonics in the system is observed to be 0.01% and voltage harmonics is 0.029% which are well within the permissible limits of IEEE-519 standard. The power balance is found to be good between the inverter, load, and the grid during load disconnection for a period of 0.15s. A comparison of THD’s, voltage, current stresses on the switches, and conduction losses is also presented for a single-phase system with respect to a two-level inverter which shows improved efficiency and low THD. Hence this system can be proposed for use in grid interconnection with renewable energy sources.","PeriodicalId":39055,"journal":{"name":"Iranian Journal of Electrical and Electronic Engineering","volume":"17 1","pages":"1857-1857"},"PeriodicalIF":0.0,"publicationDate":"2021-09-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"45777169","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-09-10DOI: 10.22068/IJEEE.17.3.1914
G. Morankar
Tremendous developments in integrated circuit technology, wireless communication systems, and personal assistant devices have fuelled growth of Internet of Things (IoT) applications and smart cards. The security of these devices completely depends upon the generation of random and unpredictable digital data streams through random number generator. Low quality, low throughput, and high processing time are observed in software-based pseudo-random number generator due to interrelated data or programs and serial execution of codes respectively. In this paper, FPGA implementation of low power true random number generator through ring oscillator for IoT applications and smart cards is presented. Ring oscillators based on higher jitter and sampling techniques were exploited to present true random number generator. Further statistical parameters of the generated data streams are enhanced through feedback mechanism and post-processing technique. The presented true random number generator technique does not depend on the characteristics of a particular FPGA. The presented technique consumes low power, requires low hardware footprints and passes the entire National Institute of Standards & Technology (NIST) 800-22 statistical test suite. The presented low power and area true random number generator with enhanced security through post-processing unit may be applied for encryption/decryption of data in IoT and smart cards.
{"title":"Low Power True Random Number Generator through Ring Oscillator for IoT and Smart Card Applications","authors":"G. Morankar","doi":"10.22068/IJEEE.17.3.1914","DOIUrl":"https://doi.org/10.22068/IJEEE.17.3.1914","url":null,"abstract":"Tremendous developments in integrated circuit technology, wireless communication systems, and personal assistant devices have fuelled growth of Internet of Things (IoT) applications and smart cards. The security of these devices completely depends upon the generation of random and unpredictable digital data streams through random number generator. Low quality, low throughput, and high processing time are observed in software-based pseudo-random number generator due to interrelated data or programs and serial execution of codes respectively. In this paper, FPGA implementation of low power true random number generator through ring oscillator for IoT applications and smart cards is presented. Ring oscillators based on higher jitter and sampling techniques were exploited to present true random number generator. Further statistical parameters of the generated data streams are enhanced through feedback mechanism and post-processing technique. The presented true random number generator technique does not depend on the characteristics of a particular FPGA. The presented technique consumes low power, requires low hardware footprints and passes the entire National Institute of Standards & Technology (NIST) 800-22 statistical test suite. The presented low power and area true random number generator with enhanced security through post-processing unit may be applied for encryption/decryption of data in IoT and smart cards.","PeriodicalId":39055,"journal":{"name":"Iranian Journal of Electrical and Electronic Engineering","volume":"17 1","pages":"1914-1914"},"PeriodicalIF":0.0,"publicationDate":"2021-09-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"44811982","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-09-10DOI: 10.22068/IJEEE.17.3.1768
H. Shayeghi, Y. Hashemi
The main idea of this paper is proposing a model to develop generation units considering power system stability enhancement. The proposed model consists of two parts. In the first part, the indexes of generation expansion planning are ensured. Also, smallsignal stability indexes are processed in the second part of the model. Stability necessities of power network are supplied by applying a set of robustness and performance criteria of damping. Two parts of the model are formulated as two-objective function optimization that is solved by adaptive non-dominated sorting genetic method-III (ANSGM-III). For better decision-making of the final solution of generation units, a set of Pareto-points have been extracted by ANSGM-III. To select an optimal solution among Pareto-set, an analytical hierarchy style is employed. Two objective functions are compared and suitable weights are allocated. Numerical studies are carried out on two test systems, 68-bus and 118-bus power network. The values of generation expansion planning cost and system stability index have been studied in different cases and three different scenarios. Studies show that, for example, in the 68-bus system for the case of system load growth of 5%, the cost of generation expansion planning for the proposed model increased by 7.7% compared to the previous method due to stability modes consideration and the small-signal stability index has been improved by 6.7%. The proposed model is survived with the presence of a wide-area stabilizer (WAS) for damping of oscillations. The effect of WAS latency on expansion programs is evaluated with different amounts of delay times.
{"title":"Small-Signal Stability Constrained Model for Generation Development Program Considering Wide-Area Stabilizer","authors":"H. Shayeghi, Y. Hashemi","doi":"10.22068/IJEEE.17.3.1768","DOIUrl":"https://doi.org/10.22068/IJEEE.17.3.1768","url":null,"abstract":"The main idea of this paper is proposing a model to develop generation units considering power system stability enhancement. The proposed model consists of two parts. In the first part, the indexes of generation expansion planning are ensured. Also, smallsignal stability indexes are processed in the second part of the model. Stability necessities of power network are supplied by applying a set of robustness and performance criteria of damping. Two parts of the model are formulated as two-objective function optimization that is solved by adaptive non-dominated sorting genetic method-III (ANSGM-III). For better decision-making of the final solution of generation units, a set of Pareto-points have been extracted by ANSGM-III. To select an optimal solution among Pareto-set, an analytical hierarchy style is employed. Two objective functions are compared and suitable weights are allocated. Numerical studies are carried out on two test systems, 68-bus and 118-bus power network. The values of generation expansion planning cost and system stability index have been studied in different cases and three different scenarios. Studies show that, for example, in the 68-bus system for the case of system load growth of 5%, the cost of generation expansion planning for the proposed model increased by 7.7% compared to the previous method due to stability modes consideration and the small-signal stability index has been improved by 6.7%. The proposed model is survived with the presence of a wide-area stabilizer (WAS) for damping of oscillations. The effect of WAS latency on expansion programs is evaluated with different amounts of delay times.","PeriodicalId":39055,"journal":{"name":"Iranian Journal of Electrical and Electronic Engineering","volume":"17 1","pages":"1768-1768"},"PeriodicalIF":0.0,"publicationDate":"2021-09-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"47138247","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-06-10DOI: 10.22068/IJEEE.17.2.1862
H. Shayeghi, S. Pourjafar, F. Sedaghati
This work introduces a new non-isolated buck-boost DC-DC converter. Interleaved configuration of the suggested structure increases the voltage conversion ratio. The voltage rate of the suggested converter can be stepped-up and stepped down for lower values of duty-cycle, which causes to decrease in the conduction losses of the system. The voltage conversion ratio of the recommended structure is provided with low maximum voltage throughout the semiconductor elements. Additionally, utilizing only one power switch facilitates converter control. Using a single power MOSFET with small conducting resistance, RDS-ON, increases the overall efficiency of the recommended topology. To verify the performance of the presented converter, technical description, mathematical survey, and comparison investigation with similar structures are provided in the literature. Finally, a laboratory scheme with a 100W load power rate at 50 kHz switching frequency is carried out to demonstrate the effectiveness of the proposed converter.
{"title":"A Buck-Boost Converter; Design, Analysis and Implementation Suggested for Renewable Energy Systems","authors":"H. Shayeghi, S. Pourjafar, F. Sedaghati","doi":"10.22068/IJEEE.17.2.1862","DOIUrl":"https://doi.org/10.22068/IJEEE.17.2.1862","url":null,"abstract":"This work introduces a new non-isolated buck-boost DC-DC converter. Interleaved configuration of the suggested structure increases the voltage conversion ratio. The voltage rate of the suggested converter can be stepped-up and stepped down for lower values of duty-cycle, which causes to decrease in the conduction losses of the system. The voltage conversion ratio of the recommended structure is provided with low maximum voltage throughout the semiconductor elements. Additionally, utilizing only one power switch facilitates converter control. Using a single power MOSFET with small conducting resistance, RDS-ON, increases the overall efficiency of the recommended topology. To verify the performance of the presented converter, technical description, mathematical survey, and comparison investigation with similar structures are provided in the literature. Finally, a laboratory scheme with a 100W load power rate at 50 kHz switching frequency is carried out to demonstrate the effectiveness of the proposed converter.","PeriodicalId":39055,"journal":{"name":"Iranian Journal of Electrical and Electronic Engineering","volume":"17 1","pages":"1862-1862"},"PeriodicalIF":0.0,"publicationDate":"2021-06-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"46660917","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-06-10DOI: 10.22068/IJEEE.17.2.1818
F. Askari, A. Khoshkholgh
The battery of electric vehicles (EV) can be charged from the power grid or discharged back to it. Parking lots can aggregate hundreds of EVs which makes them a significant and flexible load/generation component in the grid. In a smart grid environment, the smart parking lot (SPL) can benefit from the situation of the simultaneous connection to the EVs and power grid. This paper proposes a new algorithm to maximize SPL profit from participation in the forward and spot markets. Monte-Carlo simulation is used to determine the participation of the SPL in the forward market. Then an economic model is proposed to optimize the charging or discharging time table of EVs at any hours of a day and SPL participation in the spot market in a way that maximum SPL profit and satisfaction of EV owners can be gained. The Genetic Algorithm (GA) is used to solve this optimization problem.
{"title":"Economical Modeling for Managing the Power Transaction of EVs and Power Market in Smart Parking Lots","authors":"F. Askari, A. Khoshkholgh","doi":"10.22068/IJEEE.17.2.1818","DOIUrl":"https://doi.org/10.22068/IJEEE.17.2.1818","url":null,"abstract":"The battery of electric vehicles (EV) can be charged from the power grid or discharged back to it. Parking lots can aggregate hundreds of EVs which makes them a significant and flexible load/generation component in the grid. In a smart grid environment, the smart parking lot (SPL) can benefit from the situation of the simultaneous connection to the EVs and power grid. This paper proposes a new algorithm to maximize SPL profit from participation in the forward and spot markets. Monte-Carlo simulation is used to determine the participation of the SPL in the forward market. Then an economic model is proposed to optimize the charging or discharging time table of EVs at any hours of a day and SPL participation in the spot market in a way that maximum SPL profit and satisfaction of EV owners can be gained. The Genetic Algorithm (GA) is used to solve this optimization problem.","PeriodicalId":39055,"journal":{"name":"Iranian Journal of Electrical and Electronic Engineering","volume":"17 1","pages":"1818-1818"},"PeriodicalIF":0.0,"publicationDate":"2021-06-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"43381232","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-06-10DOI: 10.22068/IJEEE.17.2.1377
M. Habibolahzadeh, A. Jalilian
Electric traction trains are huge non-linear single-phase loads influencing adversely on power quality parameters on the grid side. Hybrid power quality conditioner (HPQC) has been utilized to compensate current unbalance, harmonics, and low power factor in the co-phase traction system simultaneously. By incrementing the traction load, the rating of the HPQC increases and may constraints its application. In this paper, a C-type filter is designed to compensate for some part of the load reactive power while the HPQC compensates the remaining part of the load reactive power. Hence, the capacity of the HPQC is reduced in full compensation (FC) mode compared to the conventional configuration. The satisfactory performance of the HPQC is associated with its DC-link operating voltage. Therefore, the Genetic algorithm (G.A) is adopted to optimize the DClink voltage performance. Simulation verifications are performed to illustrate the usefulness of the proposed configuration. The simulation results show an 18.86% reduction in the rating of the HPQC with optimized DC-link voltage.
{"title":"Rating Reduction and Optimized DC-Link Voltage of the HPQC in Co-Phase Traction Power System","authors":"M. Habibolahzadeh, A. Jalilian","doi":"10.22068/IJEEE.17.2.1377","DOIUrl":"https://doi.org/10.22068/IJEEE.17.2.1377","url":null,"abstract":"Electric traction trains are huge non-linear single-phase loads influencing adversely on power quality parameters on the grid side. Hybrid power quality conditioner (HPQC) has been utilized to compensate current unbalance, harmonics, and low power factor in the co-phase traction system simultaneously. By incrementing the traction load, the rating of the HPQC increases and may constraints its application. In this paper, a C-type filter is designed to compensate for some part of the load reactive power while the HPQC compensates the remaining part of the load reactive power. Hence, the capacity of the HPQC is reduced in full compensation (FC) mode compared to the conventional configuration. The satisfactory performance of the HPQC is associated with its DC-link operating voltage. Therefore, the Genetic algorithm (G.A) is adopted to optimize the DClink voltage performance. Simulation verifications are performed to illustrate the usefulness of the proposed configuration. The simulation results show an 18.86% reduction in the rating of the HPQC with optimized DC-link voltage.","PeriodicalId":39055,"journal":{"name":"Iranian Journal of Electrical and Electronic Engineering","volume":"17 1","pages":"1377-1377"},"PeriodicalIF":0.0,"publicationDate":"2021-06-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"45155741","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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