Pub Date : 2021-12-10DOI: 10.22068/IJEEE.17.4.2024
A. Karimpour, A. Amani, M. Karimpour, M. Jalili
This paper studies the voltage regulation problem in DC microgrids in the presence of variable loads. DC microgrids generally include several Distributed Generation Units (DGUs), connected to electrical loads through DC power lines. The variable nature of loads at each spot, caused for example by moving electric vehicles, may cause voltage deregulation in the grid. To reduce this undesired effect, this study proposes an incentivebased load management strategy to balance the loads connected to the grid. The electricity price at each node of the grid is considered to be dependent on its voltage. This guide moving customers to connect to cheaper connection points, and ultimately results in even load distribution. Simulations show the improvement in the voltage regulation, power loss, and efficiency of the grid even when only a small portion of customers accept the proposed incentive.
{"title":"Enhancing Voltage Regulation in DC Microgrids Using a Price Incentive Load Management Approach","authors":"A. Karimpour, A. Amani, M. Karimpour, M. Jalili","doi":"10.22068/IJEEE.17.4.2024","DOIUrl":"https://doi.org/10.22068/IJEEE.17.4.2024","url":null,"abstract":"This paper studies the voltage regulation problem in DC microgrids in the presence of variable loads. DC microgrids generally include several Distributed Generation Units (DGUs), connected to electrical loads through DC power lines. The variable nature of loads at each spot, caused for example by moving electric vehicles, may cause voltage deregulation in the grid. To reduce this undesired effect, this study proposes an incentivebased load management strategy to balance the loads connected to the grid. The electricity price at each node of the grid is considered to be dependent on its voltage. This guide moving customers to connect to cheaper connection points, and ultimately results in even load distribution. Simulations show the improvement in the voltage regulation, power loss, and efficiency of the grid even when only a small portion of customers accept the proposed incentive.","PeriodicalId":39055,"journal":{"name":"Iranian Journal of Electrical and Electronic Engineering","volume":"17 1","pages":"2024-2024"},"PeriodicalIF":0.0,"publicationDate":"2021-12-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"49147630","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-12-10DOI: 10.22068/IJEEE.17.4.2036
S. A. Rahman, S. Birhan, E. Mitiku, G. T. Aduye, P. Somasundaram
Aim of this paper is to attain the highest voltage sag and swell compensation using a direct converter-based DVR topology. The projected DVR topology consists of a direct converter with bidirectional switches, a multi winding transformer with three primary windings and secondary winding and a series transformer. When voltage swell occurs in a phase, the same phase voltage can be utilized to mitigate the swell as huge voltage exists in the phase where swell has occurred. So it is possible to mitigate an infinite amount of swell. In all the DVR topologies, the converter is only used to synthesize the compensating voltage. The range of voltage sag mitigation depends upon the magnitude of input voltage available for the converter. If this input voltage of the direct converter is increased, then the range of voltage compensation could also be increased. Input voltage of the direct converter is increased using the multi winding transformer. The direct converter is synthesizing the compensating voltage. This compensating voltage is injected in series with the supply voltage through the series transformer and the sag is mitigated. In this proposed topology, the input voltage for the direct converter is increased by adding the three phase voltages using a multi winding transformer. Thus the voltage sag compensating range of this topology is increased to 68% and the swell compensating range is 500%. Ordinary PWM technique has been used to synthesize the PWM pulses for the direct converter and the THD of the compensated load voltage is less than 5%. This topology is simulated using MATLAB Simulink and the results are shown for authentication.
{"title":"A Novel DVR Topology to Compensate Voltage Swell, Sag, and Single-Phase Outage","authors":"S. A. Rahman, S. Birhan, E. Mitiku, G. T. Aduye, P. Somasundaram","doi":"10.22068/IJEEE.17.4.2036","DOIUrl":"https://doi.org/10.22068/IJEEE.17.4.2036","url":null,"abstract":"Aim of this paper is to attain the highest voltage sag and swell compensation using a direct converter-based DVR topology. The projected DVR topology consists of a direct converter with bidirectional switches, a multi winding transformer with three primary windings and secondary winding and a series transformer. When voltage swell occurs in a phase, the same phase voltage can be utilized to mitigate the swell as huge voltage exists in the phase where swell has occurred. So it is possible to mitigate an infinite amount of swell. In all the DVR topologies, the converter is only used to synthesize the compensating voltage. The range of voltage sag mitigation depends upon the magnitude of input voltage available for the converter. If this input voltage of the direct converter is increased, then the range of voltage compensation could also be increased. Input voltage of the direct converter is increased using the multi winding transformer. The direct converter is synthesizing the compensating voltage. This compensating voltage is injected in series with the supply voltage through the series transformer and the sag is mitigated. In this proposed topology, the input voltage for the direct converter is increased by adding the three phase voltages using a multi winding transformer. Thus the voltage sag compensating range of this topology is increased to 68% and the swell compensating range is 500%. Ordinary PWM technique has been used to synthesize the PWM pulses for the direct converter and the THD of the compensated load voltage is less than 5%. This topology is simulated using MATLAB Simulink and the results are shown for authentication.","PeriodicalId":39055,"journal":{"name":"Iranian Journal of Electrical and Electronic Engineering","volume":"17 1","pages":"2036-2036"},"PeriodicalIF":0.0,"publicationDate":"2021-12-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"42646066","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-12-10DOI: 10.22068/IJEEE.17.4.1931
M. Habibzadeh, S. M. Mirimani
The role of energy management in hybrid and electric vehicles (EVs) is an important concern to enhance operational performance and provide the defined efficiency targets in transportation. The power conversion stage as an interface between storage units and the DC-link of the three-phase inverter forms a major challenge in EVs. In this study, a control approach for DC-bus voltage, which utilizes a hybrid energy storage system (HESS) for EV applications, has been proposed. A high-energy-density battery pack and an ultracapacitor, which owns a high-power density, form the hybrid energy storage system. The proposed approach allows full utilization of the stored energy in the storage devices, and also adds a voltage boost feature to the DC-bus. In the proposed control structure, a motor drive based on SVM-DTC is used to track the flux and torque components using regulators with the space vector modulation. The optimal DC-bus voltage can be tracked by incorporating the motor drive stage with a HESS. This integration results in less processed power. This article presents the simulation results toward confirming and verifying the effectiveness of the proposed approach.
{"title":"A Novel Implementation of SVM-DTC: Integrated Control of IPM Motor and Hybrid Energy Storage System for Electric Vehicle Application","authors":"M. Habibzadeh, S. M. Mirimani","doi":"10.22068/IJEEE.17.4.1931","DOIUrl":"https://doi.org/10.22068/IJEEE.17.4.1931","url":null,"abstract":"The role of energy management in hybrid and electric vehicles (EVs) is an important concern to enhance operational performance and provide the defined efficiency targets in transportation. The power conversion stage as an interface between storage units and the DC-link of the three-phase inverter forms a major challenge in EVs. In this study, a control approach for DC-bus voltage, which utilizes a hybrid energy storage system (HESS) for EV applications, has been proposed. A high-energy-density battery pack and an ultracapacitor, which owns a high-power density, form the hybrid energy storage system. The proposed approach allows full utilization of the stored energy in the storage devices, and also adds a voltage boost feature to the DC-bus. In the proposed control structure, a motor drive based on SVM-DTC is used to track the flux and torque components using regulators with the space vector modulation. The optimal DC-bus voltage can be tracked by incorporating the motor drive stage with a HESS. This integration results in less processed power. This article presents the simulation results toward confirming and verifying the effectiveness of the proposed approach.","PeriodicalId":39055,"journal":{"name":"Iranian Journal of Electrical and Electronic Engineering","volume":"17 1","pages":"1931-1931"},"PeriodicalIF":0.0,"publicationDate":"2021-12-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"49053296","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-12-10DOI: 10.22068/IJEEE.17.4.1941
S. Akram, Rajesh Singh, A. Gehlot, A. Thakur
Waste management is crucial for maintaining the hygienic environment in urban cities. The establishment of a reliable and efficient IoT system for waste management is based on integrating low power and long-range transmission protocol. Low Power Wide Area Network (LPWAN) is specially designed for the aforementioned requirement of IoT. LoRa (Long Range) is an LPWAN transmission protocol that consumes low power for long-range transmission. In this study, we are implementing long-range (LoRa) communication and cloud applications for real-time monitoring of the bins. The customized sensor node and gateway node are specifically designed for sensing the level of bins using ultrasonic sensor and communicating it to the cloud via long-range and internet protocol connectivity. Blynk and cayenne are the two cloud-based applications for storing and monitoring the sensory data receiving from the gateway node over internet protocol (IP). The customization of nodes6 and utilization of two cloud-based apps are the unique features in this study. In the future, we will implement blockchain technology in the study for enabling a waste-to-model platform.
{"title":"Design and Implementation of a Wide Area Network Based Waste Management System Using Blynk and Cayenne Application","authors":"S. Akram, Rajesh Singh, A. Gehlot, A. Thakur","doi":"10.22068/IJEEE.17.4.1941","DOIUrl":"https://doi.org/10.22068/IJEEE.17.4.1941","url":null,"abstract":"Waste management is crucial for maintaining the hygienic environment in urban cities. The establishment of a reliable and efficient IoT system for waste management is based on integrating low power and long-range transmission protocol. Low Power Wide Area Network (LPWAN) is specially designed for the aforementioned requirement of IoT. LoRa (Long Range) is an LPWAN transmission protocol that consumes low power for long-range transmission. In this study, we are implementing long-range (LoRa) communication and cloud applications for real-time monitoring of the bins. The customized sensor node and gateway node are specifically designed for sensing the level of bins using ultrasonic sensor and communicating it to the cloud via long-range and internet protocol connectivity. Blynk and cayenne are the two cloud-based applications for storing and monitoring the sensory data receiving from the gateway node over internet protocol (IP). The customization of nodes6 and utilization of two cloud-based apps are the unique features in this study. In the future, we will implement blockchain technology in the study for enabling a waste-to-model platform.","PeriodicalId":39055,"journal":{"name":"Iranian Journal of Electrical and Electronic Engineering","volume":"17 1","pages":"1941-1941"},"PeriodicalIF":0.0,"publicationDate":"2021-12-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"42477993","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-12-10DOI: 10.22068/IJEEE.17.4.1912
F. Amiri, M. Moradi
In this paper, a coordinated control method for LFC and SMES systems based on a new robust controller is designed. The proposed controller is used to compensate for frequency deviations related to the power system, to prevent excessive power generation in conventional generators during load disturbances, and to reduce power fluctuations from wind power plants. The new robust controller does not require the measurement of all the power system states and it only uses the output feedback. It also has a higher degree of freedom than the conventional robust controllers (conventional output feedback) and thus it helps improve the system control. The proposed control method is highly robust against load and distributed generation resources (wind turbine) disturbances and it is also robust against the uncertainty of the power system parameters. The proposed method is compared under several scenarios with the coordinated control method for LFC and SMES systems based on Moth Swarm Algorithm-optimized PID controller, the LFC system based on Moth Swarm Algorithm-optimized PID controller with SMES, the coordinated control method for LFC and SMES systems based on Robust Model Predictive Control, and the LFC system based on optimized PID controller without SMES and it puts on satisfactory performance. The simulation was performed in MATLAB.
{"title":"Coordinated Control of LFC and SMES in the Power System Using a New Robust Controller","authors":"F. Amiri, M. Moradi","doi":"10.22068/IJEEE.17.4.1912","DOIUrl":"https://doi.org/10.22068/IJEEE.17.4.1912","url":null,"abstract":"In this paper, a coordinated control method for LFC and SMES systems based on a new robust controller is designed. The proposed controller is used to compensate for frequency deviations related to the power system, to prevent excessive power generation in conventional generators during load disturbances, and to reduce power fluctuations from wind power plants. The new robust controller does not require the measurement of all the power system states and it only uses the output feedback. It also has a higher degree of freedom than the conventional robust controllers (conventional output feedback) and thus it helps improve the system control. The proposed control method is highly robust against load and distributed generation resources (wind turbine) disturbances and it is also robust against the uncertainty of the power system parameters. The proposed method is compared under several scenarios with the coordinated control method for LFC and SMES systems based on Moth Swarm Algorithm-optimized PID controller, the LFC system based on Moth Swarm Algorithm-optimized PID controller with SMES, the coordinated control method for LFC and SMES systems based on Robust Model Predictive Control, and the LFC system based on optimized PID controller without SMES and it puts on satisfactory performance. The simulation was performed in MATLAB.","PeriodicalId":39055,"journal":{"name":"Iranian Journal of Electrical and Electronic Engineering","volume":"17 1","pages":"1912-1912"},"PeriodicalIF":0.0,"publicationDate":"2021-12-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"48590807","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-12-10DOI: 10.22068/IJEEE.17.4.1927
M. Ahmadinia, J. Sadeh
In this paper, an accurate fault location scheme based on phasor measurement unit (PMU) is proposed for shunt-compensated transmission lines. It is assumed that the voltage and current phasors on both sides of the shunt-compensated line have been provided by PMUs. In the proposed method, the faulted section is determined by presenting the absolute difference of positive(or negative-) sequence current angles index, firstly. After determining faulted section, the voltage phasor at the shunt-compensator terminal is estimated via the sound section. The faulted section can be assumed as a perfect transmission line that synchronized voltage and current phasors at one end and voltage phasor at the other end are available. Secondly, a new fault location algorithm is presented to locate the precise fault point in the faulted section. In this algorithm, the location of the fault and the fault resistance are calculated simultaneously by solving an optimization problem, utilizing the heuristic Particle Swarm Optimization (PSO) method. The simulation results in MATLAB/SIMULINK platform demonstrate the high performance of the proposed method in finding the fault location in shunt-compensated transmission lines. The proposed scheme has high accuracy for both symmetrical and asymmetrical fault types and high fault resistance.
{"title":"An Accurate PMU-Based Fault Location Scheme for Shunt-Compensated Transmission Lines","authors":"M. Ahmadinia, J. Sadeh","doi":"10.22068/IJEEE.17.4.1927","DOIUrl":"https://doi.org/10.22068/IJEEE.17.4.1927","url":null,"abstract":"In this paper, an accurate fault location scheme based on phasor measurement unit (PMU) is proposed for shunt-compensated transmission lines. It is assumed that the voltage and current phasors on both sides of the shunt-compensated line have been provided by PMUs. In the proposed method, the faulted section is determined by presenting the absolute difference of positive(or negative-) sequence current angles index, firstly. After determining faulted section, the voltage phasor at the shunt-compensator terminal is estimated via the sound section. The faulted section can be assumed as a perfect transmission line that synchronized voltage and current phasors at one end and voltage phasor at the other end are available. Secondly, a new fault location algorithm is presented to locate the precise fault point in the faulted section. In this algorithm, the location of the fault and the fault resistance are calculated simultaneously by solving an optimization problem, utilizing the heuristic Particle Swarm Optimization (PSO) method. The simulation results in MATLAB/SIMULINK platform demonstrate the high performance of the proposed method in finding the fault location in shunt-compensated transmission lines. The proposed scheme has high accuracy for both symmetrical and asymmetrical fault types and high fault resistance.","PeriodicalId":39055,"journal":{"name":"Iranian Journal of Electrical and Electronic Engineering","volume":"17 1","pages":"1927-1927"},"PeriodicalIF":0.0,"publicationDate":"2021-12-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"48225431","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-09-10DOI: 10.22068/IJEEE.17.3.1916
T. Agheb, I. Ahmadi, A. Zakariazadeh
Optimal placement and sizing of distributed renewable energy resources (DER) in distribution networks can remarkably influence voltage profile improvement, amending of congestions, increasing the reliability and emission reduction. However, there is a challenge with renewable resources due to the intermittent nature of their output power. This paper presents a new viewpoint at the uncertainties associated with output powers of wind turbines and load demands by considering the correlation between them. In the proposed method, considering the simultaneous occurrence of real load demands and wind generation data, they are clustered by use of the k-means method. At first, the wind generation data are clustered in some levels, and then the associated load data of each generation level are clustered in several levels. The number of load levels in each generation level may differ from each other. By doing so the unrealistic generation-load scenarios are omitted from the process of wind turbine sizing and placement. Then, the optimum sizing and placement of distributed generation units aiming at loss reduction are carried out using the obtained generation-load scenarios. Integer-based Particle Swarm Optimization (IPSO) is used to solve the problem. The simulation result, which is carried out using MATLAB 2016 software, shows that the proposed approach causes to reduce annual energy losses more than the one in other methods. Moreover, the computational burden of the problem is decreased due to ignore some unrealistic scenarios of wind and load combinations.
{"title":"Optimum Sizing and Placement of Wind Turbines in Distribution Networks Considering Correlation of Load Demand and Wind Power","authors":"T. Agheb, I. Ahmadi, A. Zakariazadeh","doi":"10.22068/IJEEE.17.3.1916","DOIUrl":"https://doi.org/10.22068/IJEEE.17.3.1916","url":null,"abstract":"Optimal placement and sizing of distributed renewable energy resources (DER) in distribution networks can remarkably influence voltage profile improvement, amending of congestions, increasing the reliability and emission reduction. However, there is a challenge with renewable resources due to the intermittent nature of their output power. This paper presents a new viewpoint at the uncertainties associated with output powers of wind turbines and load demands by considering the correlation between them. In the proposed method, considering the simultaneous occurrence of real load demands and wind generation data, they are clustered by use of the k-means method. At first, the wind generation data are clustered in some levels, and then the associated load data of each generation level are clustered in several levels. The number of load levels in each generation level may differ from each other. By doing so the unrealistic generation-load scenarios are omitted from the process of wind turbine sizing and placement. Then, the optimum sizing and placement of distributed generation units aiming at loss reduction are carried out using the obtained generation-load scenarios. Integer-based Particle Swarm Optimization (IPSO) is used to solve the problem. The simulation result, which is carried out using MATLAB 2016 software, shows that the proposed approach causes to reduce annual energy losses more than the one in other methods. Moreover, the computational burden of the problem is decreased due to ignore some unrealistic scenarios of wind and load combinations.","PeriodicalId":39055,"journal":{"name":"Iranian Journal of Electrical and Electronic Engineering","volume":"17 1","pages":"1916-1916"},"PeriodicalIF":0.0,"publicationDate":"2021-09-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"42806514","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-09-10DOI: 10.22068/IJEEE.17.3.1730
S. Abolmaali
Area reduction of a circuit is a promising solution for decreasing the power consumption and the chip cost. Timing constraints should be preserved after a delay increase of resized circuit gates to guarantee proper circuit operation. Sensitization of paths should also be considered in timing analysis of circuit to prevent pessimistic resizing of circuit gates. In this work, a greedy area reduction algorithm is proposed which is pathbased and benefits well from viability analysis as the sensitization method. A proper metric based on viability conditions is presented to guide the algorithm towards selecting useful circuit nodes to be resized with acceptable performance and area reduction results. Instead of using gate slacks in resizing the candidate gates, all circuit gates are down-sized first and then the sizes of circuit gates that violate the circuit timing constraint are increased. This approach leads to considerable improvement in the complexity and performance of the proposed method. Results show that area improvement of about 88% is achievable. Comparison to a pessimistic method also reveals that on average 14.2% growth in area improvement is obtained by the presented method.
{"title":"Area Reduction of Combinational Circuits Considering Path Sensitization","authors":"S. Abolmaali","doi":"10.22068/IJEEE.17.3.1730","DOIUrl":"https://doi.org/10.22068/IJEEE.17.3.1730","url":null,"abstract":"Area reduction of a circuit is a promising solution for decreasing the power consumption and the chip cost. Timing constraints should be preserved after a delay increase of resized circuit gates to guarantee proper circuit operation. Sensitization of paths should also be considered in timing analysis of circuit to prevent pessimistic resizing of circuit gates. In this work, a greedy area reduction algorithm is proposed which is pathbased and benefits well from viability analysis as the sensitization method. A proper metric based on viability conditions is presented to guide the algorithm towards selecting useful circuit nodes to be resized with acceptable performance and area reduction results. Instead of using gate slacks in resizing the candidate gates, all circuit gates are down-sized first and then the sizes of circuit gates that violate the circuit timing constraint are increased. This approach leads to considerable improvement in the complexity and performance of the proposed method. Results show that area improvement of about 88% is achievable. Comparison to a pessimistic method also reveals that on average 14.2% growth in area improvement is obtained by the presented method.","PeriodicalId":39055,"journal":{"name":"Iranian Journal of Electrical and Electronic Engineering","volume":"17 1","pages":"1730-1730"},"PeriodicalIF":0.0,"publicationDate":"2021-09-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"42927158","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-09-10DOI: 10.22068/IJEEE.17.3.1793
Z. Boudjema, H. Benbouhenni, A. Bouhani, F. Chabni
This article presents the implementation of an improved space vector pulse width modulation (SVPWM) technique based on neural network for a real two level voltage source inverter (VSI) realized in our Lab. The major goal of using this new technique is the amelioration of the voltage quality in the output of the VSI by decreasing the effect of the harmonics. The used technique has been simulated by MATLAB/Simulink and then implemented using a DSPACE card on a real two level VSI. The advantages of the used technique are shown by simulation and experiment results.
{"title":"DSPACE Implementation of a Neural SVPWM Technique for a Two Level Voltage Source Inverter","authors":"Z. Boudjema, H. Benbouhenni, A. Bouhani, F. Chabni","doi":"10.22068/IJEEE.17.3.1793","DOIUrl":"https://doi.org/10.22068/IJEEE.17.3.1793","url":null,"abstract":"This article presents the implementation of an improved space vector pulse width modulation (SVPWM) technique based on neural network for a real two level voltage source inverter (VSI) realized in our Lab. The major goal of using this new technique is the amelioration of the voltage quality in the output of the VSI by decreasing the effect of the harmonics. The used technique has been simulated by MATLAB/Simulink and then implemented using a DSPACE card on a real two level VSI. The advantages of the used technique are shown by simulation and experiment results.","PeriodicalId":39055,"journal":{"name":"Iranian Journal of Electrical and Electronic Engineering","volume":"17 1","pages":"1793-1793"},"PeriodicalIF":0.0,"publicationDate":"2021-09-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"44214613","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-09-10DOI: 10.22068/IJEEE.17.3.1955
H. Abdolhadi, G. Markadeh, S. T. Boroujeni
Classical structure of Doubly Fed Induction Generators (DFIGs) is not completely adapted in high-speed regions due to their brushes and slip rings. So in the Cascaded DFIGs (CDFIGs), the rotor windings of a given DFIG are supplied by another wound rotor induction machine leading to a complete brushless structure. This paper presents and compares Sliding Mode Control (SMC) and Terminal Sliding Mode Control (TSMC) methods to control the output voltage of CDFIG. The SMC and TSMC methods are identified as strong controllers with large stability and robustness margins. In this paper, the SMC and TSMC methods are evaluated and compared to the conventional Voltage Oriented Control (VOC) in terms of output voltage change, prime over speed’s variation, and nonlinear load. Simulation and experimental results using a TMS320F28335 based prototype system show that the SMC and TSMC techniques are more robust against parameter variations and uncertainties, and TSMC offers improved dynamic response.
{"title":"Sliding Mode and Terminal Sliding Mode Control of Cascaded Doubly Fed Induction Generator","authors":"H. Abdolhadi, G. Markadeh, S. T. Boroujeni","doi":"10.22068/IJEEE.17.3.1955","DOIUrl":"https://doi.org/10.22068/IJEEE.17.3.1955","url":null,"abstract":"Classical structure of Doubly Fed Induction Generators (DFIGs) is not completely adapted in high-speed regions due to their brushes and slip rings. So in the Cascaded DFIGs (CDFIGs), the rotor windings of a given DFIG are supplied by another wound rotor induction machine leading to a complete brushless structure. This paper presents and compares Sliding Mode Control (SMC) and Terminal Sliding Mode Control (TSMC) methods to control the output voltage of CDFIG. The SMC and TSMC methods are identified as strong controllers with large stability and robustness margins. In this paper, the SMC and TSMC methods are evaluated and compared to the conventional Voltage Oriented Control (VOC) in terms of output voltage change, prime over speed’s variation, and nonlinear load. Simulation and experimental results using a TMS320F28335 based prototype system show that the SMC and TSMC techniques are more robust against parameter variations and uncertainties, and TSMC offers improved dynamic response.","PeriodicalId":39055,"journal":{"name":"Iranian Journal of Electrical and Electronic Engineering","volume":"17 1","pages":"1955-1955"},"PeriodicalIF":0.0,"publicationDate":"2021-09-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"43159250","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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