Pub Date : 2010-07-18DOI: 10.1109/ICASID.2010.5551497
Anyu Zhang, Xiaoyao Xie, Fang Li
Broadly speaking, IRT models can be divided into two families: unidimensional and multidimensional. Unidimensional models require a single trait (ability) dimension θ. Multidimensional IRT models model response data hypothesized to arise from multiple traits. However, because of the greatly increased complexity, the majority of IRT research and applications utilize a unidimensional model. With the developmental, the MIRT is negative to be researcher. In this paper, we proposed the estimation method of determining the number of dimensions for multidimensional item response theory based on combination with Principal Component Analysis and χ2 test. A Joint marginal likelihood estimation method based on Bayesian method is provided in paper. Finally, a suggestion about the issue of numerical calculation of multiple integrals is given.
{"title":"Parameters estimation for multidimensional item response theory: An effective method of determining dimensions and bayesian method parameters estimation","authors":"Anyu Zhang, Xiaoyao Xie, Fang Li","doi":"10.1109/ICASID.2010.5551497","DOIUrl":"https://doi.org/10.1109/ICASID.2010.5551497","url":null,"abstract":"Broadly speaking, IRT models can be divided into two families: unidimensional and multidimensional. Unidimensional models require a single trait (ability) dimension θ. Multidimensional IRT models model response data hypothesized to arise from multiple traits. However, because of the greatly increased complexity, the majority of IRT research and applications utilize a unidimensional model. With the developmental, the MIRT is negative to be researcher. In this paper, we proposed the estimation method of determining the number of dimensions for multidimensional item response theory based on combination with Principal Component Analysis and χ2 test. A Joint marginal likelihood estimation method based on Bayesian method is provided in paper. Finally, a suggestion about the issue of numerical calculation of multiple integrals is given.","PeriodicalId":391931,"journal":{"name":"2010 International Conference on Anti-Counterfeiting, Security and Identification","volume":"46 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-07-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130623916","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-07-18DOI: 10.1109/ICASID.2010.5551346
Benbin Chen, Wenchao Zhou, Yiyang Li, Donghui Guo
An innovative application for communication platform based on SIP protocol is presented in this paper. In this application, a group management model is proposed for SIP with grouping functions. A new encryption mechanism that combines AES and RSA algorithm is included in this model to ensure the security of SIP messages. Different from the traditional application based on SIP, the architecture of this new platform requires a data service node to store the configuration list of the group management and the public key of RSA. Additionally, a methodology for NAT/FW traversal by using ICE and HTTP tunnel is applied to enhance the adaptability of the platform in different application environment. Finally, this communication platform is implemented with a user agent (UA), a SIP server (option), and a data service node. And the experience with the platform shows that, it could be widely utilized in enterprises, groups and organizations with low-cost because of those improvements.
{"title":"Innovative application of SIP protocol for communication platform","authors":"Benbin Chen, Wenchao Zhou, Yiyang Li, Donghui Guo","doi":"10.1109/ICASID.2010.5551346","DOIUrl":"https://doi.org/10.1109/ICASID.2010.5551346","url":null,"abstract":"An innovative application for communication platform based on SIP protocol is presented in this paper. In this application, a group management model is proposed for SIP with grouping functions. A new encryption mechanism that combines AES and RSA algorithm is included in this model to ensure the security of SIP messages. Different from the traditional application based on SIP, the architecture of this new platform requires a data service node to store the configuration list of the group management and the public key of RSA. Additionally, a methodology for NAT/FW traversal by using ICE and HTTP tunnel is applied to enhance the adaptability of the platform in different application environment. Finally, this communication platform is implemented with a user agent (UA), a SIP server (option), and a data service node. And the experience with the platform shows that, it could be widely utilized in enterprises, groups and organizations with low-cost because of those improvements.","PeriodicalId":391931,"journal":{"name":"2010 International Conference on Anti-Counterfeiting, Security and Identification","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-07-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130647184","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-07-18DOI: 10.1109/ICASID.2010.5551848
Yongqing Fu, Chun Zhang, Jingchao Wang
As RFID technology being applied more and more widely, its security and privacy problems are increasingly called into question. Means of RFID attack emerge in endlessly and RFID security becomes a relatively new research area. This paper makes research on one of the attack methods — Denial of Service (DoS). We thoroughly expound and analyze the active jamming to the RFID system which, mentioned as Active Jamming Attack later, is a form of DoS. Through theoretical derivation and simulation, the most effective active jamming approach is summarized, which is also demonstrated by presenting experimental results. This work may provide a reference for RFID designers to prevent or weaken this type of DoS attacks to the greatest extent.
{"title":"A research on Denial of Service attack in passive RFID system","authors":"Yongqing Fu, Chun Zhang, Jingchao Wang","doi":"10.1109/ICASID.2010.5551848","DOIUrl":"https://doi.org/10.1109/ICASID.2010.5551848","url":null,"abstract":"As RFID technology being applied more and more widely, its security and privacy problems are increasingly called into question. Means of RFID attack emerge in endlessly and RFID security becomes a relatively new research area. This paper makes research on one of the attack methods — Denial of Service (DoS). We thoroughly expound and analyze the active jamming to the RFID system which, mentioned as Active Jamming Attack later, is a form of DoS. Through theoretical derivation and simulation, the most effective active jamming approach is summarized, which is also demonstrated by presenting experimental results. This work may provide a reference for RFID designers to prevent or weaken this type of DoS attacks to the greatest extent.","PeriodicalId":391931,"journal":{"name":"2010 International Conference on Anti-Counterfeiting, Security and Identification","volume":"101 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-07-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124626252","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-07-18DOI: 10.1109/ICASID.2010.5551485
Jianhong Zhang, Wei Wang, Xue Liu
Delegation is an important means in modern offices system. In some case, we need to control the verification of a proxy signature, since it is not necessary for anyone to be convinced a justification of signer's dishonorable message such as a bill. In the paper, to realize verification's control and proxy signature's revocation, we put forth a new primitive: controllable proxy signature scheme with revocation list, by combining proxy signature, designated verifier signature and the revocation list. Then we show that the proposed is correct and secure in the random oracle model.
{"title":"A controllable proxy signature scheme with revocation list","authors":"Jianhong Zhang, Wei Wang, Xue Liu","doi":"10.1109/ICASID.2010.5551485","DOIUrl":"https://doi.org/10.1109/ICASID.2010.5551485","url":null,"abstract":"Delegation is an important means in modern offices system. In some case, we need to control the verification of a proxy signature, since it is not necessary for anyone to be convinced a justification of signer's dishonorable message such as a bill. In the paper, to realize verification's control and proxy signature's revocation, we put forth a new primitive: controllable proxy signature scheme with revocation list, by combining proxy signature, designated verifier signature and the revocation list. Then we show that the proposed is correct and secure in the random oracle model.","PeriodicalId":391931,"journal":{"name":"2010 International Conference on Anti-Counterfeiting, Security and Identification","volume":"355 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-07-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115933596","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-07-18DOI: 10.1109/ICASID.2010.5551827
Jing Zhang, Duoli Zhang, Gaoming Du
Wireless video interphone cannot only provide portability, but also connect people through video communication, so it gains more and more interest in consumer electronics. To design such systems, it needs high performance video processing engine. In this paper, a Multi-processor system on a chip (MPSoC) is designed, in which there are one 32-bit RISC CPU and a low power, high performance H.264 codec. The RISC CPU controls the system operation, and the H.264 codec is responsible for video decoding. Due to the large number of data to be processed, an off-chip DDRII SDRAM is used to store source stream and intermediate data. Additionally, the MPSoC can receive real-time wireless video and convert the decoded data into RGB data format that can be displayed on LCD. The MPSoC is implemented on EP3C120F780C8N FPGA, and takes up 71% resource of the total device resource. Experiment results show that it runs 32MHz, and can perform real-time video decoding, with the frame rate up to 30fps.
{"title":"Design of video decoding MPSoC for wireless video intercom","authors":"Jing Zhang, Duoli Zhang, Gaoming Du","doi":"10.1109/ICASID.2010.5551827","DOIUrl":"https://doi.org/10.1109/ICASID.2010.5551827","url":null,"abstract":"Wireless video interphone cannot only provide portability, but also connect people through video communication, so it gains more and more interest in consumer electronics. To design such systems, it needs high performance video processing engine. In this paper, a Multi-processor system on a chip (MPSoC) is designed, in which there are one 32-bit RISC CPU and a low power, high performance H.264 codec. The RISC CPU controls the system operation, and the H.264 codec is responsible for video decoding. Due to the large number of data to be processed, an off-chip DDRII SDRAM is used to store source stream and intermediate data. Additionally, the MPSoC can receive real-time wireless video and convert the decoded data into RGB data format that can be displayed on LCD. The MPSoC is implemented on EP3C120F780C8N FPGA, and takes up 71% resource of the total device resource. Experiment results show that it runs 32MHz, and can perform real-time video decoding, with the frame rate up to 30fps.","PeriodicalId":391931,"journal":{"name":"2010 International Conference on Anti-Counterfeiting, Security and Identification","volume":"48 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-07-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124404601","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-07-18DOI: 10.1109/ICASID.2010.5551334
Juanjuan Sun, Tao Yang
In this paper, an algorithm of learning computational verb decision trees (verb trees, for short) from training examples base on impact factors, which are calculated by using computational verb similarities, is presented. Some examples are used to show the creation of verb decision tree and the usefulness of verb decision trees. Examples are used to show that verb decision trees are powerful tools to generalize and extract knowledge from both historical records and Boolean logical records
{"title":"A training algorithm of computational verb decision trees","authors":"Juanjuan Sun, Tao Yang","doi":"10.1109/ICASID.2010.5551334","DOIUrl":"https://doi.org/10.1109/ICASID.2010.5551334","url":null,"abstract":"In this paper, an algorithm of learning computational verb decision trees (verb trees, for short) from training examples base on impact factors, which are calculated by using computational verb similarities, is presented. Some examples are used to show the creation of verb decision tree and the usefulness of verb decision trees. Examples are used to show that verb decision trees are powerful tools to generalize and extract knowledge from both historical records and Boolean logical records","PeriodicalId":391931,"journal":{"name":"2010 International Conference on Anti-Counterfeiting, Security and Identification","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-07-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123115893","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-07-18DOI: 10.1109/ICASID.2010.5551342
Hongyin Luo, Lin Li, Donghui Guo
In this paper, two different architectures of the iSLIP scheduling algorithm are implemented by hardware, and the delay limitation of this algorithm is indicated by comparing their performances. Then a matrix model is proposed for analyzing the reason of delay limitation, and the conclusion is that the pointer conflict causes the large area and delay in essence. Finally, the non-conflict RR scheduling algorithm is proposed for resolving this pointer conflict problem. The hardware implementation result shows that the performance of this algorithm is much better than iSLIP algorithm.
{"title":"Non-conflict RR scheduling algorithm and its hardware implementation for crossbar switch","authors":"Hongyin Luo, Lin Li, Donghui Guo","doi":"10.1109/ICASID.2010.5551342","DOIUrl":"https://doi.org/10.1109/ICASID.2010.5551342","url":null,"abstract":"In this paper, two different architectures of the iSLIP scheduling algorithm are implemented by hardware, and the delay limitation of this algorithm is indicated by comparing their performances. Then a matrix model is proposed for analyzing the reason of delay limitation, and the conclusion is that the pointer conflict causes the large area and delay in essence. Finally, the non-conflict RR scheduling algorithm is proposed for resolving this pointer conflict problem. The hardware implementation result shows that the performance of this algorithm is much better than iSLIP algorithm.","PeriodicalId":391931,"journal":{"name":"2010 International Conference on Anti-Counterfeiting, Security and Identification","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-07-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129433728","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-07-18DOI: 10.1109/ICASID.2010.5551340
Yuying Zheng
Signal search and acquisition is an important part of GPS software receiver and makes an influence on the working performance of it. This paper discusses a frequency domain parallel acquisition algorithm. Its theoretic model is first analyzed and then implemented in Matlab, in which the carrier frequencies and code phases in GPS signal can be successfully calculated. Comparison between the conventional time domain serial search and proposed frequency domain parallel acquisition method is discussed. It is verified that the proposed method has better performance both in computation and accuracy.
{"title":"A software-based frequency domain parallel acquisition algorithm for GPS signal","authors":"Yuying Zheng","doi":"10.1109/ICASID.2010.5551340","DOIUrl":"https://doi.org/10.1109/ICASID.2010.5551340","url":null,"abstract":"Signal search and acquisition is an important part of GPS software receiver and makes an influence on the working performance of it. This paper discusses a frequency domain parallel acquisition algorithm. Its theoretic model is first analyzed and then implemented in Matlab, in which the carrier frequencies and code phases in GPS signal can be successfully calculated. Comparison between the conventional time domain serial search and proposed frequency domain parallel acquisition method is discussed. It is verified that the proposed method has better performance both in computation and accuracy.","PeriodicalId":391931,"journal":{"name":"2010 International Conference on Anti-Counterfeiting, Security and Identification","volume":"26 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-07-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121102584","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-07-18DOI: 10.1109/ICASID.2010.5551338
Fagui Liu, Yong-Xiong Ruan, Yuzhu Jie, Yue-Dong Lin, Yang Zhang
With the rapid development of RFID (Radio Frequency Identification) technology, RFID middleware has increasingly become the focus. How to process massive RFID data with high-performance is a key issue. This paper analyzes the characteristics of the RFID event filtering in RFID middleware, proposes a RFID EPC Sub-Pattern Match Model using Automata Theory and presents a high-performance matching algorithm for RFID event filtering with bit-parallelism, which has been implemented in our RFID middleware system. Performance evaluation results have indicated that this algorithm is more efficient than the regular expression matching algorithm used before.
{"title":"Algorithm for bit-parallelism automaton based RFID event filtering","authors":"Fagui Liu, Yong-Xiong Ruan, Yuzhu Jie, Yue-Dong Lin, Yang Zhang","doi":"10.1109/ICASID.2010.5551338","DOIUrl":"https://doi.org/10.1109/ICASID.2010.5551338","url":null,"abstract":"With the rapid development of RFID (Radio Frequency Identification) technology, RFID middleware has increasingly become the focus. How to process massive RFID data with high-performance is a key issue. This paper analyzes the characteristics of the RFID event filtering in RFID middleware, proposes a RFID EPC Sub-Pattern Match Model using Automata Theory and presents a high-performance matching algorithm for RFID event filtering with bit-parallelism, which has been implemented in our RFID middleware system. Performance evaluation results have indicated that this algorithm is more efficient than the regular expression matching algorithm used before.","PeriodicalId":391931,"journal":{"name":"2010 International Conference on Anti-Counterfeiting, Security and Identification","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-07-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121402947","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-07-18DOI: 10.1109/ICASID.2010.5551522
Fei Pei, Honghui Deng, Yongsheng Yin
A 9-bit, 125MSPS, power scaleable MDAC applied in high performance pipelined ADC in 1.8V supply voltage, 0.18um CMOS process is presented in this paper. The related circuits: a high gain, high unit gain bandwidth operational amplifier with gain boosting, common-mode feedback and bootstrap are proposed. Additionally, when the sampling rate is changed, the power of the whole MDAC can be significantly modulated by setting modulations of bias in op amp with different combinations of current sources. Simulation results in a 0.18um CMOS process indicated that when programmed at 125MSPS, the signal can correctly set up in 2.1ns; MDAC exhibits a spurious free dynamic range (SFDR)of 73.1 dB and a signal-to-noise and distortion ratio(SNDR)of 60.23dB. It consumes 6.8mw when a 62MHz sine signal is fed in.1
{"title":"Design of power scaleable MD AC in high performance pipelined ADC","authors":"Fei Pei, Honghui Deng, Yongsheng Yin","doi":"10.1109/ICASID.2010.5551522","DOIUrl":"https://doi.org/10.1109/ICASID.2010.5551522","url":null,"abstract":"A 9-bit, 125MSPS, power scaleable MDAC applied in high performance pipelined ADC in 1.8V supply voltage, 0.18um CMOS process is presented in this paper. The related circuits: a high gain, high unit gain bandwidth operational amplifier with gain boosting, common-mode feedback and bootstrap are proposed. Additionally, when the sampling rate is changed, the power of the whole MDAC can be significantly modulated by setting modulations of bias in op amp with different combinations of current sources. Simulation results in a 0.18um CMOS process indicated that when programmed at 125MSPS, the signal can correctly set up in 2.1ns; MDAC exhibits a spurious free dynamic range (SFDR)of 73.1 dB and a signal-to-noise and distortion ratio(SNDR)of 60.23dB. It consumes 6.8mw when a 62MHz sine signal is fed in.1","PeriodicalId":391931,"journal":{"name":"2010 International Conference on Anti-Counterfeiting, Security and Identification","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-07-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126892013","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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