Pub Date : 2018-05-01DOI: 10.1109/SAPIW.2018.8401680
Y. Ye, D. Spina, G. Antonini, T. Dhaene
This paper presents a unique modeling framework able to describe general linear and passive systems depending on deterministic and stochastic parameters altogether. Once the stochastic macromodel is built, the variability analysis of the system under study can be accurately performed both in the frequency- and time-domain for any nominal value of the parameters considered in a suitable design space.
{"title":"Parameterized macromodeling of stochastic linear systems for frequency- and time-domain variability analysis","authors":"Y. Ye, D. Spina, G. Antonini, T. Dhaene","doi":"10.1109/SAPIW.2018.8401680","DOIUrl":"https://doi.org/10.1109/SAPIW.2018.8401680","url":null,"abstract":"This paper presents a unique modeling framework able to describe general linear and passive systems depending on deterministic and stochastic parameters altogether. Once the stochastic macromodel is built, the variability analysis of the system under study can be accurately performed both in the frequency- and time-domain for any nominal value of the parameters considered in a suitable design space.","PeriodicalId":423850,"journal":{"name":"2018 IEEE 22nd Workshop on Signal and Power Integrity (SPI)","volume":"40 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131461188","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-05-01DOI: 10.1109/SAPIW.2018.8401668
T. Ostermann
Due to ESD events on powered ICs, soft failures can occur in the IO pad frame and in the core of the IC. A detector cell can be used to detect these faults and distinguish between valid signal changes and soft failures. A corresponding digital detector cell with adjusted switching thresholds is presented in this paper. Since the detector cell is correspondingly small (150μm × 16.5μm), it can be placed several times in the IC and read out via a scan chain.
{"title":"Usage of ESD detector circuit for analyzing soft failures in IC cores","authors":"T. Ostermann","doi":"10.1109/SAPIW.2018.8401668","DOIUrl":"https://doi.org/10.1109/SAPIW.2018.8401668","url":null,"abstract":"Due to ESD events on powered ICs, soft failures can occur in the IO pad frame and in the core of the IC. A detector cell can be used to detect these faults and distinguish between valid signal changes and soft failures. A corresponding digital detector cell with adjusted switching thresholds is presented in this paper. Since the detector cell is correspondingly small (150μm × 16.5μm), it can be placed several times in the IC and read out via a scan chain.","PeriodicalId":423850,"journal":{"name":"2018 IEEE 22nd Workshop on Signal and Power Integrity (SPI)","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133474873","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-05-01DOI: 10.1109/SAPIW.2018.8401656
Daniel Garcia-Mora, J. Kar, Ivan Mendez-Soriano, Hiram Morales-Espinosa
Higher capacity, lower latency, and more efficient data management are the elements that are driving the design of future memory modules on server platforms. For this reason, the DIMM needs to evolve from a peripheral device with an external power supply into a platform that includes voltage regulators and a more complex power delivery network. The design of the power delivery network for a platform on DIMM represents a challenging task that is addressed in this document.
{"title":"A robust power delivery design strategy for platform on DIMM","authors":"Daniel Garcia-Mora, J. Kar, Ivan Mendez-Soriano, Hiram Morales-Espinosa","doi":"10.1109/SAPIW.2018.8401656","DOIUrl":"https://doi.org/10.1109/SAPIW.2018.8401656","url":null,"abstract":"Higher capacity, lower latency, and more efficient data management are the elements that are driving the design of future memory modules on server platforms. For this reason, the DIMM needs to evolve from a peripheral device with an external power supply into a platform that includes voltage regulators and a more complex power delivery network. The design of the power delivery network for a platform on DIMM represents a challenging task that is addressed in this document.","PeriodicalId":423850,"journal":{"name":"2018 IEEE 22nd Workshop on Signal and Power Integrity (SPI)","volume":"33 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125012130","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-05-01DOI: 10.1109/SAPIW.2018.8401662
Hao-Wei Chan, R. Wu
The metallic shielding cavity provides coupling path for digital lines to analog traces at resonance in the cavity. It induces coupling noise in analog components and thus deteriorate RF performance and result in radiated emission. A novel design to avoid such coupling noise is proposed. With the shorting pins connecting between cavity and ground plane, the resonance can be shifted to the nodal frequency points of the pseudo-random binary sequence (PRBS). This reduces frequency component of energy at the resonance and thus minimizes the coupling noise.
{"title":"Suppression of noise from digital-to-analog coupling in shielding cavity","authors":"Hao-Wei Chan, R. Wu","doi":"10.1109/SAPIW.2018.8401662","DOIUrl":"https://doi.org/10.1109/SAPIW.2018.8401662","url":null,"abstract":"The metallic shielding cavity provides coupling path for digital lines to analog traces at resonance in the cavity. It induces coupling noise in analog components and thus deteriorate RF performance and result in radiated emission. A novel design to avoid such coupling noise is proposed. With the shorting pins connecting between cavity and ground plane, the resonance can be shifted to the nodal frequency points of the pseudo-random binary sequence (PRBS). This reduces frequency component of energy at the resonance and thus minimizes the coupling noise.","PeriodicalId":423850,"journal":{"name":"2018 IEEE 22nd Workshop on Signal and Power Integrity (SPI)","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130935097","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-05-01DOI: 10.1109/SAPIW.2018.8401672
Katharina Scharff, David Dahl, H. Brüns, C. Schuster
Data rates on copper-based links are now increasing beyond 50 Gbps which requires frequency-domain analyses up to at least 100 GHz. This work investigates for the first time the frequency behavior of differential crosstalk inside a via array for frequencies up to 100 GHz. It is shown that the crosstalk does not increase indefinitely with frequency. We evaluate if efficient modeling tools like the physics-based via modeling can be used for crosstalk assessments up to 100 GHz and compare the results with full-wave solutions. A reduced model with a single cavity is sufficient to predict the overall frequency dependence of the crosstalk inside the array. The effect of scaling down the geometry of the array is investigated. The via pitch is identified as the parameter with the greatest impact. For a frequency of 50 GHz a reduction of the via pitch from 80 mil to 40 mil could reduce the crosstalk by about 30 dB.
{"title":"Physical scaling effects of differential crosstalk in via arrays up to frequencies of 100 GHz","authors":"Katharina Scharff, David Dahl, H. Brüns, C. Schuster","doi":"10.1109/SAPIW.2018.8401672","DOIUrl":"https://doi.org/10.1109/SAPIW.2018.8401672","url":null,"abstract":"Data rates on copper-based links are now increasing beyond 50 Gbps which requires frequency-domain analyses up to at least 100 GHz. This work investigates for the first time the frequency behavior of differential crosstalk inside a via array for frequencies up to 100 GHz. It is shown that the crosstalk does not increase indefinitely with frequency. We evaluate if efficient modeling tools like the physics-based via modeling can be used for crosstalk assessments up to 100 GHz and compare the results with full-wave solutions. A reduced model with a single cavity is sufficient to predict the overall frequency dependence of the crosstalk inside the array. The effect of scaling down the geometry of the array is investigated. The via pitch is identified as the parameter with the greatest impact. For a frequency of 50 GHz a reduction of the via pitch from 80 mil to 40 mil could reduce the crosstalk by about 30 dB.","PeriodicalId":423850,"journal":{"name":"2018 IEEE 22nd Workshop on Signal and Power Integrity (SPI)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125024719","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-05-01DOI: 10.1109/SAPIW.2018.8401670
T. Lacrevaz, G. Houzet, David Auchère, P. Artillan, C. Bermond, B. Blampey, B. Fléchet
A wide band (1 GHz–67 GHz) characterization method of insulator layers is presented. This method is well suitable for a fast, simple and accurate extraction of permittivity of insulators used in interconnects networks. Concerning losses, reto-simulations must be achieved to extract the loss tangent, due to the fact that the extraction of G/(C.ω) includes extrinsic effects. So both lossless and loss cases will be discussed. This non-destructive method and low-cost method presents strong advantages because no specific device under test, no metallic deposit and no etching are required. Measurements are performed using a coplanar GSG RF microprobe directly set down on the dielectric material to characterize.
{"title":"Fast and robust RF characterization method of insulators used in high speed interconnects networks","authors":"T. Lacrevaz, G. Houzet, David Auchère, P. Artillan, C. Bermond, B. Blampey, B. Fléchet","doi":"10.1109/SAPIW.2018.8401670","DOIUrl":"https://doi.org/10.1109/SAPIW.2018.8401670","url":null,"abstract":"A wide band (1 GHz–67 GHz) characterization method of insulator layers is presented. This method is well suitable for a fast, simple and accurate extraction of permittivity of insulators used in interconnects networks. Concerning losses, reto-simulations must be achieved to extract the loss tangent, due to the fact that the extraction of G/(C.ω) includes extrinsic effects. So both lossless and loss cases will be discussed. This non-destructive method and low-cost method presents strong advantages because no specific device under test, no metallic deposit and no etching are required. Measurements are performed using a coplanar GSG RF microprobe directly set down on the dielectric material to characterize.","PeriodicalId":423850,"journal":{"name":"2018 IEEE 22nd Workshop on Signal and Power Integrity (SPI)","volume":"150 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123220042","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-05-01DOI: 10.1109/SAPIW.2018.8401678
X. Wu, F. Grassi, P. Manfredi, D. Ginste
This paper presents a novel approach for the statistical analysis of differential interconnects with random parameters. The proposed method employs a perturbation technique to reformulate the augmented multiconductor transmission line (MTL) equations generated by the polynomial chaos based stochastic Galerkin method. The augmented MTL-like equations are recast as the equation for a deterministic MTL with average per-unit-length parameters and additional equivalent distributed sources that account for their variability. The process leads to multiple MTL problems of the same size as the original one, which are solved iteratively in the frequency domain. Moreover, for each iteration, the solution of each MTL problem is independent. The feasibility of the proposed approach is illustrated through the statistical analysis of a canonical PCB differential line with random geometrical parameters. Computational advantages with respect to the classical stochastic Galerkin and Monte Carlo methods are discussed along with the effect of the amount of variability on the performance.
{"title":"Perturbative statistical assessment of PCB differential interconnects","authors":"X. Wu, F. Grassi, P. Manfredi, D. Ginste","doi":"10.1109/SAPIW.2018.8401678","DOIUrl":"https://doi.org/10.1109/SAPIW.2018.8401678","url":null,"abstract":"This paper presents a novel approach for the statistical analysis of differential interconnects with random parameters. The proposed method employs a perturbation technique to reformulate the augmented multiconductor transmission line (MTL) equations generated by the polynomial chaos based stochastic Galerkin method. The augmented MTL-like equations are recast as the equation for a deterministic MTL with average per-unit-length parameters and additional equivalent distributed sources that account for their variability. The process leads to multiple MTL problems of the same size as the original one, which are solved iteratively in the frequency domain. Moreover, for each iteration, the solution of each MTL problem is independent. The feasibility of the proposed approach is illustrated through the statistical analysis of a canonical PCB differential line with random geometrical parameters. Computational advantages with respect to the classical stochastic Galerkin and Monte Carlo methods are discussed along with the effect of the amount of variability on the performance.","PeriodicalId":423850,"journal":{"name":"2018 IEEE 22nd Workshop on Signal and Power Integrity (SPI)","volume":"22 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133737976","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-05-01DOI: 10.1109/SAPIW.2018.8401677
M. Barbi, H. Torun, M. Swaminathan, I. Stievano, F. Canavero, P. Besnier
This paper deals with the uncertainty quantification applied to the analysis of Integrated Voltage Regulator (IVR) efficiency. It presents a meta-model based on a sparse polynomial chaos technique, aiming at estimating statistical quantities of a response with a relative low computational cost compared to Monte Carlo (MC) simulation. Results obtained are validated against MC simulation.
{"title":"Uncertainty quantification of SiP based integrated voltage regulator","authors":"M. Barbi, H. Torun, M. Swaminathan, I. Stievano, F. Canavero, P. Besnier","doi":"10.1109/SAPIW.2018.8401677","DOIUrl":"https://doi.org/10.1109/SAPIW.2018.8401677","url":null,"abstract":"This paper deals with the uncertainty quantification applied to the analysis of Integrated Voltage Regulator (IVR) efficiency. It presents a meta-model based on a sparse polynomial chaos technique, aiming at estimating statistical quantities of a response with a relative low computational cost compared to Monte Carlo (MC) simulation. Results obtained are validated against MC simulation.","PeriodicalId":423850,"journal":{"name":"2018 IEEE 22nd Workshop on Signal and Power Integrity (SPI)","volume":"116 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132034362","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-05-01DOI: 10.1109/SAPIW.2018.8401667
Po-Jui Li, Tzong-Lin Wu
The authors introduce a novel passive method that can improve the performance of eye diagrams in high speed digital systems. In this paper, simulation annealing algorithm is adopted to select a good solution from a pool of candidate circuits, which are composed of a large variety of second-order all-pass filters. The proposed method not only can provide significant improvements in signal integrity but also can adapt to many kinds of non-ideal channels. Lastly, two examples are demonstrated to show the performance of the proposed method. Furthermore, to verify the results, simulated results using commercial tools are also shown, where good improvements on eye diagrams can be found.
{"title":"An eye diagram improvement method using simulation annealing algorithm","authors":"Po-Jui Li, Tzong-Lin Wu","doi":"10.1109/SAPIW.2018.8401667","DOIUrl":"https://doi.org/10.1109/SAPIW.2018.8401667","url":null,"abstract":"The authors introduce a novel passive method that can improve the performance of eye diagrams in high speed digital systems. In this paper, simulation annealing algorithm is adopted to select a good solution from a pool of candidate circuits, which are composed of a large variety of second-order all-pass filters. The proposed method not only can provide significant improvements in signal integrity but also can adapt to many kinds of non-ideal channels. Lastly, two examples are demonstrated to show the performance of the proposed method. Furthermore, to verify the results, simulated results using commercial tools are also shown, where good improvements on eye diagrams can be found.","PeriodicalId":423850,"journal":{"name":"2018 IEEE 22nd Workshop on Signal and Power Integrity (SPI)","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124518489","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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