Pub Date : 2016-05-01DOI: 10.1109/ITHERM.2016.7517665
M. A. Ras, D. May, J. Heilmann, S. Rzepka, B. Michel, B. Wunderle
This paper presents a systematic study of sintered silver. In order to investigate the correlation between processing conditions, microstructures, thermal and electrical properties, sintered silver samples have been prepared in 27 variations of sintering temperature between 200°C and 270°C and sintering pressure between 5 MPa and 25 MPa. For the thermal and electrical characterization, the innovative test stand LaTIMA has been used. The microstructures of the samples have been analyzed by focused ion beam (FIB) and scanning electron microscope (SEM). The results of the thermal and electrical characterizations as well as the structure analysis showed clear correlation to the process conditions of sintered silver.
{"title":"Processing-structure-property correlations of sintered silver","authors":"M. A. Ras, D. May, J. Heilmann, S. Rzepka, B. Michel, B. Wunderle","doi":"10.1109/ITHERM.2016.7517665","DOIUrl":"https://doi.org/10.1109/ITHERM.2016.7517665","url":null,"abstract":"This paper presents a systematic study of sintered silver. In order to investigate the correlation between processing conditions, microstructures, thermal and electrical properties, sintered silver samples have been prepared in 27 variations of sintering temperature between 200°C and 270°C and sintering pressure between 5 MPa and 25 MPa. For the thermal and electrical characterization, the innovative test stand LaTIMA has been used. The microstructures of the samples have been analyzed by focused ion beam (FIB) and scanning electron microscope (SEM). The results of the thermal and electrical characterizations as well as the structure analysis showed clear correlation to the process conditions of sintered silver.","PeriodicalId":426908,"journal":{"name":"2016 15th IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm)","volume":"47 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132177507","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2016-05-01DOI: 10.1109/ITHERM.2016.7517547
W. Fan, E. Galestien, Creighton Tomek, S. Manjunath
Changing from incandescent or high intensity discharge automotive headlight to LED presents a great thermal management challenge. With thermal conductivities ranging from 120 to 400 W/m-K, aluminum and copper based heat sinks limit the maximal power loading to LEDs. On the other hand, Thermal Pyrolytic Graphite (TPG), which contains millions of highly-oriented stacked graphene planes, exhibits excellent in-plane thermal conductivity (>1500 W/m-K) and very low density (2.25g/cm3). TPG-metal composites can simultaneously achieve high thermal conductivity from the TPG core and high mechanical strength from the metal shell. The benefits of integrating TPG material into automotive LED headlight were investigated in this study for the first time. Design and power configuration of an aftermarket LED headlight was used as the baseline. Thermal simulation successfully predicted the performance of each prototype heat sink, which facilitated the design iteration. Our bench tests on the prototype headlights revealed: a. Replacing aluminum fins with metallized TPG plates reduced total system thermal resistance by 27%; b. Inserting a TPG core underneath LED dies achieved another 24% thermal resistance reduction. The final integrated assembly demonstrated that 2x of the power can be loaded to the LED with TPG material assisted heat dissipation at these two strategic locations.
{"title":"Doubling the output of automotive LED headlight with efficient cooling using Thermal Pyrolytic Graphite","authors":"W. Fan, E. Galestien, Creighton Tomek, S. Manjunath","doi":"10.1109/ITHERM.2016.7517547","DOIUrl":"https://doi.org/10.1109/ITHERM.2016.7517547","url":null,"abstract":"Changing from incandescent or high intensity discharge automotive headlight to LED presents a great thermal management challenge. With thermal conductivities ranging from 120 to 400 W/m-K, aluminum and copper based heat sinks limit the maximal power loading to LEDs. On the other hand, Thermal Pyrolytic Graphite (TPG), which contains millions of highly-oriented stacked graphene planes, exhibits excellent in-plane thermal conductivity (>1500 W/m-K) and very low density (2.25g/cm3). TPG-metal composites can simultaneously achieve high thermal conductivity from the TPG core and high mechanical strength from the metal shell. The benefits of integrating TPG material into automotive LED headlight were investigated in this study for the first time. Design and power configuration of an aftermarket LED headlight was used as the baseline. Thermal simulation successfully predicted the performance of each prototype heat sink, which facilitated the design iteration. Our bench tests on the prototype headlights revealed: a. Replacing aluminum fins with metallized TPG plates reduced total system thermal resistance by 27%; b. Inserting a TPG core underneath LED dies achieved another 24% thermal resistance reduction. The final integrated assembly demonstrated that 2x of the power can be loaded to the LED with TPG material assisted heat dissipation at these two strategic locations.","PeriodicalId":426908,"journal":{"name":"2016 15th IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm)","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122246035","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2016-05-01DOI: 10.1109/ITHERM.2016.7517705
R. Mittal, R. Coutts, M. Saeidi
Mobile processors push the envelope of thermal design due to lack of active cooling and heavy computational requirements. Many different use case applications must be analyzed to understand the thermal risks involved including the device leakage power, which has an exponential dependence on temperature. Commercial computational fluid dynamic (CFD) solvers generally take more than four hours for a single smartphone simulation with acceptable accuracy without accounting the for the leakage power. In this paper, CTSIM is presented which is a compact thermal solver (CTS) which uses convolution and iterative methods. CTSIM is as accurate as commercial solvers with a significant speed improvement in repeated simulation time for use case and benchmark analysis. Additionally, the temperature dependence on leakage is also accounted for correctly. The result is a fast and compact thermal model which provides commercial CFD accurate analyses with an 8000x speed improvement.
{"title":"CTSIM: Convolution-based thermal simulation using iterative methods","authors":"R. Mittal, R. Coutts, M. Saeidi","doi":"10.1109/ITHERM.2016.7517705","DOIUrl":"https://doi.org/10.1109/ITHERM.2016.7517705","url":null,"abstract":"Mobile processors push the envelope of thermal design due to lack of active cooling and heavy computational requirements. Many different use case applications must be analyzed to understand the thermal risks involved including the device leakage power, which has an exponential dependence on temperature. Commercial computational fluid dynamic (CFD) solvers generally take more than four hours for a single smartphone simulation with acceptable accuracy without accounting the for the leakage power. In this paper, CTSIM is presented which is a compact thermal solver (CTS) which uses convolution and iterative methods. CTSIM is as accurate as commercial solvers with a significant speed improvement in repeated simulation time for use case and benchmark analysis. Additionally, the temperature dependence on leakage is also accounted for correctly. The result is a fast and compact thermal model which provides commercial CFD accurate analyses with an 8000x speed improvement.","PeriodicalId":426908,"journal":{"name":"2016 15th IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm)","volume":"55 3","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120999098","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2016-05-01DOI: 10.1109/ITHERM.2016.7517567
P. Parida, Augusto J. Vega, A. Buyuktosunoglu, P. Bose, T. Chainer
High-end server-class processors continue to push towards increased performance in both single thread and throughput performance. Improved computational performance and power efficiency can be achieved by increasing the number of complex cores through three-dimensional (3D) chip stacking technology. However, the thermal and associated reliability issues can be a limiting factor in such a strategy unless it is augmented by an aggressive, new cooling solution. This research paper demonstrates a novel intrachip two-phase liquid cooling technology with channel dimensions which are consistent with through silicon vias (TSV) compatible 3D chip stacking to mitigate any thermal constraints. To evaluate the benefits, data from characterization studies of IBM POWER7+™ systems and corresponding microprocessor power maps were used to generate power and computational performance models. These models were combined with system-level models to perform a quantitative analysis on system performance.
{"title":"Embedded two phase liquid cooling for increasing computational efficiency","authors":"P. Parida, Augusto J. Vega, A. Buyuktosunoglu, P. Bose, T. Chainer","doi":"10.1109/ITHERM.2016.7517567","DOIUrl":"https://doi.org/10.1109/ITHERM.2016.7517567","url":null,"abstract":"High-end server-class processors continue to push towards increased performance in both single thread and throughput performance. Improved computational performance and power efficiency can be achieved by increasing the number of complex cores through three-dimensional (3D) chip stacking technology. However, the thermal and associated reliability issues can be a limiting factor in such a strategy unless it is augmented by an aggressive, new cooling solution. This research paper demonstrates a novel intrachip two-phase liquid cooling technology with channel dimensions which are consistent with through silicon vias (TSV) compatible 3D chip stacking to mitigate any thermal constraints. To evaluate the benefits, data from characterization studies of IBM POWER7+™ systems and corresponding microprocessor power maps were used to generate power and computational performance models. These models were combined with system-level models to perform a quantitative analysis on system performance.","PeriodicalId":426908,"journal":{"name":"2016 15th IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm)","volume":"81 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121134903","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2016-05-01DOI: 10.1109/ITHERM.2016.7517629
Leitao Chen, Fanghao Yang, P. Parida, M. Schultz, T. Chainer
The development of embedded chip cooling for 2D and 3D integrated circuits using pumped dielectric refrigerant has gained recent attention due to the ability to manage high heat densities and compatibility with electronics. Recent studies have focused on in-situ thermal and hydrodynamic phenomena (e.g. boiling and bubble dynamics) of two-phase flow boiling at micro-scales. In this paper we focus on the two-phase cooling system design including the cooling capability, size and coefficient of performance (COP). In implementing a two-phase cooling, a system-level computational model for two-phase cooling systems becomes necessary. Therefore, a computationally manageable and accurate one dimensional (1D) system model is described. Furthermore, the model can be easily customized for different two-phase cooling system configurations. By validating the model with experimental data from a two-phase cooling system, it is shown that model can generate accurate results, and therefore, can be used as a tool to study and predict the characteristics and performance of a pumped two-phase cooling systems.
{"title":"Enthalpy-based system-model for pumped two-phase cooling systems","authors":"Leitao Chen, Fanghao Yang, P. Parida, M. Schultz, T. Chainer","doi":"10.1109/ITHERM.2016.7517629","DOIUrl":"https://doi.org/10.1109/ITHERM.2016.7517629","url":null,"abstract":"The development of embedded chip cooling for 2D and 3D integrated circuits using pumped dielectric refrigerant has gained recent attention due to the ability to manage high heat densities and compatibility with electronics. Recent studies have focused on in-situ thermal and hydrodynamic phenomena (e.g. boiling and bubble dynamics) of two-phase flow boiling at micro-scales. In this paper we focus on the two-phase cooling system design including the cooling capability, size and coefficient of performance (COP). In implementing a two-phase cooling, a system-level computational model for two-phase cooling systems becomes necessary. Therefore, a computationally manageable and accurate one dimensional (1D) system model is described. Furthermore, the model can be easily customized for different two-phase cooling system configurations. By validating the model with experimental data from a two-phase cooling system, it is shown that model can generate accurate results, and therefore, can be used as a tool to study and predict the characteristics and performance of a pumped two-phase cooling systems.","PeriodicalId":426908,"journal":{"name":"2016 15th IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121804453","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2016-05-01DOI: 10.1109/ITHERM.2016.7517531
R. Mandel, S. Dessiatoun, M. Ohadi
This work presents the experimental design, bonding, and testing of a two-phase, embedded FEEDS manifold-microchannel cooler for cooling of high flux electronics. The ultimate goal of this work is to achieve 0.025 cm2-K/W thermal resistance at 1 kW/cm2 heat flux and evaporator exit vapor qualities at or exceeding 90% at less than 10% absolute pressure drop. Unlike previous experiments by the authors of this work, in which the header, manifold, and Si chip were press-fit together, in the present work, the header and manifold are formed as one unit, and the chip and header-manifold unit are bonded together using a proprietary soldering technique. These improvements remove all possible flow leakage points, ensuring that all of the fluid flows through the micro-grooved heat transfer surface, thereby improving thermal performance and preventing avoidable early onset of critical heat flux. In addition, this approach also reduces package weight and volume, and allows for better flow distribution due to larger internal flow area made possible from the manifold fabrication technology. This work will briefly describe the procedure used to metalize and solder the chip to the manifold, as well as leakage and pressure tests to ensure the system can handle the expected loads. It will then detail calibration of experimental apparatus, and the single-phase and two-phase experiments performed with the cooler, focusing on overall heat transfer coefficient and pressure drop results. In the end, single-phase experiments revealed the presence of microchannel clogging, which acts to increase pressure drop, reduce heat transfer coefficient, and introduce hotspots. The presence of hotspots was confirmed using an infrared camera. Two-phase tests achieved heat fluxes in excess of 560 W/cm2, and peak fin conductances between 200 kW/m2-K and 280 kW/m2-K at vapor qualities between 21-35%, respectively. However, higher heat fluxes, conductances, and vapor qualities are expected with removal or prevention of hotspots resulting from microchannel clogging.
这项工作提出了实验设计，键合和测试的两相，嵌入式FEEDS歧管微通道冷却器的冷却高通量电子。本工作的最终目标是在1 kW/cm2的热流密度下实现0.025 cm2- k /W的热阻，在绝对压降小于10%的情况下蒸发器出口蒸汽质量达到或超过90%。不像以前的实验作者的这项工作，其中的头，歧管，和硅芯片是压合在一起，在目前的工作中，头和歧管形成为一个单元，芯片和头歧管单元粘合在一起使用专有的焊接技术。这些改进消除了所有可能的流动泄漏点，确保所有流体都流经微槽传热表面，从而提高热性能并防止可避免的临界热通量的早期发生。此外，这种方法还减少了封装的重量和体积，并且由于歧管制造技术使更大的内部流动面积成为可能，因此可以实现更好的流动分配。这项工作将简要描述用于金属化和焊接芯片到歧管的程序，以及泄漏和压力测试，以确保系统能够处理预期的负载。然后详细说明实验设备的校准，以及用冷却器进行的单相和两相实验，重点是总体传热系数和压降结果。最后，单相实验表明微通道堵塞的存在，增加了压降，降低了换热系数，并引入了热点。使用红外摄像机确认了热点的存在。两阶段测试分别获得了超过560 W/cm2的热流，在蒸汽质量为21-35%时，翅片的峰值电导分别在200 kW/m2-K和280 kW/m2-K之间。然而，更高的热流通量，电导率和蒸汽质量有望消除或防止由微通道堵塞引起的热点。
{"title":"Embedded two-phase cooling of high flux electronics using a directly bonded FEEDS manifold","authors":"R. Mandel, S. Dessiatoun, M. Ohadi","doi":"10.1109/ITHERM.2016.7517531","DOIUrl":"https://doi.org/10.1109/ITHERM.2016.7517531","url":null,"abstract":"This work presents the experimental design, bonding, and testing of a two-phase, embedded FEEDS manifold-microchannel cooler for cooling of high flux electronics. The ultimate goal of this work is to achieve 0.025 cm2-K/W thermal resistance at 1 kW/cm2 heat flux and evaporator exit vapor qualities at or exceeding 90% at less than 10% absolute pressure drop. Unlike previous experiments by the authors of this work, in which the header, manifold, and Si chip were press-fit together, in the present work, the header and manifold are formed as one unit, and the chip and header-manifold unit are bonded together using a proprietary soldering technique. These improvements remove all possible flow leakage points, ensuring that all of the fluid flows through the micro-grooved heat transfer surface, thereby improving thermal performance and preventing avoidable early onset of critical heat flux. In addition, this approach also reduces package weight and volume, and allows for better flow distribution due to larger internal flow area made possible from the manifold fabrication technology. This work will briefly describe the procedure used to metalize and solder the chip to the manifold, as well as leakage and pressure tests to ensure the system can handle the expected loads. It will then detail calibration of experimental apparatus, and the single-phase and two-phase experiments performed with the cooler, focusing on overall heat transfer coefficient and pressure drop results. In the end, single-phase experiments revealed the presence of microchannel clogging, which acts to increase pressure drop, reduce heat transfer coefficient, and introduce hotspots. The presence of hotspots was confirmed using an infrared camera. Two-phase tests achieved heat fluxes in excess of 560 W/cm2, and peak fin conductances between 200 kW/m2-K and 280 kW/m2-K at vapor qualities between 21-35%, respectively. However, higher heat fluxes, conductances, and vapor qualities are expected with removal or prevention of hotspots resulting from microchannel clogging.","PeriodicalId":426908,"journal":{"name":"2016 15th IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm)","volume":"42 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125673104","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2016-05-01DOI: 10.1109/ITHERM.2016.7517545
C. Raman, P. S. Sane
The use of thermally conductive plastics (TCPs) to achieve novel solutions to challenging thermal management problems is discussed in this paper. Theoretical, computational and experimental approaches are all used to explore the use of TCPs for thermal management. This paper examines the possibility of using TCP heat sinks under free- and forced-convection environments to achieve equivalent or even better thermal management solutions than traditional aluminum heat sinks. An alternate approach of enhancing existing plastic housings / enclosures and including them in the thermal management solution is also proposed. Various ways to formulate TCPs and the trade-offs to consider for each of them are also discussed.
{"title":"Thermally conductive plastics for innovative thermal management solutions","authors":"C. Raman, P. S. Sane","doi":"10.1109/ITHERM.2016.7517545","DOIUrl":"https://doi.org/10.1109/ITHERM.2016.7517545","url":null,"abstract":"The use of thermally conductive plastics (TCPs) to achieve novel solutions to challenging thermal management problems is discussed in this paper. Theoretical, computational and experimental approaches are all used to explore the use of TCPs for thermal management. This paper examines the possibility of using TCP heat sinks under free- and forced-convection environments to achieve equivalent or even better thermal management solutions than traditional aluminum heat sinks. An alternate approach of enhancing existing plastic housings / enclosures and including them in the thermal management solution is also proposed. Various ways to formulate TCPs and the trade-offs to consider for each of them are also discussed.","PeriodicalId":426908,"journal":{"name":"2016 15th IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm)","volume":"67 2","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114014804","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2016-05-01DOI: 10.1109/ITHERM.2016.7517726
J. Ditri, R. Cadotte, David M. Fetterolf, M. McNulty
This paper presents the results of an experimental investigation into the impact of microfluidic cooling on the performance of high power Gallium Nitride (GaN) amplifiers (HPAs). Electrical and thermal measurements were taken on a high frequency, broadband HPA, cooled using two different thermal management techniques; “conventional” (or remote) cooling where the chip is separated from its heat sink by several packaging materials, and a newly developed “embedded” microfluidic cooling technique where the coolant is brought into direct contact with the underside of the chip. Infrared (IR) thermal imaging was used to quantify the reduction in junction temperature, and simultaneous RF measurements of output power and drain current were used to quantify the RF benefits. The results show a 3× reduction in thermal resistance and 4.2 dB increase in gain for a given input power. In addition, the microfluidically cooled HPA produced over 8 dB increased output power. Finally, embedded cooling also improved the power added efficiency (PAE) of the amplifier by roughly 3× to 4× compared to its remotely cooled counterpart.
{"title":"Impact of microfluidic cooling on high power amplifier RF performance","authors":"J. Ditri, R. Cadotte, David M. Fetterolf, M. McNulty","doi":"10.1109/ITHERM.2016.7517726","DOIUrl":"https://doi.org/10.1109/ITHERM.2016.7517726","url":null,"abstract":"This paper presents the results of an experimental investigation into the impact of microfluidic cooling on the performance of high power Gallium Nitride (GaN) amplifiers (HPAs). Electrical and thermal measurements were taken on a high frequency, broadband HPA, cooled using two different thermal management techniques; “conventional” (or remote) cooling where the chip is separated from its heat sink by several packaging materials, and a newly developed “embedded” microfluidic cooling technique where the coolant is brought into direct contact with the underside of the chip. Infrared (IR) thermal imaging was used to quantify the reduction in junction temperature, and simultaneous RF measurements of output power and drain current were used to quantify the RF benefits. The results show a 3× reduction in thermal resistance and 4.2 dB increase in gain for a given input power. In addition, the microfluidically cooled HPA produced over 8 dB increased output power. Finally, embedded cooling also improved the power added efficiency (PAE) of the amplifier by roughly 3× to 4× compared to its remotely cooled counterpart.","PeriodicalId":426908,"journal":{"name":"2016 15th IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm)","volume":"71 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115163713","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2016-05-01DOI: 10.1109/ITHERM.2016.7517593
Weilin Yang, Hongxia Li, Tiejun Zhang, A. Chatterjee, I. Elfadel
Squeeze film air damping has significant impact on the performance of microelectromechanical devices. In order to understand the squeezed-film damping mechanism, Reynolds equation and its derivatives have been used in previous studies. In fact, the Reynolds equation has limitations in quantifying MEMS characteristics because its assumptions on small amplitude and non-slip boundary condition may not be satisfied in practice. Advanced modeling approaches should be considered to capture detailed energy dissipation physics. In this paper, we study the squeeze film air damping in MEMS using lattice Boltzmann method, which is derived from classical Boltzmann transport equation. Our major focus is to reveal how the air film is squeezed by the side movement of a comb structure. By considering the slippage and amplitude effect, direct lattice Boltzmann simulations are performed to obtain the Q factor. Viscous damping and elastic damping, two contributors to the energy loss, are quantitatively compared to reveal the dominant damping mechanism.
{"title":"Analysis of squeeze film air damping in MEMS with lattice Boltzmann method","authors":"Weilin Yang, Hongxia Li, Tiejun Zhang, A. Chatterjee, I. Elfadel","doi":"10.1109/ITHERM.2016.7517593","DOIUrl":"https://doi.org/10.1109/ITHERM.2016.7517593","url":null,"abstract":"Squeeze film air damping has significant impact on the performance of microelectromechanical devices. In order to understand the squeezed-film damping mechanism, Reynolds equation and its derivatives have been used in previous studies. In fact, the Reynolds equation has limitations in quantifying MEMS characteristics because its assumptions on small amplitude and non-slip boundary condition may not be satisfied in practice. Advanced modeling approaches should be considered to capture detailed energy dissipation physics. In this paper, we study the squeeze film air damping in MEMS using lattice Boltzmann method, which is derived from classical Boltzmann transport equation. Our major focus is to reveal how the air film is squeezed by the side movement of a comb structure. By considering the slippage and amplitude effect, direct lattice Boltzmann simulations are performed to obtain the Q factor. Viscous damping and elastic damping, two contributors to the energy loss, are quantitatively compared to reveal the dominant damping mechanism.","PeriodicalId":426908,"journal":{"name":"2016 15th IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm)","volume":"103 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128013129","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2016-05-01DOI: 10.1109/ITHERM.2016.7517579
L. Parnell, D. Demetriou, Eric Y. Zhang
As the science and engineering demand for high performance computing (HPC) grows beyond leading edge research institutions and communities to encompass routine activities of many disciplines, computing center infrastructures expand in their size, density and power demands. Long-practiced HPC center enhancements are increasingly demanding cooling methods that extend well beyond the capabilities of implementations that have become the staple of facility designs, even beyond those of the now-dominant architecture - commodity-processor-based, air-cooled rack clusters. As compute capacity aggressively increases in HPC centers, the power and cooling requirements, and thus cost of operation of the facilities, continues to rise correspondingly. This growth increasingly taxes the abilities of the hosting organizations to accommodate these demands. To address the challenge of meeting such pervasive demands, this paper examines energy efficiency in existing data centers from a two-pronged approach: employing direct water cooling and optimizing the facility infrastructure with as little capital investment to the building as possible.
{"title":"Combining cooling technology and facility design to improve HPC data center energy efficiency","authors":"L. Parnell, D. Demetriou, Eric Y. Zhang","doi":"10.1109/ITHERM.2016.7517579","DOIUrl":"https://doi.org/10.1109/ITHERM.2016.7517579","url":null,"abstract":"As the science and engineering demand for high performance computing (HPC) grows beyond leading edge research institutions and communities to encompass routine activities of many disciplines, computing center infrastructures expand in their size, density and power demands. Long-practiced HPC center enhancements are increasingly demanding cooling methods that extend well beyond the capabilities of implementations that have become the staple of facility designs, even beyond those of the now-dominant architecture - commodity-processor-based, air-cooled rack clusters. As compute capacity aggressively increases in HPC centers, the power and cooling requirements, and thus cost of operation of the facilities, continues to rise correspondingly. This growth increasingly taxes the abilities of the hosting organizations to accommodate these demands. To address the challenge of meeting such pervasive demands, this paper examines energy efficiency in existing data centers from a two-pronged approach: employing direct water cooling and optimizing the facility infrastructure with as little capital investment to the building as possible.","PeriodicalId":426908,"journal":{"name":"2016 15th IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm)","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132612384","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
京公网安备 11010802042870号
京ICP备2023020795号-1
扫码关注我们
求助内容：
应助结果提醒方式：