Pub Date : 2021-05-10DOI: 10.1109/SPI52361.2021.9505192
G. Phung, U. Arz
While a lot of investigations have been presented recently explaining the parasitic effects in on-wafer measurements caused by probes, neighborhood and environmental effects, this paper addresses the impact of chuck boundary conditions. Starting from a coplanar waveguide (CPW) measurement example, this paper demonstrates how the most relevant chuck parameters, i.e. thickness and relative permittivity, deteriorate the S-parameters of CPWs.
{"title":"Impact of Chuck Boundary Conditions on Wideband On-Wafer Measurements","authors":"G. Phung, U. Arz","doi":"10.1109/SPI52361.2021.9505192","DOIUrl":"https://doi.org/10.1109/SPI52361.2021.9505192","url":null,"abstract":"While a lot of investigations have been presented recently explaining the parasitic effects in on-wafer measurements caused by probes, neighborhood and environmental effects, this paper addresses the impact of chuck boundary conditions. Starting from a coplanar waveguide (CPW) measurement example, this paper demonstrates how the most relevant chuck parameters, i.e. thickness and relative permittivity, deteriorate the S-parameters of CPWs.","PeriodicalId":440368,"journal":{"name":"2021 IEEE 25th Workshop on Signal and Power Integrity (SPI)","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-05-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123953386","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-05-10DOI: 10.1109/SPI52361.2021.9505202
Allan Sánchez-Masís, A. Carmona-Cruz, Morten Schierholz, X. Duan, Kallol Roy, Cheng Yang, R. Rímolo-Donadío, C. Schuster
In an imbalanced classification problem the distribution of data across the known classes is biased or skewed. It poses a challenge for predictive modeling as most of the machine learning algorithms used for classification were designed around the assumption of an equal number of examples for each class. In this paper, we propose an approach to solve via interconnect classification problems by artificial neural networks, where the optimum hyperparameters of the networks are searched through a genetic algorithm. We solve the binary imbalanced classification problem for vias in time domain and frequency domain, including single and multilabel cases. Imbalanced learning techniques, like random oversampling and weighted binary crossentropy, are studied in combination with the genetic algorithm. We found standardization, F-measure, and imbalanced learning techniques are suitable to deal with minority label classification for this kind of signal integrity problems. The overall accuracy of our method is above 97%.
{"title":"ANN Hyperparameter Optimization by Genetic Algorithms for Via Interconnect Classification","authors":"Allan Sánchez-Masís, A. Carmona-Cruz, Morten Schierholz, X. Duan, Kallol Roy, Cheng Yang, R. Rímolo-Donadío, C. Schuster","doi":"10.1109/SPI52361.2021.9505202","DOIUrl":"https://doi.org/10.1109/SPI52361.2021.9505202","url":null,"abstract":"In an imbalanced classification problem the distribution of data across the known classes is biased or skewed. It poses a challenge for predictive modeling as most of the machine learning algorithms used for classification were designed around the assumption of an equal number of examples for each class. In this paper, we propose an approach to solve via interconnect classification problems by artificial neural networks, where the optimum hyperparameters of the networks are searched through a genetic algorithm. We solve the binary imbalanced classification problem for vias in time domain and frequency domain, including single and multilabel cases. Imbalanced learning techniques, like random oversampling and weighted binary crossentropy, are studied in combination with the genetic algorithm. We found standardization, F-measure, and imbalanced learning techniques are suitable to deal with minority label classification for this kind of signal integrity problems. The overall accuracy of our method is above 97%.","PeriodicalId":440368,"journal":{"name":"2021 IEEE 25th Workshop on Signal and Power Integrity (SPI)","volume":"279 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-05-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122726577","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-05-10DOI: 10.1109/SPI52361.2021.9505208
Tim Wang Lee, F. de Paulis, M. Resso, M. Piket-May, E. Bogatin
This paper introduces a non-destructive measurement technique that extracts the as-fabricated substrate height of printed circuit boards. The as-fabricated substrate height is a crucial parameter for dielectric constant extraction and impedance prediction of any fabricated printed circuit board. Multi-measurement and line fitting techniques were introduced to convert measured S-parameters of shorted transmission lines to frequency-dependent per-unit-length inductance. A computation routine used analytical PUL inductance equations to generate frequency-dependent PUL inductance curve with given substrate height. By changing the input substrate height and minimizing the difference between the calculated and measured PUL inductance results, the as-fabricated height was extracted. The obtained height value with associated uncertainty was shown to be consistent with substrate height measured with direct cross-section inspection.
{"title":"Non-destructive PCB Substrate Height Extraction with Multi-Measurement Technique","authors":"Tim Wang Lee, F. de Paulis, M. Resso, M. Piket-May, E. Bogatin","doi":"10.1109/SPI52361.2021.9505208","DOIUrl":"https://doi.org/10.1109/SPI52361.2021.9505208","url":null,"abstract":"This paper introduces a non-destructive measurement technique that extracts the as-fabricated substrate height of printed circuit boards. The as-fabricated substrate height is a crucial parameter for dielectric constant extraction and impedance prediction of any fabricated printed circuit board. Multi-measurement and line fitting techniques were introduced to convert measured S-parameters of shorted transmission lines to frequency-dependent per-unit-length inductance. A computation routine used analytical PUL inductance equations to generate frequency-dependent PUL inductance curve with given substrate height. By changing the input substrate height and minimizing the difference between the calculated and measured PUL inductance results, the as-fabricated height was extracted. The obtained height value with associated uncertainty was shown to be consistent with substrate height measured with direct cross-section inspection.","PeriodicalId":440368,"journal":{"name":"2021 IEEE 25th Workshop on Signal and Power Integrity (SPI)","volume":"64 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-05-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133136116","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-05-10DOI: 10.1109/SPI52361.2021.9505233
Pouya Namaki, N. Masoumi, M. Nezhad-Ahmadi, S. Safavi-Naeini
In this work, a method for developing a lumped-element circuit macro-modeling of micro/millimeter-wave flip-chip ball interconnects is proposed. The developed macro-model considers the effects of the transmission-line behavior of interconnects as well as the substrate physical characteristics of the chip and the printed circuit board (PCB). Full-wave simulations are used to generate the circuit model for a ground-signal-ground (GSG) bump structure. The derived highly efficient circuit model is verified against a full-wave simulation tool, proving a good agreement. Using the proposed modeling method, the impact of the flip-chip technology package on the electrical performance of high-speed electronic systems can be investigated in the pre-layout design stages that provides room for significant improvements.
{"title":"A Tunable Macro-Modeling Method for Signal Transition in mm-Wave Flip-Chip Technology","authors":"Pouya Namaki, N. Masoumi, M. Nezhad-Ahmadi, S. Safavi-Naeini","doi":"10.1109/SPI52361.2021.9505233","DOIUrl":"https://doi.org/10.1109/SPI52361.2021.9505233","url":null,"abstract":"In this work, a method for developing a lumped-element circuit macro-modeling of micro/millimeter-wave flip-chip ball interconnects is proposed. The developed macro-model considers the effects of the transmission-line behavior of interconnects as well as the substrate physical characteristics of the chip and the printed circuit board (PCB). Full-wave simulations are used to generate the circuit model for a ground-signal-ground (GSG) bump structure. The derived highly efficient circuit model is verified against a full-wave simulation tool, proving a good agreement. Using the proposed modeling method, the impact of the flip-chip technology package on the electrical performance of high-speed electronic systems can be investigated in the pre-layout design stages that provides room for significant improvements.","PeriodicalId":440368,"journal":{"name":"2021 IEEE 25th Workshop on Signal and Power Integrity (SPI)","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-05-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121189847","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-05-10DOI: 10.1109/SPI52361.2021.9505221
B. Bandali, E. Gad, M. Nakhla
This paper outlines a novel approach for simulating general nonlinear circuits in the time-domain. The proposed approach can be considered as the generalization of the numerical inversion Laplace transform (NILT) which has been used for circuits with only linear elements. The new approach enables the well-known advantages of NILT such the guaranteed numerical stability and the high-order approximation, to be carried to the domain of nonlinear circuit. A numerical example is given to demonstrate the validity of the proposed method.
{"title":"Fast and Stable Transient Simulation of Nonlinear Circuits using the Numerical Inversion of the Laplace Transform","authors":"B. Bandali, E. Gad, M. Nakhla","doi":"10.1109/SPI52361.2021.9505221","DOIUrl":"https://doi.org/10.1109/SPI52361.2021.9505221","url":null,"abstract":"This paper outlines a novel approach for simulating general nonlinear circuits in the time-domain. The proposed approach can be considered as the generalization of the numerical inversion Laplace transform (NILT) which has been used for circuits with only linear elements. The new approach enables the well-known advantages of NILT such the guaranteed numerical stability and the high-order approximation, to be carried to the domain of nonlinear circuit. A numerical example is given to demonstrate the validity of the proposed method.","PeriodicalId":440368,"journal":{"name":"2021 IEEE 25th Workshop on Signal and Power Integrity (SPI)","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-05-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126962199","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1900-01-01DOI: 10.1109/spi52361.2021.9505234
{"title":"[Front matter]","authors":"","doi":"10.1109/spi52361.2021.9505234","DOIUrl":"https://doi.org/10.1109/spi52361.2021.9505234","url":null,"abstract":"","PeriodicalId":440368,"journal":{"name":"2021 IEEE 25th Workshop on Signal and Power Integrity (SPI)","volume":"33 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116833270","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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