International Journal of Numerical Modelling-Electronic Networks Devices and Fields最新文献

This research presents an effective spectral collocation scheme based on orthogonalized Bernoulli polynomials for solving the time-fractional diffusion equation (TFDE). To provide a numerical method, we consider the Bernoulli polynomials and estimate the derivatives as well as the Caputo fractional derivative by operational matrices. By collocating the discretized equations, we obtain a system of algebraic equations. By solving this system, we obtain the approximate solution. The advantages of the suggested method are its low computational cost and exponential convergence. Also, the convergence analysis of the presented method is discussed. Finally, we present several test problems to demonstrate the capability of the proposed method. The obtained results are compared with the existing methods in the literature.

In the present study, we introduce an iterative technique grounded in shifted Vieta–Lucas polynomials for the numerical solution of nonlinear stochastic Volterra integral equations. Notably, our iterative approach is fast and provides solutions without solving algebraic equations. This method addresses nonlinear problems with high accuracy, making it very useful. We present an error estimation for the suggested approach, theoretically confirming its accuracy. Several numerical examples illustrate the practicality and efficacy of our technique. Furthermore, we compare the numerical outcomes of our method with those reported in existing literature and, whenever available, with exact solutions. This comparative analysis affirms the practicality and high precision of the suggested approach.

High data rate applications are becoming more popular every day. A small die area and low power consumption filters are essential for RF front-end modules in order to achieve effective integration. This paper presents two small, on-chip bandpass filters (BPFs) for 5G mm-wave communication systems based on the second-generation current-controlled current conveyor (CCCII) using 32 nm carbon nanotube field-effect transistors (CNTFET). The whale optimization algorithm is used for optimizing the current cut-off frequency and port X parasitic resistance (R_X) of the designed CCCII. The first filter is designed for the 5G n258 band, with a center frequency of 24.25–27.5 GHz, and the second one is designed for the 5G n260 band, with a center frequency of 37–40 GHz. The novelty of these CNTFET-based filters is that they are the first active filters, operating at the Ka-band frequency with low power consumption and a tiny size.

In this paper, a simple and novel residual parameter extraction technique is provided for impedance substrate calibration standards. It uses the measured scattering parameters of four calibration standards, that is the THRU, SHORT, OPEN, and LOAD standards, with only the DC resistance known in advance. Based on the electric structures and the frequency range of interest, the equivalent circuit of each standard is provided. The residual parameters in the equivalent circuits might show frequency dependence or frequency non-dependence, which are both considered in the following analysis. In the parameter extraction algorithm, no other calibration is needed. Instead, only the recorded raw data of the four standards are used, by assuming that the two ports of the SHORT, OPEN, and LOAD standards are symmetric and identical. A series of validation experiments are performed on a commercial calibration substrate, within the broad frequency range from 200 MHz to 110 GHz. The results have shown that the extracted residual parameters by using the proposed method are in very good consistency with the values provided by the manufacturer. In addition, the extracted parameters are further used for SOLT calibration, by measuring another group of calibration standards on the commercial calibration substrate. The calibration accuracy and reliability are further verified by using another open structure, a transmission line, and a mismatched load.

This paper investigates two conventional and four proposed structures designed by patterning the SiO₂ film over the (0°, 138.5°, 26.6°) cut langasite (LGS) substrate. The results are compared with those obtained with a langasite resonator designed without the SiO₂ film. All langasite structures are investigated at elevated temperatures up to 600°C using a 3-D finite element modeling method. The proposed structures are optimized for the lowest temperature coefficient of frequency (TCF) and high coupling factor (k²) as a function of SiO₂ film thickness for the operating temperature range. The optimized structure reduces the TCF to 2.52 ppm/°C at room temperature and for high temperatures to as low as 13.78 ppm/°C at 600°C. An enhanced coupling factor of 0.05% is obtained for the optimized structure at room temperature compared to the conventional structures. Thus, the systematically optimized structure may be selected to realize a temperature sensor that can perform at elevated temperatures.

This research article introduces a novel nanoscale ferroelectric field effect transistor (FeFET) structure design. The research work involves the analysis and simulation of semiconductor devices based on ferroelectric material, focusing on key parameters such as drain current, transconductance, acceptor concentrations, energy band diagram, and electric potential. The FeFET's performance is thoroughly investigated with respect to ON current, OFF current, and sub-threshold slope. Parametric analysis of the FeFET is conducted to explore its suitability for low-power circuit applications. The presented FeFET device exhibits impressive characteristics, including a high ON current (I_ON = 4.5 × 10⁻⁵ A) and a low OFF current (I_OFF = 8.4 × 10⁻¹² A). To assess its performance, the FeFET is modeled and simulated using TCAD software. The study also investigates the influence of various parameters, such as gate length, gate oxide thickness, and ferroelectric film thickness, on the device's behavior and performance. This comprehensive research provides valuable insights into the design and optimization of nanoscale FeFET structures based on ferroelectric materials.

In this manuscript, a novel double-gate PIN (DGPIN) photodiode has been proposed which exhibits faster changing of the photocurrent amplitude against changing of the light intensity. So, it can improve the slow switching operation of the ordinary PIN (OPIN) photodiode. In the proposed DGPIN, two metal-oxide-semiconductor (MOS) contacts (called the gates) on both sides of the intrinsic region have been considered. By biasing the gates, the potential barrier in the energy bands between the anode and cathode is decreased. So, the generated carriers can drift through the intrinsic region faster and the recovery time is reduced. Also, it has been shown that the forward and reverse trajectories in the photocurrent-light intensity curve (formed by increasing and decreasing of the illuminating light intensity, respectively) are closer in the DGPIN which indicates more linear current–light behavior for the DGPIN than the OPIN. For evaluating the linearity of the current–light behavior, the corresponding curves have been simply modeled by fitting ellipses. For the fitting ellipses, closer eccentricity to 1 indicates more linear current–light behavior and larger rotation angle indicates smaller recovery time of the device. By using this simple model, the effects of changing the physical and geometrical parameters of the proposed DGPIN on its linear operation and recovery time have been investigated.

Leveraging Miller's concept, a general approach for multi-stage amplifier frequency compensation is proposed. The idea is repeating a Miller pattern on intermediate nodes. In this way Miller capacitor at the output of a differential gain stage, manipulates poles and zeros locations to achieve the desired frequency response. The idea is applied to four and five-stage amplifiers. The linear transfer function (TF) and poles-zeros formulations are calculated for both amplifiers while circuit implementations are simulated using 0.18 μm CMOS technology. According to both theoretical description and simulation results, the proposed frequency compensation appropriately stabilized the amplifier with excellent performance. Obtaining more than 13 MHz for GBW with 83° phase margin while whole the four-stage amplifier consumes less than 320 μW. Ample simulation results are provided to express the reliability and robustness of the proposed approach. In this view, the proposed compensation method besides its design methodology can be used for almost any analog and mix-mode systems such as modulators, sensors, and data converters.

In this article, a novel textile jeans antenna is introduced that can cover range of frequencies from 3.85 to 14.58 GHz with a return loss of −23.02 dB at its lower working frequency of 4.8 GHz. To perform the simulation, the antenna is designed on the jeans substrate with $��{ϵ}_r�$ of 1.7 and size of 43.6 × 49 × 1 mm³ (0.7λ₀ × 0.8λ₀ × 0.016λ₀ at frequency 4.8 GHz) Moreover, for improving bandwidth, defective ground structure (DGS) is used which provides a wide bandwidth range of 116.44%. The peak gain is found to be 4.5, 4.4, and 4.3 dBi at 4.8, 8.98, and 13.45 GHz, respectively. However, the efficiency is found more than 70% in operating band. The proposed antenna has omni-directional pattern for radiation and has good bending and wet characteristics suitable for IoT application like Wi-Max and AI, IoT devices such as automotive and robotics. The specific absorption ratio at 4.8 GHz is found to be maximum near the feed point which is 0.00596 W/kg for 10 g of tissue which is low as compared to standard value of 1.6 W/kg for 10 g of tissue.