Pub Date : 2010-08-05DOI: 10.1109/TADVP.2010.2061229
G. Antonini, A. Ruehli
In this paper we present a waveform relaxation approach for the transient analysis of 3-D electromagnetic problems using the partial element equivalent circuit (PEEC) method. Relying on weaker couplings among separated systems, a waveform relaxation scheme is proposed to accelerate the transient analysis of large electromagnetic problems. The results are compared with those obtained using a conventional PEEC formulation. They exhibit a significant speed-up while preserving the solution accuracy.
{"title":"Waveform Relaxation Time Domain Solver for Subsystem Arrays","authors":"G. Antonini, A. Ruehli","doi":"10.1109/TADVP.2010.2061229","DOIUrl":"https://doi.org/10.1109/TADVP.2010.2061229","url":null,"abstract":"In this paper we present a waveform relaxation approach for the transient analysis of 3-D electromagnetic problems using the partial element equivalent circuit (PEEC) method. Relying on weaker couplings among separated systems, a waveform relaxation scheme is proposed to accelerate the transient analysis of large electromagnetic problems. The results are compared with those obtained using a conventional PEEC formulation. They exhibit a significant speed-up while preserving the solution accuracy.","PeriodicalId":55015,"journal":{"name":"IEEE Transactions on Advanced Packaging","volume":"33 1","pages":"760-768"},"PeriodicalIF":0.0,"publicationDate":"2010-08-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/TADVP.2010.2061229","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"62399015","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-08-03DOI: 10.1109/TADVP.2009.2026950
J. Leib, F. Bieck, U. Hansen, Kok-Kheong Looi, H. Ngo, V. Seidemann, D. Shariff, D. Studzinski, N. Suthiwongsunthorn, K. Tan, R. Wilke, Kwong-Loon Yam, M. Töpper
Through-silicon-via (TSV) interconnects using the “via-last” approach are successfully applied for wafer-level packaging of complementary metal-oxide-semiconductor (CMOS) image sensors. Standard materials and processes are applied for redistribution on the backside of the devices, which is enabled by the use of plasma etched vias with tapered sidewalls. With this, high reliability for the packaged devices are achieved on component and board level. Based on the high uniformity for the via geometry in respect to the dimension of top opening, bottom opening, and sidewall angle, we discuss the coverage of those redistribution polymers and photo resists as the bases for high performance and high yield of the mature wafer-level packaging process for optical and M(O)EMS devices.
{"title":"Tapered Through-Silicon-Via Interconnects for Wafer-Level Packaging of Sensor Devices","authors":"J. Leib, F. Bieck, U. Hansen, Kok-Kheong Looi, H. Ngo, V. Seidemann, D. Shariff, D. Studzinski, N. Suthiwongsunthorn, K. Tan, R. Wilke, Kwong-Loon Yam, M. Töpper","doi":"10.1109/TADVP.2009.2026950","DOIUrl":"https://doi.org/10.1109/TADVP.2009.2026950","url":null,"abstract":"Through-silicon-via (TSV) interconnects using the “via-last” approach are successfully applied for wafer-level packaging of complementary metal-oxide-semiconductor (CMOS) image sensors. Standard materials and processes are applied for redistribution on the backside of the devices, which is enabled by the use of plasma etched vias with tapered sidewalls. With this, high reliability for the packaged devices are achieved on component and board level. Based on the high uniformity for the via geometry in respect to the dimension of top opening, bottom opening, and sidewall angle, we discuss the coverage of those redistribution polymers and photo resists as the bases for high performance and high yield of the mature wafer-level packaging process for optical and M(O)EMS devices.","PeriodicalId":55015,"journal":{"name":"IEEE Transactions on Advanced Packaging","volume":"33 1","pages":"713-721"},"PeriodicalIF":0.0,"publicationDate":"2010-08-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/TADVP.2009.2026950","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"62393257","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-08-01DOI: 10.1109/TADVP.2009.2033572
F. Paulis, L. Raimondo, Antonio Orlandi
This paper investigates the relationship among the high-frequency performances of a planar electromagnetic bandgap structure for power integrity applications and its static (dc) behavior. The IR-Drop and the thermal performances are accurately investigated through 3-D simulations. Measurements of the high-frequency electromagnetic properties and of the temperature variation are also performed for validating the models employed in the analysis.
{"title":"IR-DROP Analysis and Thermal Assessment of Planar Electromagnetic Bandgap Structures for Power Integrity Applications","authors":"F. Paulis, L. Raimondo, Antonio Orlandi","doi":"10.1109/TADVP.2009.2033572","DOIUrl":"https://doi.org/10.1109/TADVP.2009.2033572","url":null,"abstract":"This paper investigates the relationship among the high-frequency performances of a planar electromagnetic bandgap structure for power integrity applications and its static (dc) behavior. The IR-Drop and the thermal performances are accurately investigated through 3-D simulations. Measurements of the high-frequency electromagnetic properties and of the temperature variation are also performed for validating the models employed in the analysis.","PeriodicalId":55015,"journal":{"name":"IEEE Transactions on Advanced Packaging","volume":"115 1","pages":"617-622"},"PeriodicalIF":0.0,"publicationDate":"2010-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/TADVP.2009.2033572","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"62394635","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-08-01DOI: 10.1109/TADVP.2009.2032158
K. L. Lin, J. Chae, K. Jain
Stretchable interconnects play an important role towards the realization of the realm of systems that include large-area sensor skins and wearable electronics. These interconnects must be reliable and robust for viability, and must be flexible, stretchable, and conformable to nonplanar surfaces for diverse applicability. This research describes the design, modeling, fabrication, and testing of stretchable interconnects on polymer substrates using metal patterns both as functional interconnect layers and as in situ masks for excimer laser photoablation. The fluences for photoablation of polymers are generally much lower than the threshold fluence for removal or damage of metals; thus, metal thin films that are designed as structural layers in the sensor skin can be used as in situ masks for polymers if the proper fluence is used. Self-aligned single-layer and multilayer interconnects of various designs (rectilinear and “meandering”) have been fabricated, and certain “meandering” interconnect designs can be stretched up to 50% uniaxially while maintaining good electrical conductivity and structural integrity. Furthermore, redundant interconnect meshes have been modeled and fabricated that increase the viability of the interconnect mesh while stretching up to 30% uniaxially and a prototype redundant interconnect mesh has been fabricated using seamless-scanning large-area fabrication techniques.
{"title":"Design and Fabrication of Large-Area, Redundant, Stretchable Interconnect Meshes Using Excimer Laser Photoablation and In Situ Masking","authors":"K. L. Lin, J. Chae, K. Jain","doi":"10.1109/TADVP.2009.2032158","DOIUrl":"https://doi.org/10.1109/TADVP.2009.2032158","url":null,"abstract":"Stretchable interconnects play an important role towards the realization of the realm of systems that include large-area sensor skins and wearable electronics. These interconnects must be reliable and robust for viability, and must be flexible, stretchable, and conformable to nonplanar surfaces for diverse applicability. This research describes the design, modeling, fabrication, and testing of stretchable interconnects on polymer substrates using metal patterns both as functional interconnect layers and as in situ masks for excimer laser photoablation. The fluences for photoablation of polymers are generally much lower than the threshold fluence for removal or damage of metals; thus, metal thin films that are designed as structural layers in the sensor skin can be used as in situ masks for polymers if the proper fluence is used. Self-aligned single-layer and multilayer interconnects of various designs (rectilinear and “meandering”) have been fabricated, and certain “meandering” interconnect designs can be stretched up to 50% uniaxially while maintaining good electrical conductivity and structural integrity. Furthermore, redundant interconnect meshes have been modeled and fabricated that increase the viability of the interconnect mesh while stretching up to 30% uniaxially and a prototype redundant interconnect mesh has been fabricated using seamless-scanning large-area fabrication techniques.","PeriodicalId":55015,"journal":{"name":"IEEE Transactions on Advanced Packaging","volume":"33 1","pages":"592-601"},"PeriodicalIF":0.0,"publicationDate":"2010-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/TADVP.2009.2032158","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"62394270","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-07-29DOI: 10.1109/TADVP.2010.2054089
P. Gunupudi, T. Smy, J. Klein, Z. Jakubczyk
This paper addresses the need for self-consistent simulation of mixed electrical and optical circuits and systems. Drawing on the use of modified nodal analysis (MNA) techniques ubiquitous in circuit simulation, an optical node is formulated which includes the magnitude and phase of the optical signal being simulated. This node consists of two propagating complex envelopes one for the forward direction and the other for the reverse direction. Using this formulation models are developed for a variety of devices including: lasers, photodiodes, multimode fiber, and optical connectors. The formulation allows for definition of multiple optical channels at different carrier frequencies, enables quick simulation of systems with large optical delays and optical interference effects. Several numerical examples are presented in this paper to illustrate the capability of the proposed framework and where practicable the results were compared to commercial simulators. These examples include a multimode fiber optical link, an integrated array of laser sources and a feedback controlled laser source used in a optical link with modulation achieved by the use of an electro-absorption device.
{"title":"Self-Consistent Simulation of Opto-Electronic Circuits Using a Modified Nodal Analysis Formulation","authors":"P. Gunupudi, T. Smy, J. Klein, Z. Jakubczyk","doi":"10.1109/TADVP.2010.2054089","DOIUrl":"https://doi.org/10.1109/TADVP.2010.2054089","url":null,"abstract":"This paper addresses the need for self-consistent simulation of mixed electrical and optical circuits and systems. Drawing on the use of modified nodal analysis (MNA) techniques ubiquitous in circuit simulation, an optical node is formulated which includes the magnitude and phase of the optical signal being simulated. This node consists of two propagating complex envelopes one for the forward direction and the other for the reverse direction. Using this formulation models are developed for a variety of devices including: lasers, photodiodes, multimode fiber, and optical connectors. The formulation allows for definition of multiple optical channels at different carrier frequencies, enables quick simulation of systems with large optical delays and optical interference effects. Several numerical examples are presented in this paper to illustrate the capability of the proposed framework and where practicable the results were compared to commercial simulators. These examples include a multimode fiber optical link, an integrated array of laser sources and a feedback controlled laser source used in a optical link with modulation achieved by the use of an electro-absorption device.","PeriodicalId":55015,"journal":{"name":"IEEE Transactions on Advanced Packaging","volume":"33 1","pages":"979-993"},"PeriodicalIF":0.0,"publicationDate":"2010-07-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/TADVP.2010.2054089","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"62398991","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-07-29DOI: 10.1109/TADVP.2010.2052923
A. Goyal, M. Swaminathan, A. Chatterjee
A low-cost test method is proposed for testing integrated radio-frequency (RF) substrates with embedded RF passive filters. The proposed method enables the testing of embedded high-frequency gigahertz filters by the analysis of low-frequency signal of the order of 100 MHz. In addition, the test method allows the testing without injecting external test stimulus into RF filters. Hence, significant reduction in the test cost is achieved by the proposed test method. As compared to the conventional test method which uses vector network analyzer (VNA), the proposed method reduces the test-setup cost by around 75%. The proposed test method relies on three core principles. First, the RF filter is made a part of the feedback network of an external RF amplifier circuit located on the probe card, thereby causing the amplifier to oscillate. Second, the output spectrum of the amplifier (GHz) is down-converted to a lower frequency (MHz) to facilitate test response measurement. Third, RF (GHz) specifications of the filters are predicted by the analysis of the low-frequency (MHz) test-setup output. Both parametric and catastrophic failures in the embedded high-frequency (GHz) passive filter can be detected at low-frequency (MHz) by monitoring the change in the oscillation frequency of the proposed test setup. The test method is demonstrated with both simulations and measurements.
{"title":"Low-Frequency and Low-Cost Test Methodology for Integrated RF Substrates","authors":"A. Goyal, M. Swaminathan, A. Chatterjee","doi":"10.1109/TADVP.2010.2052923","DOIUrl":"https://doi.org/10.1109/TADVP.2010.2052923","url":null,"abstract":"A low-cost test method is proposed for testing integrated radio-frequency (RF) substrates with embedded RF passive filters. The proposed method enables the testing of embedded high-frequency gigahertz filters by the analysis of low-frequency signal of the order of 100 MHz. In addition, the test method allows the testing without injecting external test stimulus into RF filters. Hence, significant reduction in the test cost is achieved by the proposed test method. As compared to the conventional test method which uses vector network analyzer (VNA), the proposed method reduces the test-setup cost by around 75%. The proposed test method relies on three core principles. First, the RF filter is made a part of the feedback network of an external RF amplifier circuit located on the probe card, thereby causing the amplifier to oscillate. Second, the output spectrum of the amplifier (GHz) is down-converted to a lower frequency (MHz) to facilitate test response measurement. Third, RF (GHz) specifications of the filters are predicted by the analysis of the low-frequency (MHz) test-setup output. Both parametric and catastrophic failures in the embedded high-frequency (GHz) passive filter can be detected at low-frequency (MHz) by monitoring the change in the oscillation frequency of the proposed test setup. The test method is demonstrated with both simulations and measurements.","PeriodicalId":55015,"journal":{"name":"IEEE Transactions on Advanced Packaging","volume":"33 1","pages":"669-680"},"PeriodicalIF":0.0,"publicationDate":"2010-07-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/TADVP.2010.2052923","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"62398809","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-07-26DOI: 10.1109/TADVP.2010.2053537
Wenwen Chai, D. Jiao
A fast LU factorization of linear complexity is developed to directly solve a dense system of linear equations for the capacitance extraction of any arbitrary shaped 3-D structure embedded in inhomogeneous materials. In addition, a higher-order scheme is developed to achieve any higher-order accuracy for the proposed fast solver without sacrificing its linear computational complexity. The proposed solver successfully factorizes dense matrices that involve more than one million unknowns in fast CPU run time and modest memory consumption. Comparisons with state-of-the-art integral-equation-based capacitance solvers have demonstrated its clear advantages. In addition to capacitance extraction, the proposed LU solver has been successfully applied to large-scale full-wave extraction.
{"title":"An LU Decomposition Based Direct Integral Equation Solver of Linear Complexity and Higher-Order Accuracy for Large-Scale Interconnect Extraction","authors":"Wenwen Chai, D. Jiao","doi":"10.1109/TADVP.2010.2053537","DOIUrl":"https://doi.org/10.1109/TADVP.2010.2053537","url":null,"abstract":"A fast LU factorization of linear complexity is developed to directly solve a dense system of linear equations for the capacitance extraction of any arbitrary shaped 3-D structure embedded in inhomogeneous materials. In addition, a higher-order scheme is developed to achieve any higher-order accuracy for the proposed fast solver without sacrificing its linear computational complexity. The proposed solver successfully factorizes dense matrices that involve more than one million unknowns in fast CPU run time and modest memory consumption. Comparisons with state-of-the-art integral-equation-based capacitance solvers have demonstrated its clear advantages. In addition to capacitance extraction, the proposed LU solver has been successfully applied to large-scale full-wave extraction.","PeriodicalId":55015,"journal":{"name":"IEEE Transactions on Advanced Packaging","volume":"33 1","pages":"794-803"},"PeriodicalIF":0.0,"publicationDate":"2010-07-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/TADVP.2010.2053537","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"62398866","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-07-26DOI: 10.1109/TADVP.2010.2052806
Su-Tsai Lu, Wen-Hwa Chen
The need for flexible interconnects in advanced applications in consumer electronic products is increasing rapidly. The reliability and flexibility of ultra-thin chip-on-flex (UTCOF) interconnects formed using anisotropic conductive adhesive (ACA) are thus investigated. Two films of ACA materials, namely ACA-P and ACA-F, are assembled at different bonding temperatures to study the effect of temperature on the adhesion at the substrate-adhesive and adhesive-chip interfaces using differential scanning calorimetry (DSC) and a 90° peeling test. The contact resistance of a daisy chain with 188 input/output (I/O) is measured to examine the quality of bonding through dummy test samples with an 80-μm pitch. The reliability of the fabricated UTCOF interconnects bonded via selected ACA joints is evaluated by performing an 85°C/85% RH thermal humidity storage test (THST) for 1000 h, and their flexibility is evaluated in static bending and four-point bending tests. The interfaces between the ultra-thin silicon chip and the substrate of failed samples in the THST and four-point bending testing are then investigated by scanning electron microscopy (SEM), which is utilized to obtain cross-sectional images. Finite element analysis is also conducted to elucidate the failure mechanism of the UTCOF interconnects in the four-point bending test. The averaged maximum allowable deflections of the fabricated UTCOF interconnects with ACA-P and ACA-F materials are 26% and 168%, respectively, higher than those of the COF interconnects with a chip thickness of 670 μm. Moreover, the contact resistance remains stable, varying by less than 10%, in the static bending test with a bending radius of 30 mm. According to the results thus obtained, give the appropriate choice of an ACA material and the optimal curing conditions, the UTCOF interconnects with ACA joints reliably serve as flexible interconnects for use in consumer electronic products.
{"title":"Reliability and Flexibility of Ultra-Thin Chip-on-Flex (UTCOF) Interconnects With Anisotropic Conductive Adhesive (ACA) Joints","authors":"Su-Tsai Lu, Wen-Hwa Chen","doi":"10.1109/TADVP.2010.2052806","DOIUrl":"https://doi.org/10.1109/TADVP.2010.2052806","url":null,"abstract":"The need for flexible interconnects in advanced applications in consumer electronic products is increasing rapidly. The reliability and flexibility of ultra-thin chip-on-flex (UTCOF) interconnects formed using anisotropic conductive adhesive (ACA) are thus investigated. Two films of ACA materials, namely ACA-P and ACA-F, are assembled at different bonding temperatures to study the effect of temperature on the adhesion at the substrate-adhesive and adhesive-chip interfaces using differential scanning calorimetry (DSC) and a 90° peeling test. The contact resistance of a daisy chain with 188 input/output (I/O) is measured to examine the quality of bonding through dummy test samples with an 80-μm pitch. The reliability of the fabricated UTCOF interconnects bonded via selected ACA joints is evaluated by performing an 85°C/85% RH thermal humidity storage test (THST) for 1000 h, and their flexibility is evaluated in static bending and four-point bending tests. The interfaces between the ultra-thin silicon chip and the substrate of failed samples in the THST and four-point bending testing are then investigated by scanning electron microscopy (SEM), which is utilized to obtain cross-sectional images. Finite element analysis is also conducted to elucidate the failure mechanism of the UTCOF interconnects in the four-point bending test. The averaged maximum allowable deflections of the fabricated UTCOF interconnects with ACA-P and ACA-F materials are 26% and 168%, respectively, higher than those of the COF interconnects with a chip thickness of 670 μm. Moreover, the contact resistance remains stable, varying by less than 10%, in the static bending test with a bending radius of 30 mm. According to the results thus obtained, give the appropriate choice of an ACA material and the optimal curing conditions, the UTCOF interconnects with ACA joints reliably serve as flexible interconnects for use in consumer electronic products.","PeriodicalId":55015,"journal":{"name":"IEEE Transactions on Advanced Packaging","volume":"33 1","pages":"702-712"},"PeriodicalIF":0.0,"publicationDate":"2010-07-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/TADVP.2010.2052806","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"62398898","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-07-26DOI: 10.1109/TADVP.2010.2052360
Barry J. Rubin
This paper describes techniques and advances for mesh generation and refinement for the analysis of electrical package structures. After a brief review of meshing techniques, a physically based justification is provided for the basic elements of gridding required to accurately represent the following physical issues: edge-effects, projection gridding for signal return currents, conductor proximity, skin-effect, frequency effects, and dielectrics. These individual gridding components are then incorporated into a comprehensive, global algorithm. Many other meshing issues are addressed, including constraints associated with the underlying electromagnetic calculation kernel, removal of superfluous grid lines, assuring symmetric results for symmetric structures, and consistency related to causality and nonphysical effects. A number of 2D and 3D examples are taken from various codes developed by the author and novel techniques are given for effectively gridding 2D structures having even extreme geometric aspect ratios.
{"title":"Physics-Based Gridding for Electrical Package Analysis Codes","authors":"Barry J. Rubin","doi":"10.1109/TADVP.2010.2052360","DOIUrl":"https://doi.org/10.1109/TADVP.2010.2052360","url":null,"abstract":"This paper describes techniques and advances for mesh generation and refinement for the analysis of electrical package structures. After a brief review of meshing techniques, a physically based justification is provided for the basic elements of gridding required to accurately represent the following physical issues: edge-effects, projection gridding for signal return currents, conductor proximity, skin-effect, frequency effects, and dielectrics. These individual gridding components are then incorporated into a comprehensive, global algorithm. Many other meshing issues are addressed, including constraints associated with the underlying electromagnetic calculation kernel, removal of superfluous grid lines, assuring symmetric results for symmetric structures, and consistency related to causality and nonphysical effects. A number of 2D and 3D examples are taken from various codes developed by the author and novel techniques are given for effectively gridding 2D structures having even extreme geometric aspect ratios.","PeriodicalId":55015,"journal":{"name":"IEEE Transactions on Advanced Packaging","volume":"33 1","pages":"828-838"},"PeriodicalIF":0.0,"publicationDate":"2010-07-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/TADVP.2010.2052360","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"62398845","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-07-19DOI: 10.1109/TADVP.2010.2052807
Zheng Zhang, N. Wong
This paper extends the generalized Hamiltonian method (GHM) (Zhang , 2009; Zhang and Wong, 2010) and its half-size variant (HGHM) (Zhang and Wong, 2010) to their S -parameter counterparts (called S-GHM and S-HGHM, respectively), for testing the passivity of S -parameter descriptor-form models widely used in high-speed circuit and electromagnetic simulations. The proposed methods are capable of accurately detecting the possible nonpassive regions of descriptor-form models with either scattering or hybrid (impedance or admittance) transfer matrices. Their effectiveness and accuracy are verified with several practical examples. The S-GHM and S-HGHM methods presented here provide a foundation for the passivity enforcement of S-parameter descriptor systems.
{"title":"Passivity Check of $S$-Parameter Descriptor Systems via $S$-Parameter Generalized Hamiltonian Methods","authors":"Zheng Zhang, N. Wong","doi":"10.1109/TADVP.2010.2052807","DOIUrl":"https://doi.org/10.1109/TADVP.2010.2052807","url":null,"abstract":"This paper extends the generalized Hamiltonian method (GHM) (Zhang , 2009; Zhang and Wong, 2010) and its half-size variant (HGHM) (Zhang and Wong, 2010) to their S -parameter counterparts (called S-GHM and S-HGHM, respectively), for testing the passivity of S -parameter descriptor-form models widely used in high-speed circuit and electromagnetic simulations. The proposed methods are capable of accurately detecting the possible nonpassive regions of descriptor-form models with either scattering or hybrid (impedance or admittance) transfer matrices. Their effectiveness and accuracy are verified with several practical examples. The S-GHM and S-HGHM methods presented here provide a foundation for the passivity enforcement of S-parameter descriptor systems.","PeriodicalId":55015,"journal":{"name":"IEEE Transactions on Advanced Packaging","volume":"33 1","pages":"1034-1042"},"PeriodicalIF":0.0,"publicationDate":"2010-07-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/TADVP.2010.2052807","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"62398957","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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