Pub Date : 2010-07-19DOI: 10.1109/TADVP.2010.2042808
E. Rasekh, A. Dounavis
This paper presents an efficient model order reduction algorithm for simulating large interconnect networks with many nonlinear elements. The proposed methodology is based on a multidimensional subspace method and uses constraint equations to link the nonlinear elements and biasing sources to the reduced order model. This approach significantly improves the simulation time of distributed nonlinear systems, since additional ports are not required to link the nonlinear elements to the reduced order model, yielding appreciable savings in the size of the reduced order model and computational time. Numerical examples are provided to illustrate the validity of the proposed algorithm.
{"title":"A Multidimensional Krylov Reduction Technique With Constraint Variables to Model Nonlinear Distributed Networks","authors":"E. Rasekh, A. Dounavis","doi":"10.1109/TADVP.2010.2042808","DOIUrl":"https://doi.org/10.1109/TADVP.2010.2042808","url":null,"abstract":"This paper presents an efficient model order reduction algorithm for simulating large interconnect networks with many nonlinear elements. The proposed methodology is based on a multidimensional subspace method and uses constraint equations to link the nonlinear elements and biasing sources to the reduced order model. This approach significantly improves the simulation time of distributed nonlinear systems, since additional ports are not required to link the nonlinear elements to the reduced order model, yielding appreciable savings in the size of the reduced order model and computational time. Numerical examples are provided to illustrate the validity of the proposed algorithm.","PeriodicalId":55015,"journal":{"name":"IEEE Transactions on Advanced Packaging","volume":"33 1","pages":"738-746"},"PeriodicalIF":0.0,"publicationDate":"2010-07-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/TADVP.2010.2042808","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"62396846","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-07-19DOI: 10.1109/TADVP.2010.2047395
Kyoungchoul Koo, Yujeong Shim, C. Yoon, Jaemin Kim, Jeongsik Yoo, J. Pak, Joungho Kim
In this paper, we analyze the power supply noise imbalance and its effects on simultaneous switching noise coupling to an ultra high frequency differential low noise amplifier (LNA) in a system-in-package (SiP) through an off-chip power distribution network (PDN). On and off-chip sources of power supply noise imbalance in a LNA in a SiP were analyzed. A simultaneous switching noise coupling coefficient for the differential LNA output caused by power supply noise imbalance was simulated through co-modeling a hierarchical on and off-chip PDN. The simulation results were validated by measuring the simultaneous switching noise coupling voltage at the differential LNA output. Further validation of four types of a LNA with different PDN designs demonstrates that simultaneous switching noise coupling to the differential LNA output caused by power supply noise imbalance highly depends on the design of the PDN of the SiP.
{"title":"Modeling and Analysis of Power Supply Noise Imbalance on Ultra High Frequency Differential Low Noise Amplifiers in a System-in-Package","authors":"Kyoungchoul Koo, Yujeong Shim, C. Yoon, Jaemin Kim, Jeongsik Yoo, J. Pak, Joungho Kim","doi":"10.1109/TADVP.2010.2047395","DOIUrl":"https://doi.org/10.1109/TADVP.2010.2047395","url":null,"abstract":"In this paper, we analyze the power supply noise imbalance and its effects on simultaneous switching noise coupling to an ultra high frequency differential low noise amplifier (LNA) in a system-in-package (SiP) through an off-chip power distribution network (PDN). On and off-chip sources of power supply noise imbalance in a LNA in a SiP were analyzed. A simultaneous switching noise coupling coefficient for the differential LNA output caused by power supply noise imbalance was simulated through co-modeling a hierarchical on and off-chip PDN. The simulation results were validated by measuring the simultaneous switching noise coupling voltage at the differential LNA output. Further validation of four types of a LNA with different PDN designs demonstrates that simultaneous switching noise coupling to the differential LNA output caused by power supply noise imbalance highly depends on the design of the PDN of the SiP.","PeriodicalId":55015,"journal":{"name":"IEEE Transactions on Advanced Packaging","volume":"46 1","pages":"602-616"},"PeriodicalIF":0.0,"publicationDate":"2010-07-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/TADVP.2010.2047395","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"62397193","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-07-01DOI: 10.1109/TADVP.2010.2049355
A. Majumdar, J. Cunningham, A. Krishnamoorthy
We present a comparative analysis of different physical approaches to chip-to-chip proximity communication, PxC, based on capacitive, inductive and optical signalling. Each method is modeled theoretically and the tolerances for packaging are identified. Analytical formulas for performance in terms of the pad size and pad spacing are derived and compared to reported experimental data. The tolerance of each communication method to misalignment is reported. The design space in terms of channel density and chip separation for capacitive and inductive proximity communication is explored for a specified bit-error-rate (BER) or signal-to-noise ratio (SNR) and transmitter power or voltage. The relative merits of each technology are discussed. A general conclusion is that capacitive proximity communication is advantageous for dense communication with small pads at low voltages and when low raw bit-error rates are required; however a hard requirement for vertical separation between chips is identified, independent of the area of the pads, and fixed by the supply voltage and the technology parameters. On the other hand, inductive communication provides a larger working range of chip separations, and is advantageous when larger pad sizes are used; however the minimum voltage is similarly constrained in order to maintain low bit-error rates. Optical proximity communication potentially provides the largest chip separations, but has low tolerance to in-plane misalignment.
{"title":"Alignment and Performance Considerations for Capacitive, Inductive, and Optical Proximity Communication","authors":"A. Majumdar, J. Cunningham, A. Krishnamoorthy","doi":"10.1109/TADVP.2010.2049355","DOIUrl":"https://doi.org/10.1109/TADVP.2010.2049355","url":null,"abstract":"We present a comparative analysis of different physical approaches to chip-to-chip proximity communication, PxC, based on capacitive, inductive and optical signalling. Each method is modeled theoretically and the tolerances for packaging are identified. Analytical formulas for performance in terms of the pad size and pad spacing are derived and compared to reported experimental data. The tolerance of each communication method to misalignment is reported. The design space in terms of channel density and chip separation for capacitive and inductive proximity communication is explored for a specified bit-error-rate (BER) or signal-to-noise ratio (SNR) and transmitter power or voltage. The relative merits of each technology are discussed. A general conclusion is that capacitive proximity communication is advantageous for dense communication with small pads at low voltages and when low raw bit-error rates are required; however a hard requirement for vertical separation between chips is identified, independent of the area of the pads, and fixed by the supply voltage and the technology parameters. On the other hand, inductive communication provides a larger working range of chip separations, and is advantageous when larger pad sizes are used; however the minimum voltage is similarly constrained in order to maintain low bit-error rates. Optical proximity communication potentially provides the largest chip separations, but has low tolerance to in-plane misalignment.","PeriodicalId":55015,"journal":{"name":"IEEE Transactions on Advanced Packaging","volume":"33 1","pages":"690-701"},"PeriodicalIF":0.0,"publicationDate":"2010-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/TADVP.2010.2049355","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"62397936","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-06-28DOI: 10.1109/TADVP.2010.2049018
In-Kui Cho, J. Yun, M. Jeong, Hyo-Hoon Park
This paper describes a new optical link system which consists of a metal optical bench, a module printed circuit board, a driver/receiver integrated circuit, a vertical-cavity surface-emitting laser/photo diode (VCSEL/PD) array, and an optical link block with plastic optical fibers for reducing electromagnetic interference (EMI) noise. For the optical interconnection between the light-sources and detectors, an optical wiring method whose distinctive features include the absence of EMI noise and easy assembly is proposed. The results clearly demonstrate that the use of an optical wiring method can provide robust, cost-effective assembly and easy-repair. We successfully achieved a 4.5 Gb/s data transmission rate without EMI problems.
{"title":"Optical Chip-to-Chip Link System by Using Optical Wiring Method for Reducing EMI","authors":"In-Kui Cho, J. Yun, M. Jeong, Hyo-Hoon Park","doi":"10.1109/TADVP.2010.2049018","DOIUrl":"https://doi.org/10.1109/TADVP.2010.2049018","url":null,"abstract":"This paper describes a new optical link system which consists of a metal optical bench, a module printed circuit board, a driver/receiver integrated circuit, a vertical-cavity surface-emitting laser/photo diode (VCSEL/PD) array, and an optical link block with plastic optical fibers for reducing electromagnetic interference (EMI) noise. For the optical interconnection between the light-sources and detectors, an optical wiring method whose distinctive features include the absence of EMI noise and easy assembly is proposed. The results clearly demonstrate that the use of an optical wiring method can provide robust, cost-effective assembly and easy-repair. We successfully achieved a 4.5 Gb/s data transmission rate without EMI problems.","PeriodicalId":55015,"journal":{"name":"IEEE Transactions on Advanced Packaging","volume":"33 1","pages":"722-728"},"PeriodicalIF":0.0,"publicationDate":"2010-06-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/TADVP.2010.2049018","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"62397947","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-06-28DOI: 10.1109/TADVP.2010.2050769
K. Han, Madhavan Swaminathan, T. Bandyopadhyay
This paper proposes an efficient method to model through-silicon via (TSV) interconnections, an essential building block for the realization of silicon-based 3-D systems. The proposed method results in equivalent network parameters that include the combined effect of conductor, insulator, and silicon substrate. Although the modeling method is based on solving Maxwell's equation in integral form, the method uses a small number of global modal basis functions and can be much faster than discretization-based integral-equation methods. Through comparison with 3-D full-wave simulations, this paper validates the accuracy and the efficiency of the proposed modeling method.
{"title":"Electromagnetic Modeling of Through-Silicon Via (TSV) Interconnections Using Cylindrical Modal Basis Functions","authors":"K. Han, Madhavan Swaminathan, T. Bandyopadhyay","doi":"10.1109/TADVP.2010.2050769","DOIUrl":"https://doi.org/10.1109/TADVP.2010.2050769","url":null,"abstract":"This paper proposes an efficient method to model through-silicon via (TSV) interconnections, an essential building block for the realization of silicon-based 3-D systems. The proposed method results in equivalent network parameters that include the combined effect of conductor, insulator, and silicon substrate. Although the modeling method is based on solving Maxwell's equation in integral form, the method uses a small number of global modal basis functions and can be much faster than discretization-based integral-equation methods. Through comparison with 3-D full-wave simulations, this paper validates the accuracy and the efficiency of the proposed modeling method.","PeriodicalId":55015,"journal":{"name":"IEEE Transactions on Advanced Packaging","volume":"33 1","pages":"804-817"},"PeriodicalIF":0.0,"publicationDate":"2010-06-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/TADVP.2010.2050769","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"62398727","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-06-14DOI: 10.1109/TADVP.2010.2050203
M. Ahmadloo, A. Dounavis
This paper presents an efficient algorithm to create parametric reduced order models of distributed electromagnetic systems that have arbitrary functions of frequency (due to material properties, boundary conditions, delay elements) and design parameters. The proposed method is based on a multiorder Arnoldi algorithm used to implicitly calculate the moments with respect to frequency and design parameters, as well as the cross-moments. This procedure generates parametric reduced order models that are valid over the desired parameter range without the need to redo the reduction when design parameters are changed. Numerical examples are provided to illustrate the validity of the proposed algorithm.
{"title":"Parameterized Model Order Reduction of Electromagnetic Systems Using Multiorder Arnoldi","authors":"M. Ahmadloo, A. Dounavis","doi":"10.1109/TADVP.2010.2050203","DOIUrl":"https://doi.org/10.1109/TADVP.2010.2050203","url":null,"abstract":"This paper presents an efficient algorithm to create parametric reduced order models of distributed electromagnetic systems that have arbitrary functions of frequency (due to material properties, boundary conditions, delay elements) and design parameters. The proposed method is based on a multiorder Arnoldi algorithm used to implicitly calculate the moments with respect to frequency and design parameters, as well as the cross-moments. This procedure generates parametric reduced order models that are valid over the desired parameter range without the need to redo the reduction when design parameters are changed. Numerical examples are provided to illustrate the validity of the proposed algorithm.","PeriodicalId":55015,"journal":{"name":"IEEE Transactions on Advanced Packaging","volume":"33 1","pages":"1012-1020"},"PeriodicalIF":0.0,"publicationDate":"2010-06-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/TADVP.2010.2050203","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"62398915","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-06-03DOI: 10.1109/TADVP.2010.2048902
Fan-Zhi Kong, W. Yin, J. Mao, Qingtang Liu
A comprehensive electro-thermo-mechanical transient investigation is carried out to characterize time-dependent thermal and mechanical responses of metal wire bonding interconnects, as they suffer from the impact of an electromagnetic pulse (EMP) with different current or voltage waveforms. In our mathematical implementation, a hybrid time-domain finite element method is applied to simulate mutual interactions among electrical, thermal, and mechanical fields, with all nonlinearities of temperature-dependent electrical conductivities, thermal conductivities, thermal expansion coefficients, and even the Young's modulus of materials being treated appropriately. The developed algorithm is partially validated by computing transient temperature and thermal stress of other interconnects with good agreement with reference results. Parametric studies are performed to show the effects of EMP waveform parameters, geometrical and physical parameters of various wire bonding interconnects on their transient thermal and mechanical responses, thus providing basic information for their electromagnetic protection so as to suppress the impact of an intentional EMP.
{"title":"Electro-Thermo-Mechanical Characterizations of Various Wire Bonding Interconnects Illuminated by an Electromagnetic Pulse","authors":"Fan-Zhi Kong, W. Yin, J. Mao, Qingtang Liu","doi":"10.1109/TADVP.2010.2048902","DOIUrl":"https://doi.org/10.1109/TADVP.2010.2048902","url":null,"abstract":"A comprehensive electro-thermo-mechanical transient investigation is carried out to characterize time-dependent thermal and mechanical responses of metal wire bonding interconnects, as they suffer from the impact of an electromagnetic pulse (EMP) with different current or voltage waveforms. In our mathematical implementation, a hybrid time-domain finite element method is applied to simulate mutual interactions among electrical, thermal, and mechanical fields, with all nonlinearities of temperature-dependent electrical conductivities, thermal conductivities, thermal expansion coefficients, and even the Young's modulus of materials being treated appropriately. The developed algorithm is partially validated by computing transient temperature and thermal stress of other interconnects with good agreement with reference results. Parametric studies are performed to show the effects of EMP waveform parameters, geometrical and physical parameters of various wire bonding interconnects on their transient thermal and mechanical responses, thus providing basic information for their electromagnetic protection so as to suppress the impact of an intentional EMP.","PeriodicalId":55015,"journal":{"name":"IEEE Transactions on Advanced Packaging","volume":"33 1","pages":"729-737"},"PeriodicalIF":0.0,"publicationDate":"2010-06-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/TADVP.2010.2048902","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"62397781","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-05-27DOI: 10.1109/TADVP.2010.2047723
Ying Li, V. Jandhyala
Analytical expressions for the multiparametric sensitivity analysis of coupled-via S -parameters in board and package structures are derived in this paper. These expressions are validated with finite difference approximations of S-parameters obtained from three-dimensional field solvers and of the analytical expressions themselves. Sensitivity analysis with respect to multiple geometric and material variations provides quick early-design insight without resorting to complete three-dimensional field simulation. Sensitivities for eccentric effect of via drilling and exterior problem are also studied. First derivative data is also critical for gradient-based optimization of system-level performance which includes via-via coupling. The proposed approach is a stepping stone towards early design and optimization for large-scale via structures in microelectronics systems.
{"title":"Multiparameter Sensitivity Analysis of Multiple Coupled Vias in Board and Package Structures for Early Design and Optimization","authors":"Ying Li, V. Jandhyala","doi":"10.1109/TADVP.2010.2047723","DOIUrl":"https://doi.org/10.1109/TADVP.2010.2047723","url":null,"abstract":"Analytical expressions for the multiparametric sensitivity analysis of coupled-via S -parameters in board and package structures are derived in this paper. These expressions are validated with finite difference approximations of S-parameters obtained from three-dimensional field solvers and of the analytical expressions themselves. Sensitivity analysis with respect to multiple geometric and material variations provides quick early-design insight without resorting to complete three-dimensional field simulation. Sensitivities for eccentric effect of via drilling and exterior problem are also studied. First derivative data is also critical for gradient-based optimization of system-level performance which includes via-via coupling. The proposed approach is a stepping stone towards early design and optimization for large-scale via structures in microelectronics systems.","PeriodicalId":55015,"journal":{"name":"IEEE Transactions on Advanced Packaging","volume":"33 1","pages":"1003-1011"},"PeriodicalIF":0.0,"publicationDate":"2010-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/TADVP.2010.2047723","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"62397505","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-05-27DOI: 10.1109/TADVP.2010.2049490
A. Sathanur, Vikram Jandhyala, Henning Braunisch
Design of package- and board-level interconnects utilizing full-wave electromagnetic solvers, is becoming increasingly important owing to increased frequencies of operation, miniaturization, and reduced time to market. Thus, parameterization, optimization, and statistical analysis tools are becoming an invaluable part of a designer's armory. Leveraging a previously developed fast full-wave electromagnetic solver, this paper addresses the development of a framework for package interconnect design. Parametric sweeps are conducted to show the existence of optimal designs and to select the best routing strategies. Having applied the popular response surface methodology for optimization and having outlined its limitations for higher-dimensional problems, a general optimization scheme is proposed and illustrated on a differential package interconnect line. The proposed methodology features a dimensionality reduction scheme and a reusable, multidimensional look-up table preceding the global optimization phase, which is facilitated by a smooth interpolation scheme based on splines. The second phase features a custom local optimizer incorporating all the variables without any dimension reduction. This methodology has been applied to automated synthesis of a differential package line resulting in a significant improvement of the return loss performance. A statistical analysis methodology, based on utilizing the gradient, has been presented to arrive at the spread in the differential return loss, occurring due to manufacturing tolerances, around the designed response.
{"title":"A Hierarchical Simulation Flow for Return-Loss Optimization of Microprocessor Package Vertical Interconnects","authors":"A. Sathanur, Vikram Jandhyala, Henning Braunisch","doi":"10.1109/TADVP.2010.2049490","DOIUrl":"https://doi.org/10.1109/TADVP.2010.2049490","url":null,"abstract":"Design of package- and board-level interconnects utilizing full-wave electromagnetic solvers, is becoming increasingly important owing to increased frequencies of operation, miniaturization, and reduced time to market. Thus, parameterization, optimization, and statistical analysis tools are becoming an invaluable part of a designer's armory. Leveraging a previously developed fast full-wave electromagnetic solver, this paper addresses the development of a framework for package interconnect design. Parametric sweeps are conducted to show the existence of optimal designs and to select the best routing strategies. Having applied the popular response surface methodology for optimization and having outlined its limitations for higher-dimensional problems, a general optimization scheme is proposed and illustrated on a differential package interconnect line. The proposed methodology features a dimensionality reduction scheme and a reusable, multidimensional look-up table preceding the global optimization phase, which is facilitated by a smooth interpolation scheme based on splines. The second phase features a custom local optimizer incorporating all the variables without any dimension reduction. This methodology has been applied to automated synthesis of a differential package line resulting in a significant improvement of the return loss performance. A statistical analysis methodology, based on utilizing the gradient, has been presented to arrive at the spread in the differential return loss, occurring due to manufacturing tolerances, around the designed response.","PeriodicalId":55015,"journal":{"name":"IEEE Transactions on Advanced Packaging","volume":"33 1","pages":"1021-1033"},"PeriodicalIF":0.0,"publicationDate":"2010-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/TADVP.2010.2049490","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"62398214","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-05-27DOI: 10.1109/TADVP.2010.2049109
Sung-Ku Yeo, Jong-Hoon Chun, Young-Se Kwon
This paper presents the design and development of a compact 3-D transmit/receive (T/R) module with a selectively anodized aluminum multilayer package for X-band phased array radar applications. The proposed multilayer package consists of anodized aluminum substrates and vertical interconnects with embedded vias. The proposed package platform is based on thick anodized aluminum oxide layers and active bare chips directly mounted on bulk aluminum substrates for high electrical isolation and an effective heat sink. With its combination of thin-film embedded passive components and multilayer structure, the proposed module features a compact size of 20 mm × 20 mm, with a package height of 3.7 mm. To transfer radio-frequency (RF) signals vertically, we used coaxial hermetic seal vias with characteristic 50 Ω impedances and embedded anodized aluminum vias with a solder ball attachment and flip-chip bonding. The optimized vertical interconnect structure demonstrates RF characteristics with an insertion loss of less than 1.55 dB and a return loss of less than 12.25 dB over a broad bandwidth ranging from 0.1 to 10 GHz. The fabricated X-band 3-D T/R module has a maximum transmit output power of 39.81 dBm (9.5 W), a maximum transmit gain of 41.25 dB, and a receive gain of 19.15 dB over the 9-10 GHz frequency band. The RF-signal phase amplitude control is achieved by means of a 6 bit phase shifter with an rms accuracy of more than 5° and a gain setting range of 24 dB with an rms accuracy of more than 1.5 dB. The proposed multilayer aluminum package has the advantages of reducing the module size, decreasing the cost, and managing the thermal problem for X-band high-power T/R module package applications.
{"title":"A 3-D X-Band T/R Module Package With an Anodized Aluminum Multilayer Substrate for Phased Array Radar Applications","authors":"Sung-Ku Yeo, Jong-Hoon Chun, Young-Se Kwon","doi":"10.1109/TADVP.2010.2049109","DOIUrl":"https://doi.org/10.1109/TADVP.2010.2049109","url":null,"abstract":"This paper presents the design and development of a compact 3-D transmit/receive (T/R) module with a selectively anodized aluminum multilayer package for X-band phased array radar applications. The proposed multilayer package consists of anodized aluminum substrates and vertical interconnects with embedded vias. The proposed package platform is based on thick anodized aluminum oxide layers and active bare chips directly mounted on bulk aluminum substrates for high electrical isolation and an effective heat sink. With its combination of thin-film embedded passive components and multilayer structure, the proposed module features a compact size of 20 mm × 20 mm, with a package height of 3.7 mm. To transfer radio-frequency (RF) signals vertically, we used coaxial hermetic seal vias with characteristic 50 Ω impedances and embedded anodized aluminum vias with a solder ball attachment and flip-chip bonding. The optimized vertical interconnect structure demonstrates RF characteristics with an insertion loss of less than 1.55 dB and a return loss of less than 12.25 dB over a broad bandwidth ranging from 0.1 to 10 GHz. The fabricated X-band 3-D T/R module has a maximum transmit output power of 39.81 dBm (9.5 W), a maximum transmit gain of 41.25 dB, and a receive gain of 19.15 dB over the 9-10 GHz frequency band. The RF-signal phase amplitude control is achieved by means of a 6 bit phase shifter with an rms accuracy of more than 5° and a gain setting range of 24 dB with an rms accuracy of more than 1.5 dB. The proposed multilayer aluminum package has the advantages of reducing the module size, decreasing the cost, and managing the thermal problem for X-band high-power T/R module package applications.","PeriodicalId":55015,"journal":{"name":"IEEE Transactions on Advanced Packaging","volume":"33 1","pages":"883-891"},"PeriodicalIF":0.0,"publicationDate":"2010-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/TADVP.2010.2049109","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"62397564","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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