Pub Date : 2024-01-01DOI: 10.1109/mcas.2023.3325498
Nazila Fough
The WiCAS and Young Professionals events were hosted during the 21st IEEE Interregional NEWCAS Conference in Edinburgh, U.K., on the 26th of June 2023. These events were organised by the WiCAS and Young Professionals Co-Chairs Dr. Nazila Fough (Robert Gordon University, U.K.), Dr. Hamida Hallil Abbas (University of Bordeaux, France), Eve McGlynn (University of Glasgow, U.K.), and Mahdieh Shojaei Baghini (University of Glasgow, U.K.). The invited speakers and WiCAS banquet were supported by the Standing Committee on Diversity, Equity, and Inclusion of IEEE CASS. Using the conference website and various social media accounts, the sessions were promoted to registered attendees and the general public. Email invitations were targeted towards early career researchers who were most likely to attend both sessions.
{"title":"Women in Circuits and Systems (WiCAS) at NEWCAS 2023 [Women in CAS]","authors":"Nazila Fough","doi":"10.1109/mcas.2023.3325498","DOIUrl":"https://doi.org/10.1109/mcas.2023.3325498","url":null,"abstract":"The WiCAS and Young Professionals events were hosted during the 21st IEEE Interregional NEWCAS Conference in Edinburgh, U.K., on the 26th of June 2023. These events were organised by the WiCAS and Young Professionals Co-Chairs Dr. Nazila Fough (Robert Gordon University, U.K.), Dr. Hamida Hallil Abbas (University of Bordeaux, France), Eve McGlynn (University of Glasgow, U.K.), and Mahdieh Shojaei Baghini (University of Glasgow, U.K.). The invited speakers and WiCAS banquet were supported by the Standing Committee on Diversity, Equity, and Inclusion of IEEE CASS. Using the conference website and various social media accounts, the sessions were promoted to registered attendees and the general public. Email invitations were targeted towards early career researchers who were most likely to attend both sessions.","PeriodicalId":55038,"journal":{"name":"IEEE Circuits and Systems Magazine","volume":"1 1","pages":""},"PeriodicalIF":6.9,"publicationDate":"2024-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"139756232","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-01-01DOI: 10.1109/mcas.2023.3334439
{"title":"IEEE Proceedings","authors":"","doi":"10.1109/mcas.2023.3334439","DOIUrl":"https://doi.org/10.1109/mcas.2023.3334439","url":null,"abstract":"","PeriodicalId":55038,"journal":{"name":"IEEE Circuits and Systems Magazine","volume":"277 1","pages":""},"PeriodicalIF":6.9,"publicationDate":"2024-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"139948720","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-01-01DOI: 10.1109/mcas.2023.3334436
{"title":"IEEE Collabratec","authors":"","doi":"10.1109/mcas.2023.3334436","DOIUrl":"https://doi.org/10.1109/mcas.2023.3334436","url":null,"abstract":"","PeriodicalId":55038,"journal":{"name":"IEEE Circuits and Systems Magazine","volume":"6 1","pages":""},"PeriodicalIF":6.9,"publicationDate":"2024-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"139948767","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-01-01DOI: 10.1109/mcas.2023.3325607
Aditya Anshul, Anirban Sengupta
This paper presents a novel survey of high level synthesis (HLS) based hardware security approaches for reusable intellectual property (IP) cores used in consumer electronics and computing systems. A succinct review of all major HLS based hardware security approaches applied on reusable IP cores, along with their design flow and security analysis, is provided. The paper presents a detailed design flow of hardware integrated circuits (ICs) along with vulnerability points where potential attacks/threats are possible. Trustworthy and untrustworthy regimes in the design flow have also been highlighted in the discussion. Further, a discussion of detective and preventive control-based HLS hardware security approaches used for hardware IP cores has also been presented, including an analysis of prominent structural obfuscation, logic locking (logic encryption), and IP core protection (IPP) techniques. Each approach has been lucidly explained in terms of its threat model, algorithm, and security analysis. Finally, a security comparison of hardware IP obfuscation approaches in terms of strength of obfuscation security metric as well as a security comparison of IPP approaches in terms of probability of coincidence security metric, have also been introduced.
本文针对消费电子和计算系统中使用的可重用知识产权(IP)内核,对基于高级合成(HLS)的硬件安全方法进行了新颖的调查。本文简明扼要地回顾了应用于可重用 IP 核的所有主要基于 HLS 的硬件安全方法,以及它们的设计流程和安全分析。论文详细介绍了硬件集成电路 (IC) 的设计流程以及可能受到潜在攻击/威胁的漏洞点。讨论中还强调了设计流程中的可信和不可信机制。此外,还讨论了用于硬件 IP 核的基于侦测和预防控制的 HLS 硬件安全方法,包括对著名的结构混淆、逻辑锁定(逻辑加密)和 IP 核保护 (IPP) 技术的分析。对每种方法的威胁模型、算法和安全分析都作了清晰的解释。最后,还介绍了根据混淆强度安全指标对硬件 IP 混淆方法进行的安全比较,以及根据重合概率安全指标对 IPP 方法进行的安全比较。
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