A chip is a set of electronic circuits on one small flat piece (or “chip”) of semiconductor material [...]
芯片是一组在半导体材料的小平面(或“芯片”)上的电子电路。
{"title":"Publisher’s Note: Chips—A New Open Access Journal on Integrated Circuit","authors":"R. Zuo, Zhilei Wang, Liliane Auwerter","doi":"10.3390/chips1010001","DOIUrl":"https://doi.org/10.3390/chips1010001","url":null,"abstract":"A chip is a set of electronic circuits on one small flat piece (or “chip”) of semiconductor material [...]","PeriodicalId":6666,"journal":{"name":"2015 IEEE Hot Chips 27 Symposium (HCS)","volume":"23 1","pages":""},"PeriodicalIF":0.0,"publicationDate":"2021-08-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"89711514","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
This paper presents a four-channel beamforming TX implemented in 65 nm CMOS. Each beamforming TX is comprised of a C-2C split-array multiphase switched-capacitor power amplifier (SAMP-SCPA). This is the first use of multiphase interpolation (MPI) for beam steering. This technique is ideal for low-frequency beamforming and MIMO, as it does not require passive or LO-based phase shifters. The SCPA is ideal for use as the core element since it can perform frequency translation and data conversion, and drive an output at high power and efficiency in a compact die area. A prototype four-element beamforming TX, occupying 2mm×2.5mm, can achieve a peak output power of 24.4 dBm with a peak system efficiency (SE) of 24%, while achieving <1∘ phase resolution and <1 dB gain error. When transmitting a 15 MHz, 64-QAM long-term evolution (LTE) signal it outputs 18.4 dBm at 14% SE with a measured adjacent channel leakage ratio (ACLR) of <−30 dBc and an error vector magnitude (EVM) of 3.27% RMS at 1.75 GHz. A synthesized beam pattern based on measured results from a single die achieves <0.32∘ RMS beam angle error and <0.1 dB RMS beam amplitude error.
{"title":"Multiphase Interpolating Digital Power Amplifiers for TX Beamforming","authors":"Zhidong Bai, Wen Yuan, A. Azam, J. Walling","doi":"10.3390/chips1010004","DOIUrl":"https://doi.org/10.3390/chips1010004","url":null,"abstract":"This paper presents a four-channel beamforming TX implemented in 65 nm CMOS. Each beamforming TX is comprised of a C-2C split-array multiphase switched-capacitor power amplifier (SAMP-SCPA). This is the first use of multiphase interpolation (MPI) for beam steering. This technique is ideal for low-frequency beamforming and MIMO, as it does not require passive or LO-based phase shifters. The SCPA is ideal for use as the core element since it can perform frequency translation and data conversion, and drive an output at high power and efficiency in a compact die area. A prototype four-element beamforming TX, occupying 2mm×2.5mm, can achieve a peak output power of 24.4 dBm with a peak system efficiency (SE) of 24%, while achieving <1∘ phase resolution and <1 dB gain error. When transmitting a 15 MHz, 64-QAM long-term evolution (LTE) signal it outputs 18.4 dBm at 14% SE with a measured adjacent channel leakage ratio (ACLR) of <−30 dBc and an error vector magnitude (EVM) of 3.27% RMS at 1.75 GHz. A synthesized beam pattern based on measured results from a single die achieves <0.32∘ RMS beam angle error and <0.1 dB RMS beam amplitude error.","PeriodicalId":6666,"journal":{"name":"2015 IEEE Hot Chips 27 Symposium (HCS)","volume":"416 1","pages":""},"PeriodicalIF":0.0,"publicationDate":"2020-02-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"84902300","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2016-08-01DOI: 10.1109/HOTCHIPS.2016.7936200
S. Rusu
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Pub Date : 2015-08-01DOI: 10.1109/HOTCHIPS.2015.7477454
Charles Zhang
This article consists of a collection of slides from the author's conference presentation. The following slides are presented to introduce the general features of one of our products, instead of any commitment about it. It is for information purposes only, and may not be incorporated into any contract. It is not suggested to make purchasing decisions accordingly. The development, release, and timing of any features or functionality described here remains at the sole discretion of Phytium.
{"title":"Mars: A 64-core ARMv8 processor","authors":"Charles Zhang","doi":"10.1109/HOTCHIPS.2015.7477454","DOIUrl":"https://doi.org/10.1109/HOTCHIPS.2015.7477454","url":null,"abstract":"This article consists of a collection of slides from the author's conference presentation. The following slides are presented to introduce the general features of one of our products, instead of any commitment about it. It is for information purposes only, and may not be incorporated into any contract. It is not suggested to make purchasing decisions accordingly. The development, release, and timing of any features or functionality described here remains at the sole discretion of Phytium.","PeriodicalId":6666,"journal":{"name":"2015 IEEE Hot Chips 27 Symposium (HCS)","volume":"63 1","pages":"1-23"},"PeriodicalIF":0.0,"publicationDate":"2015-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"75222516","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-08-01DOI: 10.1109/HOTCHIPS.2015.7477463
M. Grob
This article consists of a collection of slides from the author's conference presentation. Qualcomm fuels major technology shifts in the industry. Anticipating the big challenges and investing early on to solve them.
{"title":"The road to 5G: Providing the connectivity fabric for everything","authors":"M. Grob","doi":"10.1109/HOTCHIPS.2015.7477463","DOIUrl":"https://doi.org/10.1109/HOTCHIPS.2015.7477463","url":null,"abstract":"This article consists of a collection of slides from the author's conference presentation. Qualcomm fuels major technology shifts in the industry. Anticipating the big challenges and investing early on to solve them.","PeriodicalId":6666,"journal":{"name":"2015 IEEE Hot Chips 27 Symposium (HCS)","volume":"10 1","pages":"1-26"},"PeriodicalIF":0.0,"publicationDate":"2015-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"75260603","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-08-01DOI: 10.1109/HOTCHIPS.2015.7477331
G. Krishnan, Dan Bouvier, Louis Zhang, Praveen Dongara
This article consists of a collection of slides from the authors' conference presentation. "Carrizo" provides a huge step towards AMD 25 X 20 initiative by delivering much better performance for much lower typical energy use.
{"title":"Energy efficient graphics and multimedia in 28NM Carrizo APU","authors":"G. Krishnan, Dan Bouvier, Louis Zhang, Praveen Dongara","doi":"10.1109/HOTCHIPS.2015.7477331","DOIUrl":"https://doi.org/10.1109/HOTCHIPS.2015.7477331","url":null,"abstract":"This article consists of a collection of slides from the authors' conference presentation. \"Carrizo\" provides a huge step towards AMD 25 X 20 initiative by delivering much better performance for much lower typical energy use.","PeriodicalId":6666,"journal":{"name":"2015 IEEE Hot Chips 27 Symposium (HCS)","volume":"85 1","pages":"1-34"},"PeriodicalIF":0.0,"publicationDate":"2015-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"74191894","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-08-01DOI: 10.1109/HOTCHIPS.2015.7477458
M. Hutton
This article consists of a collection of slides from the author's conference presentation. Summary points include: 3D integration isn't just integration, it is - De-risking, process matching, derivative proliferation and tick/tock; Device floorplanning and configuration get an upgrade - Software control allows for security and feature-up of devices; SoC integration is mainstream - Processor cost is a small subset of the die, coherent-accelerators; Pipelining unlocks optimizations in FPGA architecture - Using wires efficiently, not brute-forcing them faster - Faster == lower power when you can get designs to a more efficient place; Process is still giving us power benefits - 14nm Tri-Gate reduces power, enabling higher performance circuit-design.
{"title":"Stratix® 10: 14nm FPGA delivering 1GHz","authors":"M. Hutton","doi":"10.1109/HOTCHIPS.2015.7477458","DOIUrl":"https://doi.org/10.1109/HOTCHIPS.2015.7477458","url":null,"abstract":"This article consists of a collection of slides from the author's conference presentation. Summary points include: 3D integration isn't just integration, it is - De-risking, process matching, derivative proliferation and tick/tock; Device floorplanning and configuration get an upgrade - Software control allows for security and feature-up of devices; SoC integration is mainstream - Processor cost is a small subset of the die, coherent-accelerators; Pipelining unlocks optimizations in FPGA architecture - Using wires efficiently, not brute-forcing them faster - Faster == lower power when you can get designs to a more efficient place; Process is still giving us power benefits - 14nm Tri-Gate reduces power, enabling higher performance circuit-design.","PeriodicalId":6666,"journal":{"name":"2015 IEEE Hot Chips 27 Symposium (HCS)","volume":"142 1","pages":"1-24"},"PeriodicalIF":0.0,"publicationDate":"2015-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"77779950","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-08-01DOI: 10.1109/HOTCHIPS.2015.7477321
Peter Dokter
This article consists of a collection of slides from the author's conference presentation. Some of the topics discussed include: Some history of SFE; What drives our market (more interesting than you might think!); Why anything you hear me say may or may not be credible; Microcontrollers and SBC's; RF and IoT; Sensors.
{"title":"Maker trends: The path of least resistance","authors":"Peter Dokter","doi":"10.1109/HOTCHIPS.2015.7477321","DOIUrl":"https://doi.org/10.1109/HOTCHIPS.2015.7477321","url":null,"abstract":"This article consists of a collection of slides from the author's conference presentation. Some of the topics discussed include: Some history of SFE; What drives our market (more interesting than you might think!); Why anything you hear me say may or may not be credible; Microcontrollers and SBC's; RF and IoT; Sensors.","PeriodicalId":6666,"journal":{"name":"2015 IEEE Hot Chips 27 Symposium (HCS)","volume":"13 1","pages":"1-21"},"PeriodicalIF":0.0,"publicationDate":"2015-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"81787098","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-08-01DOI: 10.1109/HOTCHIPS.2015.7477477
Adrian Tang, J. Demme, S. Sethumadhavan, S. Stolfo
This article consists of a single slide from the authors' conference presentation. The topics include: Growing Malware Threats; Limitations of Software Anti-Virus; Catching Seen Malware; and Catching Unseen Malware.
{"title":"A silicon anti-virus engine","authors":"Adrian Tang, J. Demme, S. Sethumadhavan, S. Stolfo","doi":"10.1109/HOTCHIPS.2015.7477477","DOIUrl":"https://doi.org/10.1109/HOTCHIPS.2015.7477477","url":null,"abstract":"This article consists of a single slide from the authors' conference presentation. The topics include: Growing Malware Threats; Limitations of Software Anti-Virus; Catching Seen Malware; and Catching Unseen Malware.","PeriodicalId":6666,"journal":{"name":"2015 IEEE Hot Chips 27 Symposium (HCS)","volume":"196 ","pages":"1-1"},"PeriodicalIF":0.0,"publicationDate":"2015-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"91553582","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-08-01DOI: 10.1109/HOTCHIPS.2015.7477329
L. Codrescu
This article consists of a collection of slides from the author's conference presentation. Hexagon Vector extensions (HVX) - DSP Extensions for Advanced Imaging and Computer Vision - Achieve Performance / mW substantially better than CPU.
{"title":"Architecture of the Hexagon™ 680 DSP for mobile imaging and computer vision","authors":"L. Codrescu","doi":"10.1109/HOTCHIPS.2015.7477329","DOIUrl":"https://doi.org/10.1109/HOTCHIPS.2015.7477329","url":null,"abstract":"This article consists of a collection of slides from the author's conference presentation. Hexagon Vector extensions (HVX) - DSP Extensions for Advanced Imaging and Computer Vision - Achieve Performance / mW substantially better than CPU.","PeriodicalId":6666,"journal":{"name":"2015 IEEE Hot Chips 27 Symposium (HCS)","volume":"28 1","pages":"1-26"},"PeriodicalIF":0.0,"publicationDate":"2015-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"74835724","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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