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2018 IEEE/MTT-S International Microwave Symposium - IMS最新文献

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The End of Indexes 索引的结束
Pub Date : 2018-06-01 DOI: 10.1109/mwsym.2018.8439611
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引用次数: 0
Micromachined Silicon-core Substrate-integrated Waveguides with Co-planarprobe Transitions at 220–330 GHz 220-330 GHz共面探针跃迁的微机械硅芯衬底集成波导
Pub Date : 2018-06-01 DOI: 10.1109/MWSYM.2018.8439598
Aleksandr Krivovitca, U. Shah, O. Glubokov, J. Oberhammer
In this paper, we present for the first time on, to the best of our knowledge, the first silicon-core micromachined sub-strate-integrated waveguide (SIW) in the 220–325 GHz frequency range. In contrast to the fabrication methods used for conventional SIW known from substantially lower frequencies, micromachining allows for a full-height waveguide and near-ideal and arbitrarily shaped sidewalls. The silicon dielectric core allows for downscaling the waveguide and components by a factor of 3.4 as compared to an air-filled waveguide. At 330 GHz, the measured waveguide insertion loss is as low as 0.43 dB/mm (0.14 dB/λg, normalized to the guided wavelength). Devices were manufactured using a two-mask micromachining process. Furthermore, a low-loss ultra-wideband coplanar-waveguide (CPW) transition was successfully implemented, which comprises the very first CPW-to-SIW transitions in this frequency range. The measured transition performance is better than 0.5 dB insertion loss (average of 0.43 dB in the band above 15% above the waveguide-cutoff frequency), which is lower than previously reported CPW-to-SIW transitions even at 3 times lower frequencies, and the return loss is better than 14 dB for 75% of the waveguide band.
在本文中,据我们所知,我们首次提出了220-325 GHz频率范围内的第一个硅核微机械基板集成波导(SIW)。与传统的低频率SIW的制造方法相比,微加工允许全高波导和接近理想的任意形状的侧壁。与充气波导相比,硅电介质芯允许将波导和元件缩小3.4倍。在330 GHz时,测量到的波导插入损耗低至0.43 dB/mm (0.14 dB/λg,归一化到波导波长)。器件采用双掩模微加工工艺制造。此外,成功实现了低损耗超宽带共面波导(CPW)转换,其中包括该频率范围内的第一个CPW到siw转换。测量到的转换性能优于0.5 dB插入损耗(在波导截止频率以上15%以上的频带中平均为0.43 dB),即使在低3倍的频率下也低于先前报道的cpw到siw转换,并且在75%的波导频带中回波损耗优于14 dB。
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引用次数: 6
A Low-Phase-Noise 20 GHz Phase-Locked Loop with Parasitic Capacitance Reduction Technique for V-band Applications 一种v波段低相位噪声的20ghz锁相环寄生电容减小技术
Pub Date : 2018-06-01 DOI: 10.1109/MWSYM.2018.8439148
Hee Sung Lee, Kwang Kyu Hwang, D. Kang, S. Cho, C. Byeon, C. Park
A power efficient 20 GHz PLL for 60 GHz transceiver is presented in this paper. The proposed PLL consists of low phase noise voltage controlled oscillator, low power consumption divider chain, phase frequency detector, charge pump, and loop filter. The PLL covers frequency from 19.43 GHz to 20.62 GHz with 2-bit switched capacitor banks. Implemented in 65 nm CMOS technology, the fully integrated PLL occupies an area of 1.3mm2. A phase noise of PLL is −102.05 dBc/Hz at 1 MHz offset frequency and a figure of merit of −174.35 dBc/Hz with 23.6 mW power consumnption.
本文提出了一种用于60 GHz收发器的20 GHz高效锁相环。该锁相环由低相位噪声压控振荡器、低功耗分频链、相频检测器、电荷泵和环路滤波器组成。锁相环覆盖19.43 GHz至20.62 GHz的频率,具有2位开关电容器组。采用65nm CMOS技术,完全集成的锁相环占地1.3mm2。在1mhz偏置频率下,锁相环的相位噪声为−102.05 dBc/Hz,性能因数为−174.35 dBc/Hz,功耗为23.6 mW。
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引用次数: 1
Design Technique for Integration of Manifold Multiplexers Considering Constraints on Inter-Channel Spacings 考虑信道间距约束的流形多路复用器集成设计技术
Pub Date : 2018-06-01 DOI: 10.1109/MWSYM.2018.8439419
A. Cordon, I. Arregui, I. Arnedo, F. Tcberio, C. Arnold, M. Laso, J. Lorente
An innovative and industrially relevant design technique to improve the integration of satellite output multiplexers (OMUXes) is proposed. The manifold dimensions of classical manifold OMUXes are typically obtained to accomplish the frequency specifications regardless of any constraints on manifold dimensions. However, it may be desirable to achieve a certain fixed inter-channel spacing e.g. in order to easily accommodate a fixed mounting point pattern or to obtain a more generic mechanical design approach. A design procedure is proposed in this paper to replace the uniform waveguides of a pre-designed OMUX by stepped waveguides sections, making it viable to adjust the footprint to the required dimensions without compromising the frequency response and avoiding any filter readjustment. A 3-channel OMUX prototype has been designed and simulated (both with CST MWS and FEST3D for comparison purposes) as an example to validate the feasibility of the proposed technique.
提出了一种创新的工业相关设计技术,以提高卫星输出多路复用器的集成度。经典流形omux的流形尺寸通常是在不受流形尺寸限制的情况下实现频率规格的。然而,可能需要实现一定的固定通道间间距,例如,为了方便地容纳固定安装点图案或获得更通用的机械设计方法。本文提出了一种设计方法,用阶梯波导部分取代预先设计的OMUX的均匀波导,使其能够在不影响频率响应和避免任何滤波器重新调整的情况下将占地面积调整到所需的尺寸。设计并模拟了一个3通道OMUX原型(使用CST MWS和FEST3D进行比较)作为示例,以验证所提出技术的可行性。
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引用次数: 2
Scalable mm-Wave 4-Channel Radar SoC with Vector Modulators and Demodulators for MIMO and Phased Array Applications 可扩展的毫米波4通道雷达SoC与矢量调制器和解调的MIMO和相控阵应用
Pub Date : 2018-06-01 DOI: 10.1109/MWSYM.2018.8439533
H. Ng, R. Feger, D. Kissinger
This paper describes a scalable 120-GHz multichannel radar system-on-chip in a SiGe BiCMOS technology. The chip includes a 4-channel transceiver (TRX) and folded-dipole antennas with a high radiation efficiency due to the use of the selective localized-backside etching technique. The TRX is equipped with vector modulators as well as demodulators and can be used for analog as well as digital beamforming. Several of these multi-channel TRXs can be cascaded to form a daisy chain and used to build phased array as well as MIMO radar applications. A frequency-division multiplexing MIMO radar system with single-sideband delta-sigma modulation was created using the implemented chip to show its applicability.
本文介绍了一种基于SiGe BiCMOS技术的可扩展120 ghz多通道雷达片上系统。该芯片包括一个4通道收发器(TRX)和折叠偶极子天线,由于使用了选择性局部背面蚀刻技术,因此具有很高的辐射效率。TRX配备矢量调制器和解调器,可用于模拟和数字波束形成。这些多通道trx中的一些可以级联形成菊花链,用于构建相控阵和MIMO雷达应用。利用所实现的芯片建立了一个单频带δ - σ调制的频分复用MIMO雷达系统,以证明其适用性。
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引用次数: 6
X-band Integrated Printed Antenna Measurement x波段集成印刷天线测量
Pub Date : 2018-06-01 DOI: 10.1109/MWSYM.2018.8439526
Michael Hollenbeck, R. Smith, Clinton Cathey, Janos Opra
Additive manufacturing (aka 3D printing) in metals allows for the design and fabrication of integrated antenna structures that reduce part count and improve performance. This paper investigates the performance of an integrated feed design for a parabolic reflector that supports both left-hand and right-hand circular polarizations with a separate OMT, manufactured using additive manufacturing in AlSil0Mg with a Powder Bed Fusion process. The subreflector, subreflector support, feed horn, polarizer, and circular waveguide input are all printed as a single structure that eliminates typical blockage from subreflector support structures and allows for ease of assembly. Measured patterns show high levels of pattern symmetry in Azimuth and Elevation, and two separate printed antenna and OMT pairs show good precision without the need for any secondary tuning steps during assembly.
金属增材制造(又名3D打印)允许设计和制造集成天线结构,从而减少零件数量并提高性能。本文研究了一种抛物面反射器的集成进给设计的性能,该反射器支持左手和右手圆偏振,带有单独的OMT,使用AlSil0Mg的增材制造和粉末床融合工艺制造。副反射器、副反射器支撑、馈电喇叭、偏振器和圆波导输入都作为一个单一的结构打印,消除了副反射器支撑结构的典型阻塞,并且易于组装。测量的方向图在方位角和仰角上显示出高度的方向图对称性,两个单独的印刷天线和OMT对显示出良好的精度,而无需在组装过程中进行任何二次调谐步骤。
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引用次数: 1
A High-Efficiency E-band SiGe HBT Frequency Tripler with Broadband Performance 一种具有宽带性能的高效e波段SiGe HBT三倍频器
Pub Date : 2018-06-01 DOI: 10.1109/MWSYM.2018.8439269
Peigen Zhou, Jixin Chen, Huanbo Li, Debin Hou, P. Yan, Chao Yu, W. Hong
A compact E-band frequency tripler with broadband performance is implemented in a $0.13 mu mathrm{m}$ SiGe BiCMOS technology. A high pass filter and transformers impedance matching were used in a fully differential cascode topology to improve the harmonic suppression and broadband performance. Besides, a RF virtual ground capacitor in parallel with base of the CB transistor was proposed in the buffer stage that can enhance the output power by more than 1.7 dB. Followed by a buffer amplifier, the proposed tripler exhibits a measured 3-dB bandwidth ranging from 69 to 86 GHz with a peak output power of 9.9 dBm at 78 GHz. The suppression of fundamental and second-harmonic frequency is more than 35 and 33 dBc, respectively. The tripler can work properly between industrial temperature range (-40°C to 125°C). The tripler with buffer amplifier occupies only 158 mW from a 3.3 V supply. To the best of our knowledge, the proposed tripler demonstrates the highest output power and DC-to-RF efficiency, largest harmonic suppression that covers industrial temperature range compared with other silicon based E-band triplers.
采用$0.13 mu math {m}$ SiGe BiCMOS技术实现了具有宽带性能的紧凑型e波段三倍频器。在全差分级联码拓扑中采用高通滤波器和变压器阻抗匹配来提高谐波抑制和宽带性能。此外,在缓冲级设计了与CB晶体管基极并联的射频虚拟地电容器,可使输出功率提高1.7 dB以上。然后是一个缓冲放大器,所提出的三倍器显示测量的3db带宽范围为69至86 GHz, 78 GHz时的峰值输出功率为9.9 dBm。对基频和二次谐波的抑制分别大于35dbc和33dbc。在工业温度范围(-40°C ~ 125°C)内正常工作。带缓冲放大器的三倍器从3.3 V电源中仅占用158 mW。据我们所知,与其他硅基e波段三倍器相比,所提出的三倍器具有最高的输出功率和dc - rf效率,最大的谐波抑制,覆盖工业温度范围。
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引用次数: 16
Integrated Third-Order Millimeter-Wave On-Chip Bandpass Filter using 0.13-μm SiGe Bi-CMOS Technology 采用0.13 μm SiGe双cmos技术的集成三阶毫米波片上带通滤波器
Pub Date : 2018-06-01 DOI: 10.1109/MWSYM.2018.8439325
Yang Yang, He Zhu, Xi Zhu, Q. Xue
This paper introduces an on-chip third-order bandpass filter (BPF) for millimeter-wave (mm-wave) applications. The proposed BPF is composed of three identical broadside-coupled meander-line resonators (BCMLR) which are jointly connected by three MIM capacitors through aT-shape network. The MIM capacitors are used as J-inverters for the implementation of the third-order BPF in order to achieve the desired multiple transmission poles and zeros across the passband and stopband, correspondingly. To fully understand the operational mechanism of the proposed high-order structure, the resonator and the proposed BPF are analyzed using an LC- equivalent circuit model for further investigation of the distribution of the transmission poles and zeros in terms of the metal inductance and MIM capacitance. To prove the concept, the proposed BPF prototype is implemented in a commercial 0.13-l.lm SiGe (Bi)-CMOS process. According to the results obtained from on-wafer measurement, three transmission poles and three transmission zeros are clearly observed. Noticeably, the proposed BPF exhibits excellent performances including a flat in-band response (less than 1 dB attenuation) from 26.7 GHz to 44.3 GHz with a measured insertion loss of 3.1 dB at the center frequency of 35.5 GHz and stopband attenuation up to 35 dB at 59 GHz. The chip size is 0.016 mm2(0.066 × 0.236 mm-), excluding the GSG pads.
介绍了一种用于毫米波应用的片上三阶带通滤波器(BPF)。所提出的BPF由三个相同的宽侧耦合曲线谐振器(BCMLR)组成,它们由三个MIM电容器通过at形网络连接在一起。MIM电容器用作j逆变器,用于实现三阶BPF,从而相应地实现所需的跨通带和阻带的多个传输极和零。为了充分理解所提出的高阶结构的工作机制,利用LC等效电路模型对谐振器和所提出的BPF进行了分析,以进一步研究金属电感和MIM电容方面的传输极和零点分布。为了证明这一概念,提出的BPF原型在商用0.13-l中实现。m SiGe (Bi)-CMOS工艺。根据片上测量的结果,可以清楚地观察到三个传输极点和三个传输零点。值得注意的是,所提出的BPF具有出色的性能,包括在26.7 GHz至44.3 GHz范围内的平坦带内响应(衰减小于1 dB),在中心频率为35.5 GHz时的测量插入损耗为3.1 dB,在59 GHz时的阻带衰减高达35 dB。芯片尺寸为0.016 mm2(0.066 × 0.236 mm-),不包括GSG焊盘。
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引用次数: 1
A 5.8 GHz 1.77mW AFSK-OFDM CMOS Backscatter Transmitter for Low Power IoT Applications 用于低功耗物联网应用的5.8 GHz 1.77mW AFSK-OFDM CMOS反向散射发射器
Pub Date : 2018-06-01 DOI: 10.1109/MWSYM.2018.8439341
A. Tang, Y. Kim, G. Virbila, M. Chang
This paper presents an AFSK-OFDM (amplitude frequency shift keying-orthogonal frequency division multiplexing) based backscatter transmitter for Internet-of-Things (IoT) applications. The transmitter uses an array of 4 low-power direct digital frequency synthesizers (DDFSs) and DACs to transmit data using both frequency and amplitude symbols on 4 different OFDM subcarriers. The backscatter modulator is demonstrated within a 5.8 GHz wireless link using an 8-symbol OFDM library at a range of 2.7m and shown to consume 1.77 mW when operated at a symbol rate of 4MS/s (corresponds to 12 Mb/$s$). The modulator chip occupies 0.45mm2of silicon area.
提出了一种基于AFSK-OFDM(幅度频移键控-正交频分复用)的物联网(IoT)后向散射发射机。发射机使用4个低功率直接数字频率合成器(ddfs)和dac阵列在4个不同的OFDM子载波上使用频率和幅度符号传输数据。反向散射调制器在5.8 GHz无线链路中使用2.7m范围内的8符号OFDM库进行演示,并显示当以4MS/s的符号速率运行时消耗1.77 mW(对应于12mb /$s$)。调制器芯片的硅面积为0.45mm2。
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引用次数: 1
Towards the Source Reconstruction with a Time-Reversal Method for Practical Applications 基于时间反转方法的信号源重建研究
Pub Date : 2018-06-01 DOI: 10.1109/MWSYM.2018.8439665
Jing Liang, Z. Chen, Jinyan Li, Yiqiang Yu, Junfeng Wang
Electromagnetic time-reversal (TR) method has been proposed many years ago; however, its developments and applications do not have much progress due to limited advances on relevant theories and expansions to two and three-dimensional scenarios. In this paper, we address the issue by first developing the time-reversal theory with digital signal processing techniques and extending the time-reversal method to multiple source reconstructions with different steps. Then we propose a method to reconstruct spatially clustered sources; it leads to the possibility of reconstructions of line, surface and volume sources for practical applications. Numerical example of a line source is tested for verification of the proposed method.
电磁时间反转(TR)方法在多年前就被提出;然而,由于相关理论的进展和对二维和三维场景的扩展有限,其发展和应用并没有取得太大进展。在本文中,我们首先利用数字信号处理技术发展了时间反转理论,并将时间反转方法扩展到不同步骤的多源重构中,从而解决了这个问题。在此基础上,提出了一种空间聚类源重构方法;它为实际应用中的线、面和体源的重建提供了可能。最后对一个线源的数值算例进行了验证。
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引用次数: 2
期刊
2018 IEEE/MTT-S International Microwave Symposium - IMS
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