Pub Date : 2021-06-14DOI: 10.1109/APEC42165.2021.9487427
Yu Yan, Liyan Zhu, Jared Walden, Ziwei Liang, Hua Bai, M. H. Kao
This paper focuses on the design of a 650 V/150 A gallium-nitride (GaN) power module. Direct bonded copper (DBC) is applied as the insulated thermal pad to dissipate the heat generated by the GaN dies, where ceramics is employed for the thermal pad insulation. Printed circuit board (PCB) on the top of the GaN dies integrates the auxiliary power supply, the gate drive circuits and the decoupling capacitors, which can help the parasitic inductance reduction in the gate drive loop and the power loop to reduce the overshoot voltage across gate to source and drain to source. The packaged module exhibits high-current capability (150 A), high-compactness (45*33*9.6 mm3) and excellent thermal impedance from junction to heatsink. Taking advantages of the integrated gate-drive circuit, the proposed power module has simpler interface for users compared to regular GaN HEMTs on the market, which only needs PWM signal and non-isolated power supply to drive. To verify the electrical performance and thermal performance presented above, both double pulse test (DPT) and thermal test are conducted. DPT at 450 V/150 A shows around 54 V voltage spike only, which makes the proposed module suitable for high-power EV on-board charger or motor drive inverters.
{"title":"Packaging A Top-cooled 650 V/150 A GaN Power Modules with Insulated Thermal Pads and Gate-Drive Circuit","authors":"Yu Yan, Liyan Zhu, Jared Walden, Ziwei Liang, Hua Bai, M. H. Kao","doi":"10.1109/APEC42165.2021.9487427","DOIUrl":"https://doi.org/10.1109/APEC42165.2021.9487427","url":null,"abstract":"This paper focuses on the design of a 650 V/150 A gallium-nitride (GaN) power module. Direct bonded copper (DBC) is applied as the insulated thermal pad to dissipate the heat generated by the GaN dies, where ceramics is employed for the thermal pad insulation. Printed circuit board (PCB) on the top of the GaN dies integrates the auxiliary power supply, the gate drive circuits and the decoupling capacitors, which can help the parasitic inductance reduction in the gate drive loop and the power loop to reduce the overshoot voltage across gate to source and drain to source. The packaged module exhibits high-current capability (150 A), high-compactness (45*33*9.6 mm3) and excellent thermal impedance from junction to heatsink. Taking advantages of the integrated gate-drive circuit, the proposed power module has simpler interface for users compared to regular GaN HEMTs on the market, which only needs PWM signal and non-isolated power supply to drive. To verify the electrical performance and thermal performance presented above, both double pulse test (DPT) and thermal test are conducted. DPT at 450 V/150 A shows around 54 V voltage spike only, which makes the proposed module suitable for high-power EV on-board charger or motor drive inverters.","PeriodicalId":7050,"journal":{"name":"2021 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2021-06-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"89354218","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-06-14DOI: 10.1109/APEC42165.2021.9487397
Yu-Chen Liu, Chen Chen, Kai-De Chen, Yong-Long Syu, Wen-Hao Xue, Yunfei Chen, Katherine A. Kim, H. Chiu
This study proposes a 48 V – 6 V isolated direct current DC-DC converter using an LLC series resonant converter with wide bandgap GaN components under a 1-MHz switching frequency. A loss analysis was performed on different primary circuit structures for the converter, and a full-bridge structure was selected. In addition, a quarter-turn planar transformer structure was adopted. With the voltage conversion ratio of 8:1 unchanged, the adopted transformer required fewer primary and secondary winding turns, with lower alternating current copper losses, compared with an average transformer. The study also explored and optimized parallel arrangements of transformer windings, adopted parametric design of transformer dimensions, and determined the optimal balance between core losses and copper losses in a limited circuit area. The magnetic simulation software Ansys Maxwell was used to verify the magnetic flux distribution of the quarter-turn planar transformer. An experiment confirmed that the proposed LLC series resonant converter has a switching frequency, input voltage, output voltage, output power, power density, and peak efficiency of 1 MHz, 48 V, 6 V, 900 W, 63 W/cm3, and 98.2%, respectively.
{"title":"Design and development of a fractional-turn transformer for high power density LLC resonant converters","authors":"Yu-Chen Liu, Chen Chen, Kai-De Chen, Yong-Long Syu, Wen-Hao Xue, Yunfei Chen, Katherine A. Kim, H. Chiu","doi":"10.1109/APEC42165.2021.9487397","DOIUrl":"https://doi.org/10.1109/APEC42165.2021.9487397","url":null,"abstract":"This study proposes a 48 V – 6 V isolated direct current DC-DC converter using an LLC series resonant converter with wide bandgap GaN components under a 1-MHz switching frequency. A loss analysis was performed on different primary circuit structures for the converter, and a full-bridge structure was selected. In addition, a quarter-turn planar transformer structure was adopted. With the voltage conversion ratio of 8:1 unchanged, the adopted transformer required fewer primary and secondary winding turns, with lower alternating current copper losses, compared with an average transformer. The study also explored and optimized parallel arrangements of transformer windings, adopted parametric design of transformer dimensions, and determined the optimal balance between core losses and copper losses in a limited circuit area. The magnetic simulation software Ansys Maxwell was used to verify the magnetic flux distribution of the quarter-turn planar transformer. An experiment confirmed that the proposed LLC series resonant converter has a switching frequency, input voltage, output voltage, output power, power density, and peak efficiency of 1 MHz, 48 V, 6 V, 900 W, 63 W/cm3, and 98.2%, respectively.","PeriodicalId":7050,"journal":{"name":"2021 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2021-06-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"87178865","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-06-14DOI: 10.1109/APEC42165.2021.9487312
Zhongjing Wang, Zhao Yuan, Yue Zhao
Wide bandgap (WBG) devices usually have much faster switching speed than that of the traditional silicon devices, which, however, may pose challenges to the design of the power loop and gate loop. Extensive research has been done to address the drain-source voltage overshoot and oscillation issues by reducing the power loop stray inductance. To further enable higher switching frequency, the issues on the gate driver side still need to be addressed. The crosstalk phenomenon on gate-source voltage, as one of the major issues, has attracted lots of attention and can be mitigated by various approaches. In addition, when dv/dt is extremely high, the common-mode (CM) noise may deteriorate the control signals through the capacitive coupling, which still need to be addressed, considering just 1.5V voltage noise can lead to false triggering on the PWM input of digital isolators. In this work, four gate driver architectures in the existing literature are studied and compared in terms of the CM noise immunity. LT-spice small-signal models are utilized for simulation studies to compare the CM noise immunity of different gate driver designs quantitatively. The prototype of the optimal design was built and experimentally tested using a 3.3 kV SiC MOSFET to validate its CM noise immunity under the extremely high dv/dt, even beyond 240 V/ns.
宽带隙器件通常具有比传统硅器件快得多的开关速度，但这给功率环和门环的设计带来了挑战。通过减小功率回路杂散电感来解决漏源极电压过调和振荡问题已经做了大量的研究。为了进一步实现更高的开关频率，仍然需要解决栅极驱动器方面的问题。栅极-源电压串扰现象作为一个重要的问题已经引起了人们的广泛关注，并可以通过各种方法加以缓解。此外，当dv/dt非常高时，共模(CM)噪声可能会通过电容耦合恶化控制信号，考虑到仅1.5V电压噪声就会导致数字隔离器PWM输入误触发，这仍然需要解决。在这项工作中，对现有文献中的四种栅极驱动器架构进行了研究，并在CM噪声抗扰性方面进行了比较。利用LT-spice小信号模型进行仿真研究，定量比较不同栅极驱动器设计的CM抗噪性。构建了优化设计的原型，并使用3.3 kV SiC MOSFET进行了实验测试，以验证其在极高dv/dt(甚至超过240 V/ns)下的CM抗扰性。
{"title":"A Gate-Driver Architecture with High Common-Mode Noise Immunity under Extremely High dv/dt","authors":"Zhongjing Wang, Zhao Yuan, Yue Zhao","doi":"10.1109/APEC42165.2021.9487312","DOIUrl":"https://doi.org/10.1109/APEC42165.2021.9487312","url":null,"abstract":"Wide bandgap (WBG) devices usually have much faster switching speed than that of the traditional silicon devices, which, however, may pose challenges to the design of the power loop and gate loop. Extensive research has been done to address the drain-source voltage overshoot and oscillation issues by reducing the power loop stray inductance. To further enable higher switching frequency, the issues on the gate driver side still need to be addressed. The crosstalk phenomenon on gate-source voltage, as one of the major issues, has attracted lots of attention and can be mitigated by various approaches. In addition, when dv/dt is extremely high, the common-mode (CM) noise may deteriorate the control signals through the capacitive coupling, which still need to be addressed, considering just 1.5V voltage noise can lead to false triggering on the PWM input of digital isolators. In this work, four gate driver architectures in the existing literature are studied and compared in terms of the CM noise immunity. LT-spice small-signal models are utilized for simulation studies to compare the CM noise immunity of different gate driver designs quantitatively. The prototype of the optimal design was built and experimentally tested using a 3.3 kV SiC MOSFET to validate its CM noise immunity under the extremely high dv/dt, even beyond 240 V/ns.","PeriodicalId":7050,"journal":{"name":"2021 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2021-06-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"86950803","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-06-14DOI: 10.1109/APEC42165.2021.9487161
Imam Al Razi, D. Huitink, Yarui Peng
High-performance Multi-Chip Power Modules (MCPMs) are essential for high-density and efficient power conversion. Meanwhile, the chip layout and design methodology fundamentally determine thermal and reliability performance. Hign-density power modules typically consist of wide-bandgap (WBG) semiconductor die, soldering materials, baseplate, and heatsink packed on a single substrate. To a great extent, the reliability of power modules depends on these material electrothermal-mechanical properties during variable operating conditions. Appropriate thermal management can reduce stress and enhance the component lifetime by controlling junction temperature. In this work, a fast, generic, and scalable transient thermal model has been developed for the PowerSynth layout synthesis tool to optimize layer material, thickness, and layer stack configurations by minimizing thermal stress due to thermal cycling. This model has shown approximately 3,489 times speed up with less than 10% mismatch compared to ANSYS simulation. A PowerSynth-guided design-for-reliability computer-aided design (CAD) flow is presented to optimize both the layer stack and the layout simultaneously.
{"title":"PowerSynth-Guided Reliability Optimization of Multi-Chip Power Module","authors":"Imam Al Razi, D. Huitink, Yarui Peng","doi":"10.1109/APEC42165.2021.9487161","DOIUrl":"https://doi.org/10.1109/APEC42165.2021.9487161","url":null,"abstract":"High-performance Multi-Chip Power Modules (MCPMs) are essential for high-density and efficient power conversion. Meanwhile, the chip layout and design methodology fundamentally determine thermal and reliability performance. Hign-density power modules typically consist of wide-bandgap (WBG) semiconductor die, soldering materials, baseplate, and heatsink packed on a single substrate. To a great extent, the reliability of power modules depends on these material electrothermal-mechanical properties during variable operating conditions. Appropriate thermal management can reduce stress and enhance the component lifetime by controlling junction temperature. In this work, a fast, generic, and scalable transient thermal model has been developed for the PowerSynth layout synthesis tool to optimize layer material, thickness, and layer stack configurations by minimizing thermal stress due to thermal cycling. This model has shown approximately 3,489 times speed up with less than 10% mismatch compared to ANSYS simulation. A PowerSynth-guided design-for-reliability computer-aided design (CAD) flow is presented to optimize both the layer stack and the layout simultaneously.","PeriodicalId":7050,"journal":{"name":"2021 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2021-06-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"91035241","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-06-14DOI: 10.1109/APEC42165.2021.9487262
Janko Celikovic, Angel Arguello, Wisam Alhoor, S. Abedinpour, D. Maksimović
Recent work has demonstrated that utilization of all possible switching states in non-inverting buck-boost (NIBB) DCDC converters leads to substantial transient response improvements compared to responses in buck-only or boost-only modes of operation. This paper presents a hybrid digital controller for NIBB converters, which utilizes PID control and sliding mode control based the novel control algorithm. The sliding mode controller executes the transient response with an optimal sliding surface achieving the lowest possible output voltage deviation. The implemented digital controller enables seamless transition to PID regulation, which handles standard fixed-frequency steady-state regulation. The proposed solution is verified by circuit simulations and experimental results on a digitally controlled low-voltage NIBB converter suitable for mobile applications.
{"title":"Sliding Mode Control with Minimum-Deviation Transient Response for Non-Inverting Buck-Boost DC-DC Converters","authors":"Janko Celikovic, Angel Arguello, Wisam Alhoor, S. Abedinpour, D. Maksimović","doi":"10.1109/APEC42165.2021.9487262","DOIUrl":"https://doi.org/10.1109/APEC42165.2021.9487262","url":null,"abstract":"Recent work has demonstrated that utilization of all possible switching states in non-inverting buck-boost (NIBB) DCDC converters leads to substantial transient response improvements compared to responses in buck-only or boost-only modes of operation. This paper presents a hybrid digital controller for NIBB converters, which utilizes PID control and sliding mode control based the novel control algorithm. The sliding mode controller executes the transient response with an optimal sliding surface achieving the lowest possible output voltage deviation. The implemented digital controller enables seamless transition to PID regulation, which handles standard fixed-frequency steady-state regulation. The proposed solution is verified by circuit simulations and experimental results on a digitally controlled low-voltage NIBB converter suitable for mobile applications.","PeriodicalId":7050,"journal":{"name":"2021 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2021-06-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"90801023","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-06-14DOI: 10.1109/APEC42165.2021.9487425
Jiewen Hu, Xingchen Zhao, L. Ravi, R. Burgos, D. Dong
Featuring higher breakdown voltage, faster switching frequency, lower ON-state resistance, and smaller size in comparison to traditional Silicon (Si) IGBTs, silicon carbide (SiC) MOSFETs have become an attractive solution for achieving high power density and efficiency in airborne applications. However, the move to higher voltages and their more compact packages challenge the insulation design. In particular, low-pressure working condition of the aircraft degrades gas dielectric strength, which leads to an increased risk of partial discharges. Thereby, this paper presents a comprehensive design of a gate driver for SiC-based Generator Rectifier Units (GRUs) for variable frequency airborne applications. A design method to control the peak electric field in high field strength regions was used to ensure the field strength in air and the PCB dielectric remain within an acceptable range. High bandwidth Rogowski switch-current sensor (RSCS) for short-circuit (SC) and over-current (OC) protection as well as phase current reconstruction are implemented to enhance the gate driver performance. Experiments were conducted, successfully verifying the gate driver’s performance meets all the design targets.
{"title":"Enhanced Gate Driver Design for SiC-Based Generator Rectifier Unit for Airborne Applications","authors":"Jiewen Hu, Xingchen Zhao, L. Ravi, R. Burgos, D. Dong","doi":"10.1109/APEC42165.2021.9487425","DOIUrl":"https://doi.org/10.1109/APEC42165.2021.9487425","url":null,"abstract":"Featuring higher breakdown voltage, faster switching frequency, lower ON-state resistance, and smaller size in comparison to traditional Silicon (Si) IGBTs, silicon carbide (SiC) MOSFETs have become an attractive solution for achieving high power density and efficiency in airborne applications. However, the move to higher voltages and their more compact packages challenge the insulation design. In particular, low-pressure working condition of the aircraft degrades gas dielectric strength, which leads to an increased risk of partial discharges. Thereby, this paper presents a comprehensive design of a gate driver for SiC-based Generator Rectifier Units (GRUs) for variable frequency airborne applications. A design method to control the peak electric field in high field strength regions was used to ensure the field strength in air and the PCB dielectric remain within an acceptable range. High bandwidth Rogowski switch-current sensor (RSCS) for short-circuit (SC) and over-current (OC) protection as well as phase current reconstruction are implemented to enhance the gate driver performance. Experiments were conducted, successfully verifying the gate driver’s performance meets all the design targets.","PeriodicalId":7050,"journal":{"name":"2021 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2021-06-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"89755837","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-06-14DOI: 10.1109/APEC42165.2021.9487150
Samira Ahmadiankalati, Kajanan Kanathipan, J. Lam
A MHz DC/DC micro converter with extended zero voltage switching turn-on and step-up voltage capability for PV energy applications is presented. The proposed converter consists of a boost converter integrated with a CL parallel resonant converter. An auxiliary circuit is employed to achieve soft-switching operation at all conditions, and its inductor is coupled with the boost inductor to reduce the size and weight of the overall system. This in turn, allows for duty cycle based maximum power extraction control to be applied to the boost switch. The operating frequency of the converter’s switches are on the order of mega-hertz to further decrease the size and cost of passive components. Theoretical analysis and the operating principles of the proposed converter is provided. Simulation results on a 1.06MHz, 200W and 380V-output converter are presented to highlight the merits of the proposed topology. Experimental results are provided on a proof of concept prototype to highlight the features of the circuit.
{"title":"A MHz High Voltage Gain PV Micro-converter Featuring Extended ZVS operation and Continuous Input Current With Coupled Magnetics","authors":"Samira Ahmadiankalati, Kajanan Kanathipan, J. Lam","doi":"10.1109/APEC42165.2021.9487150","DOIUrl":"https://doi.org/10.1109/APEC42165.2021.9487150","url":null,"abstract":"A MHz DC/DC micro converter with extended zero voltage switching turn-on and step-up voltage capability for PV energy applications is presented. The proposed converter consists of a boost converter integrated with a CL parallel resonant converter. An auxiliary circuit is employed to achieve soft-switching operation at all conditions, and its inductor is coupled with the boost inductor to reduce the size and weight of the overall system. This in turn, allows for duty cycle based maximum power extraction control to be applied to the boost switch. The operating frequency of the converter’s switches are on the order of mega-hertz to further decrease the size and cost of passive components. Theoretical analysis and the operating principles of the proposed converter is provided. Simulation results on a 1.06MHz, 200W and 380V-output converter are presented to highlight the merits of the proposed topology. Experimental results are provided on a proof of concept prototype to highlight the features of the circuit.","PeriodicalId":7050,"journal":{"name":"2021 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2021-06-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"90120516","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-06-14DOI: 10.1109/APEC42165.2021.9487184
Yuqi Wei, Zhiqing Wang, Quanming Luo, A. Mantooth
LLC converters have been widely adopted in loads of industry applications. Although traditional fundamental harmonic based analysis method is simple, when applied in wide voltage gain range applications, the analysis accuracy degrades significantly. Thus, to optimize the converter performance, the time domain modelling analysis for different LLC converters and operation modes are discussed. Then, based on the modelling results, a simulation tool based on MATLAB graphical user interface (GUI) is developed to visualize the converter operation. Compared with the commercial simulation software, the developed one holds the advantages of fast, accurate, and convenient. The designed simulation tool has the exact simulation results as the commercial simulation software, while the simulation speed is much faster than the commercial ones. In addition, there is no need for users to build the different converter topologies and measure the key circuit currents and voltages, which is much more convenient. The developed simulation tool can be used to achieve automated design with thousands of iterations, which are tedious and time-consuming for commercial software. The time domain modelling and developed simulation tool are discussed. Simulation results comparisons between the developed simulation tool and commercial PSIM simulation tool are presented to validate the correctness and effectiveness of the developed simulation tool.
{"title":"A Fast and Accurate Simulation Tool for LLC Converters","authors":"Yuqi Wei, Zhiqing Wang, Quanming Luo, A. Mantooth","doi":"10.1109/APEC42165.2021.9487184","DOIUrl":"https://doi.org/10.1109/APEC42165.2021.9487184","url":null,"abstract":"LLC converters have been widely adopted in loads of industry applications. Although traditional fundamental harmonic based analysis method is simple, when applied in wide voltage gain range applications, the analysis accuracy degrades significantly. Thus, to optimize the converter performance, the time domain modelling analysis for different LLC converters and operation modes are discussed. Then, based on the modelling results, a simulation tool based on MATLAB graphical user interface (GUI) is developed to visualize the converter operation. Compared with the commercial simulation software, the developed one holds the advantages of fast, accurate, and convenient. The designed simulation tool has the exact simulation results as the commercial simulation software, while the simulation speed is much faster than the commercial ones. In addition, there is no need for users to build the different converter topologies and measure the key circuit currents and voltages, which is much more convenient. The developed simulation tool can be used to achieve automated design with thousands of iterations, which are tedious and time-consuming for commercial software. The time domain modelling and developed simulation tool are discussed. Simulation results comparisons between the developed simulation tool and commercial PSIM simulation tool are presented to validate the correctness and effectiveness of the developed simulation tool.","PeriodicalId":7050,"journal":{"name":"2021 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2021-06-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"90476090","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-06-14DOI: 10.1109/APEC42165.2021.9487059
S. Kapat
A single-inductor-multi-output (SIMO) DC-DC converter is widely acknowledged as the effective solution as well as commercially used for highly integrated multichannel and multistring dimmable LED driving. However, the requirements of high bandwidth dynamic current tracking and reduced flickering effects remain challenging to satisfy, particularly under frequent circuit reconfigurations with high frequency PWM dimming. This paper proposes a reconfigurable fully digital average current control (DACC) technique along with a feedback voltage controller in a SIMO DC-DC converter, in which both the inductor current and output voltages are sampled using an ADC (with a time-multiplexing manner) once per switching cycle using an event-based sampling mechanism. The proposed technique offers (i) precise average current control, (ii) inherent current-loop stability without ramp compensation, (iii) high current-loop bandwidth, (iv) reduced flickering effects during mode transitions using combined current-source and voltage-source mode configurations, (v) scalability for single-channel, multichannel and multi-string LED driving. Discrete-time small-signal models are derived, and current-loop as well as closed-loop stability analysis is presented along with the controller design. Superior current tracking performance is demonstrated using simulation and experimental results.
{"title":"Digital Average Current Control Technique for High Performance SIMO-Based Dimmable LED Driving","authors":"S. Kapat","doi":"10.1109/APEC42165.2021.9487059","DOIUrl":"https://doi.org/10.1109/APEC42165.2021.9487059","url":null,"abstract":"A single-inductor-multi-output (SIMO) DC-DC converter is widely acknowledged as the effective solution as well as commercially used for highly integrated multichannel and multistring dimmable LED driving. However, the requirements of high bandwidth dynamic current tracking and reduced flickering effects remain challenging to satisfy, particularly under frequent circuit reconfigurations with high frequency PWM dimming. This paper proposes a reconfigurable fully digital average current control (DACC) technique along with a feedback voltage controller in a SIMO DC-DC converter, in which both the inductor current and output voltages are sampled using an ADC (with a time-multiplexing manner) once per switching cycle using an event-based sampling mechanism. The proposed technique offers (i) precise average current control, (ii) inherent current-loop stability without ramp compensation, (iii) high current-loop bandwidth, (iv) reduced flickering effects during mode transitions using combined current-source and voltage-source mode configurations, (v) scalability for single-channel, multichannel and multi-string LED driving. Discrete-time small-signal models are derived, and current-loop as well as closed-loop stability analysis is presented along with the controller design. Superior current tracking performance is demonstrated using simulation and experimental results.","PeriodicalId":7050,"journal":{"name":"2021 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2021-06-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"78522539","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-06-14DOI: 10.1109/APEC42165.2021.9487236
ChaiYong Lim, Debashis Mandal, B. Bakkaloglu, S. Kiaei
This paper presents a Lithium-ion battery switching charger control chip with cascaded two loop time-domain controller. The proposed time-domain controller achieves seamless transition between constant-current (CC) mode and constant-voltage (CV) mode, and simplifies the controller design. The proposed switching charger control chip is designed and fabricated in TSMC 0.18 μm BCD technology. The input voltage range is from 5 V to 10 V, the battery voltage range is from 2.7 V to 4.2 V and the maximum charging current is 2.0 A. Measured results show that the proposed charger achieves maximum power efficiency of 93.3% at 1.0 A of charging current.
{"title":"Switching Battery Charger with Cascaded Two Loop Control Using Time-Based Techniques","authors":"ChaiYong Lim, Debashis Mandal, B. Bakkaloglu, S. Kiaei","doi":"10.1109/APEC42165.2021.9487236","DOIUrl":"https://doi.org/10.1109/APEC42165.2021.9487236","url":null,"abstract":"This paper presents a Lithium-ion battery switching charger control chip with cascaded two loop time-domain controller. The proposed time-domain controller achieves seamless transition between constant-current (CC) mode and constant-voltage (CV) mode, and simplifies the controller design. The proposed switching charger control chip is designed and fabricated in TSMC 0.18 μm BCD technology. The input voltage range is from 5 V to 10 V, the battery voltage range is from 2.7 V to 4.2 V and the maximum charging current is 2.0 A. Measured results show that the proposed charger achieves maximum power efficiency of 93.3% at 1.0 A of charging current.","PeriodicalId":7050,"journal":{"name":"2021 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2021-06-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"74889010","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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