Pub Date : 2021-06-14DOI: 10.1109/APEC42165.2021.9487225
Tian Luo, T. Mishima, Ching-Ming Lai
This paper presents an inductively coupled wireless power transfer (IWPT) system with a new circuit topology featuring three level high frequency inverter (TLHF– INV) and double LCC compensation tank. Different from a conventional IWPT system, this system provides phase shift pulse–width–modulation (PS–PWM) for output power control. Since this system targets an EV charging application, accordingly its operation frequency is defined in 85 kHz by Society of Automotive Engineers (SAE). The proposed IWPT system is analyzed by the state space equations for proving its Lyapunov stability and its anti–interference capability on simulation is given with various load value. The soft switching conditions are discussed such as zero voltage turn–on in outer switches and complete zero current switching in outer switches (Q1 and Q4). Moreover, a hybrid modulation method for tracking the ZCS at inner switches (Q2 and Q3) is mentioned. The performance of the proposed system which is designed for various load is investigated and evaluated by experiment. The experimental results reveal high conversion efficiency and certain loss reduction with variable frequency VFPS–PWM.
{"title":"High Frequency Three–level Inverter–based Inductive Wireless Power Transfer (IWPT) System with Double LCC Resonance","authors":"Tian Luo, T. Mishima, Ching-Ming Lai","doi":"10.1109/APEC42165.2021.9487225","DOIUrl":"https://doi.org/10.1109/APEC42165.2021.9487225","url":null,"abstract":"This paper presents an inductively coupled wireless power transfer (IWPT) system with a new circuit topology featuring three level high frequency inverter (TLHF– INV) and double LCC compensation tank. Different from a conventional IWPT system, this system provides phase shift pulse–width–modulation (PS–PWM) for output power control. Since this system targets an EV charging application, accordingly its operation frequency is defined in 85 kHz by Society of Automotive Engineers (SAE). The proposed IWPT system is analyzed by the state space equations for proving its Lyapunov stability and its anti–interference capability on simulation is given with various load value. The soft switching conditions are discussed such as zero voltage turn–on in outer switches and complete zero current switching in outer switches (Q1 and Q4). Moreover, a hybrid modulation method for tracking the ZCS at inner switches (Q2 and Q3) is mentioned. The performance of the proposed system which is designed for various load is investigated and evaluated by experiment. The experimental results reveal high conversion efficiency and certain loss reduction with variable frequency VFPS–PWM.","PeriodicalId":7050,"journal":{"name":"2021 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2021-06-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"74675303","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-06-14DOI: 10.1109/APEC42165.2021.9487426
Y. Yau, C. W. Wang, K. Hwu
This paper presents a non-isolated high step-down converter with switching zero voltage switching (ZVS). Compared with the traditional buck converter, in addition to using the duty cycle to determine the voltage gain, the proposed converter also use coupled inductors to achieve relatively high step-down voltage gain. In automotive electronics and telecommunications applications, the input voltage may instantaneously change. As the input voltage increases, the efficiency of the high step-down converter will be decreased. In order to overcome this problem, this paper presents a wide input voltage range for this converter. Based on the input voltage, changing the circuit topology provides a suitable voltage gain and hence obtains a relatively suitable duty cycle. Accordingly, the converter operating under the most load over a wide input voltage range can perform relatively good efficiency. In addition, the leakage inductance energy can be recovered to reduce switch voltage spikes. The protype circuit, with input voltage of 18-54V, output voltage of 2.5V and output current of 10A, is employed to demonstrate the effectiveness of the proposed control strategy.
{"title":"Applying Mode Exchange to High Step-Down Converter to Obtain Wide Input Voltage Range","authors":"Y. Yau, C. W. Wang, K. Hwu","doi":"10.1109/APEC42165.2021.9487426","DOIUrl":"https://doi.org/10.1109/APEC42165.2021.9487426","url":null,"abstract":"This paper presents a non-isolated high step-down converter with switching zero voltage switching (ZVS). Compared with the traditional buck converter, in addition to using the duty cycle to determine the voltage gain, the proposed converter also use coupled inductors to achieve relatively high step-down voltage gain. In automotive electronics and telecommunications applications, the input voltage may instantaneously change. As the input voltage increases, the efficiency of the high step-down converter will be decreased. In order to overcome this problem, this paper presents a wide input voltage range for this converter. Based on the input voltage, changing the circuit topology provides a suitable voltage gain and hence obtains a relatively suitable duty cycle. Accordingly, the converter operating under the most load over a wide input voltage range can perform relatively good efficiency. In addition, the leakage inductance energy can be recovered to reduce switch voltage spikes. The protype circuit, with input voltage of 18-54V, output voltage of 2.5V and output current of 10A, is employed to demonstrate the effectiveness of the proposed control strategy.","PeriodicalId":7050,"journal":{"name":"2021 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2021-06-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"73420729","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-06-14DOI: 10.1109/APEC42165.2021.9487308
Ankul Gupta, R. Ayyanar, S. Chakraborty
In this paper, a phase shedding control scheme for extended-duty-ratio (EDR) boost converter is proposed to achieve wide input and output voltage range operation of the converter. EDR converters can achieve very high gain, for example above 20 for a 4-phase converter, but have limitations on the lowest allowable gain. The proposed scheme allows operation at gain as low as unity while retaining the main benefits of EDR boost such as low voltage stress across switches. The phase shedding control can be optimized based on the application requirements. In this paper, the phase shedding control is optimized for low device voltage stress over wide input and output voltage range operation. The converter control implementation is discussed in detail. The control scheme is verified with a 4-phase EDR boost converter with input voltage varying between 20 V–40 V and output voltage ranging between 50 V–400 V. Experimental results of closed loop operation with adaptive PI controller are presented and the phase shedding scheme is verified by showing the transition from one configuration to another based on the converters varying gain.
本文提出了一种扩展占空比(EDR)升压变换器的减相控制方案，以实现变换器的宽输入输出电压范围工作。EDR变换器可以实现非常高的增益，例如4相变换器可以达到20以上，但对最低允许增益有限制。所提出的方案允许在低至1的增益下运行，同时保留EDR升压的主要优点，如开关间的低电压应力。可根据应用要求对脱相控制进行优化。本文针对宽输入、宽输出电压范围下器件电压应力低的特点，对断相控制进行了优化。详细讨论了变换器的控制实现。采用输入电压在20 V - 40 V之间，输出电压在50 V - 400 V之间的4相EDR升压变换器对控制方案进行了验证。给出了自适应PI控制器闭环运行的实验结果，并通过显示基于变换器增益变化的一种结构到另一种结构的转换来验证减相方案。
{"title":"Phase-Shedding Control Scheme for Wide Voltage Range Operation of Extended-Duty-Ratio Boost Converter","authors":"Ankul Gupta, R. Ayyanar, S. Chakraborty","doi":"10.1109/APEC42165.2021.9487308","DOIUrl":"https://doi.org/10.1109/APEC42165.2021.9487308","url":null,"abstract":"In this paper, a phase shedding control scheme for extended-duty-ratio (EDR) boost converter is proposed to achieve wide input and output voltage range operation of the converter. EDR converters can achieve very high gain, for example above 20 for a 4-phase converter, but have limitations on the lowest allowable gain. The proposed scheme allows operation at gain as low as unity while retaining the main benefits of EDR boost such as low voltage stress across switches. The phase shedding control can be optimized based on the application requirements. In this paper, the phase shedding control is optimized for low device voltage stress over wide input and output voltage range operation. The converter control implementation is discussed in detail. The control scheme is verified with a 4-phase EDR boost converter with input voltage varying between 20 V–40 V and output voltage ranging between 50 V–400 V. Experimental results of closed loop operation with adaptive PI controller are presented and the phase shedding scheme is verified by showing the transition from one configuration to another based on the converters varying gain.","PeriodicalId":7050,"journal":{"name":"2021 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2021-06-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"79339585","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-06-14DOI: 10.1109/APEC42165.2021.9487360
Javad Khodabakhsh, G. Moschopoulos
Bipolar DC microgrids (BDC-MGs) have been developed to improve the performance of conventional DC microgrids (DC-MGs). Voltage unbalances between the positive and negative poles, however, reduce system efficiency, make power flow control more complex, and create issues in hybrid AC-DC microgrids. In general, centralized and distributed approaches are proposed in the literature in order to address the voltage unbalance issues in BDC-MGs. Distributed approaches are more robust against a single point of failure and more scalable than centralized solutions. This paper proposes a new distributed voltage balancing method for BDC-MGs with three-wire loads that are operated as smart loads in BDC-MGs. This method relies on the unused capacity of three-wire power electronic converters in the DC-MGs so that no additional converter is required. The proposed voltage balancing method’s feasibility is confirmed with simulation results obtained from MATLAB/Simulink.
{"title":"Distributed Unbalanced Voltage Suppression in Bipolar DC Microgrids with Smart Loads","authors":"Javad Khodabakhsh, G. Moschopoulos","doi":"10.1109/APEC42165.2021.9487360","DOIUrl":"https://doi.org/10.1109/APEC42165.2021.9487360","url":null,"abstract":"Bipolar DC microgrids (BDC-MGs) have been developed to improve the performance of conventional DC microgrids (DC-MGs). Voltage unbalances between the positive and negative poles, however, reduce system efficiency, make power flow control more complex, and create issues in hybrid AC-DC microgrids. In general, centralized and distributed approaches are proposed in the literature in order to address the voltage unbalance issues in BDC-MGs. Distributed approaches are more robust against a single point of failure and more scalable than centralized solutions. This paper proposes a new distributed voltage balancing method for BDC-MGs with three-wire loads that are operated as smart loads in BDC-MGs. This method relies on the unused capacity of three-wire power electronic converters in the DC-MGs so that no additional converter is required. The proposed voltage balancing method’s feasibility is confirmed with simulation results obtained from MATLAB/Simulink.","PeriodicalId":7050,"journal":{"name":"2021 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2021-06-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"79353465","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-06-14DOI: 10.1109/APEC42165.2021.9487035
Arpan Laha, P. Jain
This paper presents an analysis of a Wireless Power Transfer (WPT) System using a buck-boost converter for voltage regulation with the objective of maximizing efficiency by reducing conduction losses and achieving zero voltage switching (ZVS). Unlike conventional buck-boost converter gain characteristics, the buck-boost converter cascaded with the receiver of a WPT system does not have a monotonically increasing gain curve and instead shows a concave characteristic. Thus, a required output voltage can be obtained with two different values of duty ratio of the buck-boost converter if the voltage gain required is below the maximum attainable gain of the system. This novel work will investigate which duty ratio will yield a higher efficiency at various switching frequencies of the transmitter by considering conduction losses and the ability to obtain ZVS. Discussion on coupling strength between coils and its impact on ZVS capability is also shown. Experimental results on a 5W, 5V output system with the two possible duty ratios are used to verify the analysis.
{"title":"Maximizing Efficiency while maintaining Voltage Regulation of Wireless Power Transfer Systems using a Buck-Boost Converter","authors":"Arpan Laha, P. Jain","doi":"10.1109/APEC42165.2021.9487035","DOIUrl":"https://doi.org/10.1109/APEC42165.2021.9487035","url":null,"abstract":"This paper presents an analysis of a Wireless Power Transfer (WPT) System using a buck-boost converter for voltage regulation with the objective of maximizing efficiency by reducing conduction losses and achieving zero voltage switching (ZVS). Unlike conventional buck-boost converter gain characteristics, the buck-boost converter cascaded with the receiver of a WPT system does not have a monotonically increasing gain curve and instead shows a concave characteristic. Thus, a required output voltage can be obtained with two different values of duty ratio of the buck-boost converter if the voltage gain required is below the maximum attainable gain of the system. This novel work will investigate which duty ratio will yield a higher efficiency at various switching frequencies of the transmitter by considering conduction losses and the ability to obtain ZVS. Discussion on coupling strength between coils and its impact on ZVS capability is also shown. Experimental results on a 5W, 5V output system with the two possible duty ratios are used to verify the analysis.","PeriodicalId":7050,"journal":{"name":"2021 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2021-06-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"79357025","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-06-14DOI: 10.1109/APEC42165.2021.9487189
Satish Belkhode, A. Shukla, S. Doolla
Recently introduced Silicon carbide (SiC) devices have significantly improved the performance of the power electronic converters. These devices are able to provide higher power density with high efficiency compared to the Silicon (Si) devices. In this paper, the topology based on Si IGBTs and SiC MOSFETs is proposed to achieve high efficiency with reduced cost. The proposed converter achieves zero current switching of Si IGBTs for all power factor values using the selected switching states in the proposed modulation scheme. Therefore, high efficiency can be obtained even at high switching frequency operation for wide range of operating conditions. Additionally, the utilization of the SiC MOSFETs further reduces the switching losses. Moreover, the conduction losses of the SiC MOSFETs are minimized by strategically selecting the switching states in such a way that SiC MOSFETs conduct in parallel conduction paths during the null state operation. This paper presents the detailed operating principle of the proposed topology using the presented modulation scheme. Further, a switching loss analysis is presented to evaluate the conduction and switching losses of the proposed topology. Moreover, the experimental results are presented to demonstrate the basic operating principle of the proposed topology. Finally, the efficiency values of the proposed topology are compared with the existing topologies for different operating conductions.
{"title":"A Hybrid Active Neutral-Point-Clamped Converter for Medium-Voltage High-Power applications using Si and SiC devices","authors":"Satish Belkhode, A. Shukla, S. Doolla","doi":"10.1109/APEC42165.2021.9487189","DOIUrl":"https://doi.org/10.1109/APEC42165.2021.9487189","url":null,"abstract":"Recently introduced Silicon carbide (SiC) devices have significantly improved the performance of the power electronic converters. These devices are able to provide higher power density with high efficiency compared to the Silicon (Si) devices. In this paper, the topology based on Si IGBTs and SiC MOSFETs is proposed to achieve high efficiency with reduced cost. The proposed converter achieves zero current switching of Si IGBTs for all power factor values using the selected switching states in the proposed modulation scheme. Therefore, high efficiency can be obtained even at high switching frequency operation for wide range of operating conditions. Additionally, the utilization of the SiC MOSFETs further reduces the switching losses. Moreover, the conduction losses of the SiC MOSFETs are minimized by strategically selecting the switching states in such a way that SiC MOSFETs conduct in parallel conduction paths during the null state operation. This paper presents the detailed operating principle of the proposed topology using the presented modulation scheme. Further, a switching loss analysis is presented to evaluate the conduction and switching losses of the proposed topology. Moreover, the experimental results are presented to demonstrate the basic operating principle of the proposed topology. Finally, the efficiency values of the proposed topology are compared with the existing topologies for different operating conductions.","PeriodicalId":7050,"journal":{"name":"2021 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2021-06-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"84388135","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-06-14DOI: 10.1109/APEC42165.2021.9487207
V. Nguyen, Van-Binh Vu, G. Gohil, B. Fahimi
This paper presents an optimal design method of the double-sided LCC (Inductor-capacitor-capacitor) compensation network to achieve a high efficiency by optimizing compensation factors of the primary and secondary circuit of an inductive power transfer (IPT) system. Simulation and experimental results show that with a proper selection of the compensation factors, it is possible to achieve a high and sustained efficiency over a wide load variation and misalignment. The double-sided LCC topology is compared with the LCC-S (S: series) and LCC-P (P: parallel) topology in terms of the transfer efficiency at the operating frequency of 85kHz, transfer gap of 160mm and misalignment up to 90mm. The result reveals that the designed double-sided LCC topology is superior to its counterparts in terms of transfer efficiency. A deep discussion of these topologies is included to provide insights for all three topologies analyzed in this paper.
{"title":"Efficiency optimization of double-sided LCC topology for inductive power transfer systems","authors":"V. Nguyen, Van-Binh Vu, G. Gohil, B. Fahimi","doi":"10.1109/APEC42165.2021.9487207","DOIUrl":"https://doi.org/10.1109/APEC42165.2021.9487207","url":null,"abstract":"This paper presents an optimal design method of the double-sided LCC (Inductor-capacitor-capacitor) compensation network to achieve a high efficiency by optimizing compensation factors of the primary and secondary circuit of an inductive power transfer (IPT) system. Simulation and experimental results show that with a proper selection of the compensation factors, it is possible to achieve a high and sustained efficiency over a wide load variation and misalignment. The double-sided LCC topology is compared with the LCC-S (S: series) and LCC-P (P: parallel) topology in terms of the transfer efficiency at the operating frequency of 85kHz, transfer gap of 160mm and misalignment up to 90mm. The result reveals that the designed double-sided LCC topology is superior to its counterparts in terms of transfer efficiency. A deep discussion of these topologies is included to provide insights for all three topologies analyzed in this paper.","PeriodicalId":7050,"journal":{"name":"2021 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2021-06-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"84388398","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-06-14DOI: 10.1109/APEC42165.2021.9487070
L. Ravi, D. Dong, R. Burgos, Xiaoqing Song, P. Cairoli
Solid state circuit breakers (SSCBs) employ power semiconductor devices to provide fast fault current interruption (in the microsecond range) in a compact and reliable package. SiC power MOSFETs are an attractive option for SSCBs offering low conduction losses for improved overall efficiency. This paper presents an evaluation of SiC MOSFETs to explore their capabilities and potential limiting factors for SSCBs in dc distribution applications. To this end, surge current experiments are performed using a prototype to investigate the circuit operation during fault transients. Design considerations for the SSCB system including SiC MOSFET and voltage clamping circuit are developed expected to aid in the design and construction of SiC-based SSCB units.
{"title":"Evaluation of SiC MOSFETs for Solid State Circuit Breakers in DC Distribution Applications","authors":"L. Ravi, D. Dong, R. Burgos, Xiaoqing Song, P. Cairoli","doi":"10.1109/APEC42165.2021.9487070","DOIUrl":"https://doi.org/10.1109/APEC42165.2021.9487070","url":null,"abstract":"Solid state circuit breakers (SSCBs) employ power semiconductor devices to provide fast fault current interruption (in the microsecond range) in a compact and reliable package. SiC power MOSFETs are an attractive option for SSCBs offering low conduction losses for improved overall efficiency. This paper presents an evaluation of SiC MOSFETs to explore their capabilities and potential limiting factors for SSCBs in dc distribution applications. To this end, surge current experiments are performed using a prototype to investigate the circuit operation during fault transients. Design considerations for the SSCB system including SiC MOSFET and voltage clamping circuit are developed expected to aid in the design and construction of SiC-based SSCB units.","PeriodicalId":7050,"journal":{"name":"2021 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2021-06-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"84532995","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-06-14DOI: 10.1109/APEC42165.2021.9487287
M. Haque, Seungdeog Choi
The reliability of semiconductor switches is significant in power electronics systems. It is especially critical with solid-state transformer (SST) due to its safety- and mission-critical applications, including in-vehicle charging or power-grid interfaces. The traditional controller commonly requires an accurate mathematical model. However, such a traditional setting changes due to degradation and aging, adding extreme complexity and large uncertainty in a stability study. To address such uncertainty in increasingly complicated SST operations, in this paper, a deep deterministic gradient policy (DDGP) reinforcement learning (RL) assisted degradation-aware control of SST is proposed. The proposed controller will avoid complex mathematical modeling while ensuring optimal power transfer with an extended lifetime. The proposed actor-critic DDGP assisted controller learns and optimizes the phase-shift angle by evaluating the SST behavior under different input and health status. In this paper, an analytical background of DDGP and its application in a reliability integrated controller is provided along with a training environment. The validity of the proposed controller is validated by 5kW cascode GaN FET-based SST prototype.
在电力电子系统中，半导体开关的可靠性是非常重要的。由于固态变压器(SST)的安全性和任务关键型应用，包括车载充电或电网接口，因此对于固态变压器(SST)尤为重要。传统的控制器通常需要精确的数学模型。然而，由于退化和老化，这种传统的设置会发生变化，这给稳定性研究增加了极大的复杂性和很大的不确定性。为了解决日益复杂的海温操作中的这种不确定性，本文提出了一种深度确定性梯度策略(DDGP)强化学习(RL)辅助海温退化感知控制。所提出的控制器将避免复杂的数学建模，同时确保具有延长寿命的最佳功率传输。该控制器通过评估不同输入和健康状态下的海表温度行为来学习和优化相移角。本文介绍了DDGP的分析背景及其在可靠性集成控制器中的应用，并给出了一个训练环境。通过5kW级联GaN fet SST样机验证了所提控制器的有效性。
{"title":"Deep Deterministic Gradient Policy (DDGP) Reinforcement Learning Assisted Degradation-Aware Control of Solid-State Transformer","authors":"M. Haque, Seungdeog Choi","doi":"10.1109/APEC42165.2021.9487287","DOIUrl":"https://doi.org/10.1109/APEC42165.2021.9487287","url":null,"abstract":"The reliability of semiconductor switches is significant in power electronics systems. It is especially critical with solid-state transformer (SST) due to its safety- and mission-critical applications, including in-vehicle charging or power-grid interfaces. The traditional controller commonly requires an accurate mathematical model. However, such a traditional setting changes due to degradation and aging, adding extreme complexity and large uncertainty in a stability study. To address such uncertainty in increasingly complicated SST operations, in this paper, a deep deterministic gradient policy (DDGP) reinforcement learning (RL) assisted degradation-aware control of SST is proposed. The proposed controller will avoid complex mathematical modeling while ensuring optimal power transfer with an extended lifetime. The proposed actor-critic DDGP assisted controller learns and optimizes the phase-shift angle by evaluating the SST behavior under different input and health status. In this paper, an analytical background of DDGP and its application in a reliability integrated controller is provided along with a training environment. The validity of the proposed controller is validated by 5kW cascode GaN FET-based SST prototype.","PeriodicalId":7050,"journal":{"name":"2021 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2021-06-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"85117169","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-06-14DOI: 10.1109/APEC42165.2021.9487239
Md Nazmul Islam, Seundeog Choi
This paper presents the modeling, design, and Multiphysics analysis of a 2000-W, 500000-rpm ultra-high-speed (UHS) machine for a mechanical-based antenna (AMEBA) application. The proposed machine will be utilized as a mechanical transmitter for extremely/very low frequency (0.3-3 kHz) communication, which will immediately enable the bidirectional communication between the earth surface to underground or undersea facilities. The design of a UHS machine for AMEBA application presents several special challenges because it requires a high shaft torque at UHS operation. Also, the UHS machine necessitates a high design-safety-margin to avoid any catastrophic failure at the UHS operation. However, a conventional 3-phase UHS machine cannot meet the torque requirement, thermal limit, structural integrity, and fails to provide enough safety margin at UHS operation. To overcome this limitation, this paper presents the design of a high-power UHS machine, which utilizes a multi- phase winding configuration and special materials to improve the torque density and the design-safety-margin. The machine geometry and design parameters are optimized using a Multiphysics loss minimization approach. The proposed design and its performance are analyzed using extensive finite element analysis (FEA). It is observed that the proposed design meets the electromagnetic, thermal, structural, and Rotordynamic performance with a greater design-safety-margin. Finally, a prototype of the proposed machine is developed and its performances (back-EMF and natural frequencies) are experimentally validated.
{"title":"Modeling and Design of a 6-Phase Ultra-High-Speed Machine for ELF/VLF Wireless Communication Transmitter","authors":"Md Nazmul Islam, Seundeog Choi","doi":"10.1109/APEC42165.2021.9487239","DOIUrl":"https://doi.org/10.1109/APEC42165.2021.9487239","url":null,"abstract":"This paper presents the modeling, design, and Multiphysics analysis of a 2000-W, 500000-rpm ultra-high-speed (UHS) machine for a mechanical-based antenna (AMEBA) application. The proposed machine will be utilized as a mechanical transmitter for extremely/very low frequency (0.3-3 kHz) communication, which will immediately enable the bidirectional communication between the earth surface to underground or undersea facilities. The design of a UHS machine for AMEBA application presents several special challenges because it requires a high shaft torque at UHS operation. Also, the UHS machine necessitates a high design-safety-margin to avoid any catastrophic failure at the UHS operation. However, a conventional 3-phase UHS machine cannot meet the torque requirement, thermal limit, structural integrity, and fails to provide enough safety margin at UHS operation. To overcome this limitation, this paper presents the design of a high-power UHS machine, which utilizes a multi- phase winding configuration and special materials to improve the torque density and the design-safety-margin. The machine geometry and design parameters are optimized using a Multiphysics loss minimization approach. The proposed design and its performance are analyzed using extensive finite element analysis (FEA). It is observed that the proposed design meets the electromagnetic, thermal, structural, and Rotordynamic performance with a greater design-safety-margin. Finally, a prototype of the proposed machine is developed and its performances (back-EMF and natural frequencies) are experimentally validated.","PeriodicalId":7050,"journal":{"name":"2021 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2021-06-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"85247853","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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