Pub Date : 2021-06-30DOI: 10.15598/AEEE.V19I2.4101
M. Gupta, R. Chauhan
A binary comparator architecture is proposed in this work for static logic to achieve both low-power and high-performance operations. It also presents a detailed timing performance and power analysis of various state-of-the-art comparator designs. The main advantages of this design are its high speed and power efficiency maintained over a wide range of operands size, which is useful at low-input data activity environments. The proposed circuit design uses minimum fan-in and fan-out logic gates for achieving high speed and low power dissipation. Utilizing a 2-bit binary comparator circuit with minimum fan-in and fan-out of logic gates (NAND-NOR), the architecture of a parallel binary comparator is proposed for higher input operands by using a low radix multiplexer and priority encoder. Further, to decrease the size of the multiplexer and priority encoder by two times, a general architecture is also proposed by using a 4-bit binary comparator to reduce its complexity. The proposed circuits are optimized in terms of the power consumption and delay, which are due to low load capacitance, low leakages, and reduced dynamic power dissipation. Each of the proposed circuits has its own merits in terms of speed, power consumption, Power-Delay Product (PDP). Its synthesis is done on 180 nm as well as 90 nm CMOS technology using the Cadence tool. The physical layout of the proposed architecture using a 90 nm CMOS process (GPDK process) is also obtained.
{"title":"Design of an Efficient Parallel Comparator Architecture for Low Power Delay Product","authors":"M. Gupta, R. Chauhan","doi":"10.15598/AEEE.V19I2.4101","DOIUrl":"https://doi.org/10.15598/AEEE.V19I2.4101","url":null,"abstract":"A binary comparator architecture is proposed in this work for static logic to achieve both low-power and high-performance operations. It also presents a detailed timing performance and power analysis of various state-of-the-art comparator designs. The main advantages of this design are its high speed and power efficiency maintained over a wide range of operands size, which is useful at low-input data activity environments. The proposed circuit design uses minimum fan-in and fan-out logic gates for achieving high speed and low power dissipation. Utilizing a 2-bit binary comparator circuit with minimum fan-in and fan-out of logic gates (NAND-NOR), the architecture of a parallel binary comparator is proposed for higher input operands by using a low radix multiplexer and priority encoder. Further, to decrease the size of the multiplexer and priority encoder by two times, a general architecture is also proposed by using a 4-bit binary comparator to reduce its complexity. The proposed circuits are optimized in terms of the power consumption and delay, which are due to low load capacitance, low leakages, and reduced dynamic power dissipation. Each of the proposed circuits has its own merits in terms of speed, power consumption, Power-Delay Product (PDP). Its synthesis is done on 180 nm as well as 90 nm CMOS technology using the Cadence tool. The physical layout of the proposed architecture using a 90 nm CMOS process (GPDK process) is also obtained.","PeriodicalId":7268,"journal":{"name":"Advances in Electrical and Electronic Engineering","volume":" ","pages":""},"PeriodicalIF":0.6,"publicationDate":"2021-06-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"49245498","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-06-30DOI: 10.15598/aeee.v19i2.4011
Haris Ahmetović, M. Saric, J. Hivziefendic
This paper presents a fuzzy system for reliability-based power distribution network planning. The proposed Mamdani type fuzzy inference system with subsequent application of the Bellman-Zadeh decision-making method is used to evaluate the reliability of the power line feeders as criteria for power system planning. Unplanned outages of system components, the Energy Not Supplied (ENS) and age of the power lines are used as input variables of the system and are fuzzified using triangular fuzzy functions. The proposed model was tested on a model of a realistic distribution network in order to prove its relevance and applicability. Results demonstrated that this model could make a contribution in this field as it can be used in practical planning situations for project priority ranking.
{"title":"Reliability Based Power Distribution Network Planning Using Fuzzy Logic","authors":"Haris Ahmetović, M. Saric, J. Hivziefendic","doi":"10.15598/aeee.v19i2.4011","DOIUrl":"https://doi.org/10.15598/aeee.v19i2.4011","url":null,"abstract":"This paper presents a fuzzy system for reliability-based power distribution network planning. The proposed Mamdani type fuzzy inference system with subsequent application of the Bellman-Zadeh decision-making method is used to evaluate the reliability of the power line feeders as criteria for power system planning. Unplanned outages of system components, the Energy Not Supplied (ENS) and age of the power lines are used as input variables of the system and are fuzzified using triangular fuzzy functions. The proposed model was tested on a model of a realistic distribution network in order to prove its relevance and applicability. Results demonstrated that this model could make a contribution in this field as it can be used in practical planning situations for project priority ranking.","PeriodicalId":7268,"journal":{"name":"Advances in Electrical and Electronic Engineering","volume":" ","pages":""},"PeriodicalIF":0.6,"publicationDate":"2021-06-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"42812155","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-06-30DOI: 10.15598/AEEE.V19I2.3821
Nishant Kumar, P. Mittal, B. Rawat, Mudit Mittal
This paper highlights a comparative analysis of eight diverse techniques for 2 to 1 multiplexer implementation. The functionality is identical but significant differences in dynamic power consumption and propagation delay are observed. This paper aims to enable the designer to pick out the best fit structure for a specific application in keeping with their design requirement. The multiplexers are designed at 90 nm technology node and simulated at a supply voltage of 1V.
{"title":"Dynamic Power Consumption and Delay Analysis for Ultra-Low Power 2 to 1 Multiplexer Designs","authors":"Nishant Kumar, P. Mittal, B. Rawat, Mudit Mittal","doi":"10.15598/AEEE.V19I2.3821","DOIUrl":"https://doi.org/10.15598/AEEE.V19I2.3821","url":null,"abstract":"This paper highlights a comparative analysis of eight diverse techniques for 2 to 1 multiplexer implementation. The functionality is identical but significant differences in dynamic power consumption and propagation delay are observed. This paper aims to enable the designer to pick out the best fit structure for a specific application in keeping with their design requirement. The multiplexers are designed at 90 nm technology node and simulated at a supply voltage of 1V.","PeriodicalId":7268,"journal":{"name":"Advances in Electrical and Electronic Engineering","volume":" ","pages":""},"PeriodicalIF":0.6,"publicationDate":"2021-06-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"47995219","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-06-30DOI: 10.15598/AEEE.V19I2.3881
D. Ounnas, Dhaouadi Guiza, Y. Soufi, Mahmoud Maamri
This paper deals with the design, simulation and real-time implementation of Maximum Power Point Tracking (MPPT) technique for a Photovoltaic (PV) system. A new modified Incremental Conductance (INC) algorithm is proposed to extract maximum power from PV panels at different levels of temperature and solar irradiation. The considered PV system consists of a PV panel, a DC-DC boost converter controlled by MPPT algorithm and a resistive load. First, the simulation tests of the proposed algorithm using Matlab/Simulink environment are presented, and then, followed by a real-time implementation using Arduino Mega board and a specific package known as ``Simulink support package for arduino hardware'' to validate experimentally the~simulation tests. Simulation and experimental results show that the proposed modified INC algorithm offers much less oscillation around the Maximum Power Point (MPP), fast dynamic response and better performances compared to the conventional INC algorithm.
{"title":"Design and Hardware Implementation of Modified Incremental Conductance Algorithm for Photovoltaic System","authors":"D. Ounnas, Dhaouadi Guiza, Y. Soufi, Mahmoud Maamri","doi":"10.15598/AEEE.V19I2.3881","DOIUrl":"https://doi.org/10.15598/AEEE.V19I2.3881","url":null,"abstract":"This paper deals with the design, simulation and real-time implementation of Maximum Power Point Tracking (MPPT) technique for a Photovoltaic (PV) system. A new modified Incremental Conductance (INC) algorithm is proposed to extract maximum power from PV panels at different levels of temperature and solar irradiation. The considered PV system consists of a PV panel, a DC-DC boost converter controlled by MPPT algorithm and a resistive load. First, the simulation tests of the proposed algorithm using Matlab/Simulink environment are presented, and then, followed by a real-time implementation using Arduino Mega board and a specific package known as ``Simulink support package for arduino hardware'' to validate experimentally the~simulation tests. Simulation and experimental results show that the proposed modified INC algorithm offers much less oscillation around the Maximum Power Point (MPP), fast dynamic response and better performances compared to the conventional INC algorithm.","PeriodicalId":7268,"journal":{"name":"Advances in Electrical and Electronic Engineering","volume":" ","pages":""},"PeriodicalIF":0.6,"publicationDate":"2021-06-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"44816022","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-06-30DOI: 10.15598/AEEE.V19I2.4100
Bhawna Gupta, V. Khandelwal
In this paper, an improved Bidimensional Empirical Mode Decomposition (BEMD) based speckle reduction technique for ultrasound images has been proposed. The noisy image has been decomposed into its Intrinsic Mode Functions (IMFs) and a~residue. The noise component of the low order IMFs is removed with the pixel-wise Wiener filtering. The image is reconstructed with these filtered low order IMFs, high order IMFs and the residue. The performance of the proposed method has been tested on synthetic as well as real ultrasound images having noise components of different variance. The experimental results show that the proposed algorithm performs better than other existing methods for synthetic images as well as real ultrasound images in terms of various image quality matrices.
{"title":"BEMD Based Ultrasound Image Speckle Reduction Technique Using Pixel-Wise Wiener Filtering","authors":"Bhawna Gupta, V. Khandelwal","doi":"10.15598/AEEE.V19I2.4100","DOIUrl":"https://doi.org/10.15598/AEEE.V19I2.4100","url":null,"abstract":"In this paper, an improved Bidimensional Empirical Mode Decomposition (BEMD) based speckle reduction technique for ultrasound images has been proposed. The noisy image has been decomposed into its Intrinsic Mode Functions (IMFs) and a~residue. The noise component of the low order IMFs is removed with the pixel-wise Wiener filtering. The image is reconstructed with these filtered low order IMFs, high order IMFs and the residue. The performance of the proposed method has been tested on synthetic as well as real ultrasound images having noise components of different variance. The experimental results show that the proposed algorithm performs better than other existing methods for synthetic images as well as real ultrasound images in terms of various image quality matrices.","PeriodicalId":7268,"journal":{"name":"Advances in Electrical and Electronic Engineering","volume":" ","pages":""},"PeriodicalIF":0.6,"publicationDate":"2021-06-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"47734491","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-04-16DOI: 10.2174/2352096514999201224124958
J. Phull, N. S. Grewal, S. Singh, A. Rani
Wireless communication is being used in all communication standards. However, with each passing day, the bandwidth scarcity has become a significant concern for the upcoming wireless technologies. In order to address this concern, various techniques based on artificial intelligence have been designed. The basic intelligent radio called cognitive radio has been devised. It works on the basic principle of spectrum sensing and detecting the free frequency for transmission of the secondary user, who is an unlicensed user. This work proposes an efficient technique that has been developed to design cognitive radio based on SDR platform. The frequency updating algorithm has been added for the performance assessment of the proposed technique. The analysis posits that for every 10dB rise in Gaussian Noise, the bit error rate of secondary transmitter and spectrum sensor, cause an increment of 19.59% and 29.39%, respectively. It has been found that spectrum sensor is more prone to noise and that the Gaussian noise degrades the performance of the system. Therefore, it is pertinent that the spectrum sensor should be programmed carefully. This analysis shows that the best range of spectrum sensor under Gaussian noise is 0 to 0.1dB and the bit error rate is within this specified range.
{"title":"Implementation and Performance Analysis of Cognitive Radio with Frequency Updating Algorithm on Software-defined Radio Platform","authors":"J. Phull, N. S. Grewal, S. Singh, A. Rani","doi":"10.2174/2352096514999201224124958","DOIUrl":"https://doi.org/10.2174/2352096514999201224124958","url":null,"abstract":"\u0000\u0000Wireless communication is being used in all communication standards. However, with\u0000each passing day, the bandwidth scarcity has become a significant concern for the upcoming wireless\u0000technologies. In order to address this concern, various techniques based on artificial intelligence\u0000have been designed. The basic intelligent radio called cognitive radio has been devised. It\u0000works on the basic principle of spectrum sensing and detecting the free frequency for transmission\u0000of the secondary user, who is an unlicensed user. This work proposes an efficient technique that\u0000has been developed to design cognitive radio based on SDR platform. The frequency updating algorithm\u0000has been added for the performance assessment of the proposed technique. The analysis\u0000posits that for every 10dB rise in Gaussian Noise, the bit error rate of secondary transmitter and\u0000spectrum sensor, cause an increment of 19.59% and 29.39%, respectively. It has been found that\u0000spectrum sensor is more prone to noise and that the Gaussian noise degrades the performance of\u0000the system. Therefore, it is pertinent that the spectrum sensor should be programmed carefully.\u0000This analysis shows that the best range of spectrum sensor under Gaussian noise is 0 to 0.1dB and\u0000the bit error rate is within this specified range.\u0000","PeriodicalId":7268,"journal":{"name":"Advances in Electrical and Electronic Engineering","volume":"14 1","pages":"268-275"},"PeriodicalIF":0.6,"publicationDate":"2021-04-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"41327631","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-04-16DOI: 10.2174/2352096514999210104144312
Youchan Zhu, Yingzi Wang, W. Liang
With the further development of the electric Internet of Things (eIoT), IoT devices in the distributed network generate data with different frequencies and types. Fog platform is located between the smart collected terminal and cloud platform, and the resources of fog computing are limited, which affects the delay of service processing time and response time. In this paper, an algorithm of fog resource scheduling and load balancing is proposed. First, the fog devices divide the tasks into high or low priority. Then, the fog management nodes cluster the fog nodes through the K-mean+ algorithm and implement the earliest deadline first dynamic (EDFD) task scheduling algorithm and De-REF neural network load balancing algorithm. We use tools to simulate the environment, and the results show that this method has strong advantages in -30% response time, -50% scheduling time, delay, -50% load balancing rate, and energy consumption, which provides a better guarantee for eIoT. Resource scheduling is an important factor affecting system performance. This article mainly addresses the needs of eIoT in terminal network communication delay, connection failure, and resource shortage. A new method of resource scheduling and load balancing is proposed. The evaluation was performed, and it proved that our proposed algorithm has better performance than the previous method, which brings new opportunities for the realization of eIoT.
{"title":"Research on Fog Resource Scheduling based on Cloud-fog Collaboration Technology in the Electric Internet of Things","authors":"Youchan Zhu, Yingzi Wang, W. Liang","doi":"10.2174/2352096514999210104144312","DOIUrl":"https://doi.org/10.2174/2352096514999210104144312","url":null,"abstract":"\u0000\u0000With the further development of the electric Internet of Things (eIoT), IoT\u0000devices in the distributed network generate data with different frequencies and types.\u0000\u0000\u0000\u0000Fog platform is located between the smart collected terminal and cloud platform, and the\u0000resources of fog computing are limited, which affects the delay of service processing time and response\u0000time.\u0000\u0000\u0000\u0000In this paper, an algorithm of fog resource scheduling and load balancing is proposed.\u0000First, the fog devices divide the tasks into high or low priority. Then, the fog management nodes\u0000cluster the fog nodes through the K-mean+ algorithm and implement the earliest deadline first\u0000dynamic (EDFD) task scheduling algorithm and De-REF neural network load balancing algorithm.\u0000\u0000\u0000\u0000We use tools to simulate the environment, and the results show that this method has strong\u0000advantages in -30% response time, -50% scheduling time, delay, -50% load balancing rate, and energy\u0000consumption, which provides a better guarantee for eIoT.\u0000\u0000\u0000\u0000Resource scheduling is an important factor affecting system performance. This article\u0000mainly addresses the needs of eIoT in terminal network communication delay, connection failure,\u0000and resource shortage. A new method of resource scheduling and load balancing is proposed. The\u0000evaluation was performed, and it proved that our proposed algorithm has better performance than\u0000the previous method, which brings new opportunities for the realization of eIoT.\u0000","PeriodicalId":7268,"journal":{"name":"Advances in Electrical and Electronic Engineering","volume":"14 1","pages":"347-359"},"PeriodicalIF":0.6,"publicationDate":"2021-04-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"44760820","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-03-31DOI: 10.15598/AEEE.V19I1.3788
N. Gupta, Prashanth Kumar
{"title":"Elicitation of Scattering Parameters of Dual-halo Dual-dielectric Triple-material Surrounding Gate (DH-DD-TM-SG) MOSFET for Microwave Frequency Applications","authors":"N. Gupta, Prashanth Kumar","doi":"10.15598/AEEE.V19I1.3788","DOIUrl":"https://doi.org/10.15598/AEEE.V19I1.3788","url":null,"abstract":"","PeriodicalId":7268,"journal":{"name":"Advances in Electrical and Electronic Engineering","volume":" ","pages":""},"PeriodicalIF":0.6,"publicationDate":"2021-03-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"47588300","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-03-31DOI: 10.15598/AEEE.V19I1.4002
Luciano Emilio Belandria, Nancy Alejandra Agudelo, J. Bergas-Jané
This paper presents a steady-state comparison of two methods that generate an orthogonal voltage system for a single-phase Phase-Locked Loop (PLL) structure: a widely accepted one based on a Second Order Generalized Integrator (SOGI) and a new one based on a All-Pass Filter (APF) with Lattice structure. Both methods are very attractive because of their simple digital implementation, low computational load and good performance under harmonically distorted grid conditions and variable frequency, so they are a good alternative to other known methods. The paper derives and analyzes the full state space models of the two methods. It is shown that these two methods are equivalent in the most common operation conditions of distributed energy resources, although the APF structure is clearly better than the SOGI one because it maintains its orthogonal generation ability for any higher notch frequencies and any lower sampling frequencies. The comparative analysis were validated by simulation using MATLAB/Simulink and experimental results using a fixed-point DSP.
{"title":"Comparative Analysis of Lattice-based All-Pass Filter and Second Order Generalized Integrator as Orthogonal System Generator of a PLL","authors":"Luciano Emilio Belandria, Nancy Alejandra Agudelo, J. Bergas-Jané","doi":"10.15598/AEEE.V19I1.4002","DOIUrl":"https://doi.org/10.15598/AEEE.V19I1.4002","url":null,"abstract":"This paper presents a steady-state comparison of two methods that generate an orthogonal voltage system for a single-phase Phase-Locked Loop (PLL) structure: a widely accepted one based on a Second Order Generalized Integrator (SOGI) and a new one based on a All-Pass Filter (APF) with Lattice structure. Both methods are very attractive because of their simple digital implementation, low computational load and good performance under harmonically distorted grid conditions and variable frequency, so they are a good alternative to other known methods. The paper derives and analyzes the full state space models of the two methods. It is shown that these two methods are equivalent in the most common operation conditions of distributed energy resources, although the APF structure is clearly better than the SOGI one because it maintains its orthogonal generation ability for any higher notch frequencies and any lower sampling frequencies. The comparative analysis were validated by simulation using MATLAB/Simulink and experimental results using a fixed-point DSP.","PeriodicalId":7268,"journal":{"name":"Advances in Electrical and Electronic Engineering","volume":" ","pages":""},"PeriodicalIF":0.6,"publicationDate":"2021-03-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"49019599","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-03-31DOI: 10.15598/AEEE.V19I1.4006
S. Banihani, M. Hayajneh, A. Al-Jarrah, S. Mutawe
This work proposes new control approaches for tracking and motion planning of Unmanned Ground Vehicles (UGVs) that utilize skid steering system. This work proposes an energy based Variable Structure Control (VSC) scheme, in which two independent Sliding Control Surfaces (SCS)s are designed based on the system states. Particularly, the controller is designed based on the assessment and the minimization of the systems total energy by finding an explicit relation between the controller gains and the slope of the sliding surface. The work also discusses a new fuzzy potential approach for motion planning of UGV. The Fuzzy system generates an attractive force that pulls the UGV effectively toward a moving or stationary target, and a repulsive force, which is required to avoid any stationary or moving obstacles. Both, the VSC and the motion planning were validated by a nonlinear model of an Unmanned Tracked Robot (UTR) on different trajectories, and was compared with different control schemes. Simulation results show superiority of the proposed VSC over other methods with less control effort. Furthermore, the new motion planning controller proved its high capacity in producing a smooth and dynamic trajectory to allow an UGV to track a target and to avoid obstacles.
{"title":"New Control Approaches for Trajectory Tracking and Motion Planning of Unmanned Tracked Robot","authors":"S. Banihani, M. Hayajneh, A. Al-Jarrah, S. Mutawe","doi":"10.15598/AEEE.V19I1.4006","DOIUrl":"https://doi.org/10.15598/AEEE.V19I1.4006","url":null,"abstract":"This work proposes new control approaches for tracking and motion planning of Unmanned Ground Vehicles (UGVs) that utilize skid steering system. This work proposes an energy based Variable Structure Control (VSC) scheme, in which two independent Sliding Control Surfaces (SCS)s are designed based on the system states. Particularly, the controller is designed based on the assessment and the minimization of the systems total energy by finding an explicit relation between the controller gains and the slope of the sliding surface. The work also discusses a new fuzzy potential approach for motion planning of UGV. The Fuzzy system generates an attractive force that pulls the UGV effectively toward a moving or stationary target, and a repulsive force, which is required to avoid any stationary or moving obstacles. Both, the VSC and the motion planning were validated by a nonlinear model of an Unmanned Tracked Robot (UTR) on different trajectories, and was compared with different control schemes. Simulation results show superiority of the proposed VSC over other methods with less control effort. Furthermore, the new motion planning controller proved its high capacity in producing a smooth and dynamic trajectory to allow an UGV to track a target and to avoid obstacles.","PeriodicalId":7268,"journal":{"name":"Advances in Electrical and Electronic Engineering","volume":" ","pages":""},"PeriodicalIF":0.6,"publicationDate":"2021-03-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"48493682","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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