Pub Date : 2024-10-17DOI: 10.1109/JESTIE.2024.3483549
Rajendra Kumar;Tim Stachl;Areej Fatima;Ze Li;Glenn Byczynski;Narayan C. Kar
Comprehensive implementation of magnetic nonlinearity with Fourier-based modeling poses critical challenges of convergence, rigging, and time and space complexities. The proposed model puts forward an alternate analytical method to consider the magnetic nonlinearities of all the motor segments. The formulation employed to develop the model attempts the implications of saturation and magnetic nonlinearities to incorporate them in the form of geometry modulation. The implementation does not correspond to any domain extension or magnetic vector-potential dependent term and, hence, does not endure the rank deficiency with infinitely permeable iron. The estimation accuracy of the model is demonstrated by evaluating the performance of a four-pole medium-scale laboratory prototype of a squirrel cage induction motor for a wide range of magnetic loading. Comparing the results obtained with the proposed method, finite element analysis, and measurements, it is observed that the proposed formulation enables the subdomain to achieve reasonable accuracy.
{"title":"Improved and Time-Efficient Harmonic Model of Induction Motor Considering Iron Nonlinearity","authors":"Rajendra Kumar;Tim Stachl;Areej Fatima;Ze Li;Glenn Byczynski;Narayan C. Kar","doi":"10.1109/JESTIE.2024.3483549","DOIUrl":"https://doi.org/10.1109/JESTIE.2024.3483549","url":null,"abstract":"Comprehensive implementation of magnetic nonlinearity with Fourier-based modeling poses critical challenges of convergence, rigging, and time and space complexities. The proposed model puts forward an alternate analytical method to consider the magnetic nonlinearities of all the motor segments. The formulation employed to develop the model attempts the implications of saturation and magnetic nonlinearities to incorporate them in the form of geometry modulation. The implementation does not correspond to any domain extension or magnetic vector-potential dependent term and, hence, does not endure the rank deficiency with infinitely permeable iron. The estimation accuracy of the model is demonstrated by evaluating the performance of a four-pole medium-scale laboratory prototype of a squirrel cage induction motor for a wide range of magnetic loading. Comparing the results obtained with the proposed method, finite element analysis, and measurements, it is observed that the proposed formulation enables the subdomain to achieve reasonable accuracy.","PeriodicalId":100620,"journal":{"name":"IEEE Journal of Emerging and Selected Topics in Industrial Electronics","volume":"6 1","pages":"146-156"},"PeriodicalIF":0.0,"publicationDate":"2024-10-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142905795","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-10-15DOI: 10.1109/JESTIE.2024.3481297
Hui Wang;Bolin Yan;Guo Xu;Mei Su
A highly cost-effective multiple-drive system is desirable in high-power applications that need multiple drives, especially in the field of ship propulsion and electric locomotives. In this article, a discontinuous pulsewidth modulation (DPWM) strategy with improved input currents for an active third-harmonic injection indirect matrix converter (3HI2MC) is presented. The proposed DPWM modulation strategy not only preserves the inherent advantages of the 3HI2MC, maintaining independent modulation and control of the rectifier and multiple inverters, but more importantly, the narrow pulsewidth problem existing in the conventional indirect matrix converter (IMC) is avoided and the input current ripple is reduced dramatically. The above features make the 3HI2MC with the proposed DPWM strategy competitive for the applications that require multiple drives and high-quality input currents. Besides, to obtain the third-harmonic injection current reference, an input current reconstruction method utilizing the output parameters of the inverters without extra current sensors is developed. After describing the topology structure, operating principles, modulation strategy, and control algorithm in details, the experimental results are presented to demonstrate the validity and effectiveness of the proposed modulation strategy.
{"title":"Modulation Strategy for 3HI2MC With Improved Input Currents for Multiple Drive Applications","authors":"Hui Wang;Bolin Yan;Guo Xu;Mei Su","doi":"10.1109/JESTIE.2024.3481297","DOIUrl":"https://doi.org/10.1109/JESTIE.2024.3481297","url":null,"abstract":"A highly cost-effective multiple-drive system is desirable in high-power applications that need multiple drives, especially in the field of ship propulsion and electric locomotives. In this article, a discontinuous pulsewidth modulation (DPWM) strategy with improved input currents for an active third-harmonic injection indirect matrix converter (3HI2MC) is presented. The proposed DPWM modulation strategy not only preserves the inherent advantages of the 3HI2MC, maintaining independent modulation and control of the rectifier and multiple inverters, but more importantly, the narrow pulsewidth problem existing in the conventional indirect matrix converter (IMC) is avoided and the input current ripple is reduced dramatically. The above features make the 3HI2MC with the proposed DPWM strategy competitive for the applications that require multiple drives and high-quality input currents. Besides, to obtain the third-harmonic injection current reference, an input current reconstruction method utilizing the output parameters of the inverters without extra current sensors is developed. After describing the topology structure, operating principles, modulation strategy, and control algorithm in details, the experimental results are presented to demonstrate the validity and effectiveness of the proposed modulation strategy.","PeriodicalId":100620,"journal":{"name":"IEEE Journal of Emerging and Selected Topics in Industrial Electronics","volume":"6 1","pages":"157-164"},"PeriodicalIF":0.0,"publicationDate":"2024-10-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142905799","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-10-15DOI: 10.1109/JESTIE.2024.3481270
Yiming Yang;Jin Xu;Keyou Wang;Pan Wu;Zirun Li;Guojie Li
The decoupling method based on the natural or inserted artificial delays, when applied to the simulation of power electronic (PE) systems, may encounter challenges such as inadequate length of delay lines or numerical instability and precision issues due to the high-frequency voltage/current variations at interfaces. To deal with the challenge, a delay-free decoupling method is proposed in this article. The method reduces both the dimension of matrix multiplication and the number of switch state combinations without sacrificing numerical stability and compresses the calculation progress by representing the decoupled system with the discrete state-space equation. The PE system is decoupled at the series/parallel interface of submodules, treating currents as boundary variables linked to each submodule's extended port. A preliminary formula for these variables is derived by simultaneously solving nodal voltage equations and kirchhoff voltage laws (KVL) equations. Submodule solutions are compacted and parallelized based on the discrete state-space equations. These equations are then substituted back and decomposing boundary variables into independent segments, to achieve parallelization of boundary variable solutions. The proposed method is validated through real-time simulation of cascaded PE systems on an field programmable gate array (FPGA) platform with a 250 ns time step. Results show that it achieves high precision compared to nondecoupled systems in power systems computer aided design (PSCAD) across diverse transient conditions. Additionally, it boosts the simulation scale by roughly 2–7 times on the FPGA-based platform compared to nondecoupled nodal analysis.
{"title":"A Delay-Free Decoupling Method for FPGA-Based Real-Time Simulation of Power Electronic Systems","authors":"Yiming Yang;Jin Xu;Keyou Wang;Pan Wu;Zirun Li;Guojie Li","doi":"10.1109/JESTIE.2024.3481270","DOIUrl":"https://doi.org/10.1109/JESTIE.2024.3481270","url":null,"abstract":"The decoupling method based on the natural or inserted artificial delays, when applied to the simulation of power electronic (PE) systems, may encounter challenges such as inadequate length of delay lines or numerical instability and precision issues due to the high-frequency voltage/current variations at interfaces. To deal with the challenge, a delay-free decoupling method is proposed in this article. The method reduces both the dimension of matrix multiplication and the number of switch state combinations without sacrificing numerical stability and compresses the calculation progress by representing the decoupled system with the discrete state-space equation. The PE system is decoupled at the series/parallel interface of submodules, treating currents as boundary variables linked to each submodule's extended port. A preliminary formula for these variables is derived by simultaneously solving nodal voltage equations and kirchhoff voltage laws (KVL) equations. Submodule solutions are compacted and parallelized based on the discrete state-space equations. These equations are then substituted back and decomposing boundary variables into independent segments, to achieve parallelization of boundary variable solutions. The proposed method is validated through real-time simulation of cascaded PE systems on an field programmable gate array (FPGA) platform with a 250 ns time step. Results show that it achieves high precision compared to nondecoupled systems in power systems computer aided design (PSCAD) across diverse transient conditions. Additionally, it boosts the simulation scale by roughly 2–7 times on the FPGA-based platform compared to nondecoupled nodal analysis.","PeriodicalId":100620,"journal":{"name":"IEEE Journal of Emerging and Selected Topics in Industrial Electronics","volume":"6 1","pages":"391-402"},"PeriodicalIF":0.0,"publicationDate":"2024-10-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142905905","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-10-14DOI: 10.1109/JESTIE.2024.3470421
{"title":"Officers and Vice Presidents of Co-Sponsoring Societies Information","authors":"","doi":"10.1109/JESTIE.2024.3470421","DOIUrl":"https://doi.org/10.1109/JESTIE.2024.3470421","url":null,"abstract":"","PeriodicalId":100620,"journal":{"name":"IEEE Journal of Emerging and Selected Topics in Industrial Electronics","volume":"5 4","pages":"C3-C3"},"PeriodicalIF":0.0,"publicationDate":"2024-10-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10716260","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142434581","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-10-14DOI: 10.1109/JESTIE.2024.3470423
{"title":"IEEE Industrial Electronics Society Information","authors":"","doi":"10.1109/JESTIE.2024.3470423","DOIUrl":"https://doi.org/10.1109/JESTIE.2024.3470423","url":null,"abstract":"","PeriodicalId":100620,"journal":{"name":"IEEE Journal of Emerging and Selected Topics in Industrial Electronics","volume":"5 4","pages":"C4-C4"},"PeriodicalIF":0.0,"publicationDate":"2024-10-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10716278","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142434580","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-10-14DOI: 10.1109/JESTIE.2024.3470419
{"title":"Journal of Emerging and Selected Topics in Industrial Electronics Publication Information","authors":"","doi":"10.1109/JESTIE.2024.3470419","DOIUrl":"https://doi.org/10.1109/JESTIE.2024.3470419","url":null,"abstract":"","PeriodicalId":100620,"journal":{"name":"IEEE Journal of Emerging and Selected Topics in Industrial Electronics","volume":"5 4","pages":"C2-C2"},"PeriodicalIF":0.0,"publicationDate":"2024-10-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10716277","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142438505","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-10-08DOI: 10.1109/JESTIE.2024.3476274
Amir Azam Rajabian;Sadegh Mohsenzade
Crosstalk poses a significant concern in power electronics converters that incorporate a phase-leg structure. The detrimental impact of crosstalk can result in device malfunction or failure. In this article, a model of the phase-leg structure emphasizing parasitic elements is introduced. Subsequently, the mathematical model of the circuit is deduced, followed by an investigation into the impact of low-side insulated gate bipolar transistor (IGBT) gate resistance and the sensitivity of low-side switch emitter inductance. We explored in this article that in the inductive load switching a negative spike also happens in the lower device gate terminal during the crosstalk prior to the positive spike. This negative spike can be harmful for the gate oxide insulator of the device. For optimal outcomes, a double-pulse test is set up. This test entails the application of two closely spaced voltage pulses to a device, allowing the assessment of its switching characteristics in inductive loads. Furthermore, while examining the impact of low-side device gate resistance on crosstalk, the influence of low-side switch parasitic emitter inductance becomes evident, and the optimal values for these parameters are determined. The model is generic and applicable to any IGBT or power mosfet , because crosstalk happens during turn- on process which the turn- on model of both devices is similar, with the specific case study in this article being the IXGH60N60C2 and IRFP460.
{"title":"Interrelation of Gate Resistance and Emitter/Source Inductance Impact on Inductive Load Phase-Leg Crosstalk","authors":"Amir Azam Rajabian;Sadegh Mohsenzade","doi":"10.1109/JESTIE.2024.3476274","DOIUrl":"https://doi.org/10.1109/JESTIE.2024.3476274","url":null,"abstract":"Crosstalk poses a significant concern in power electronics converters that incorporate a phase-leg structure. The detrimental impact of crosstalk can result in device malfunction or failure. In this article, a model of the phase-leg structure emphasizing parasitic elements is introduced. Subsequently, the mathematical model of the circuit is deduced, followed by an investigation into the impact of low-side insulated gate bipolar transistor (IGBT) gate resistance and the sensitivity of low-side switch emitter inductance. We explored in this article that in the inductive load switching a negative spike also happens in the lower device gate terminal during the crosstalk prior to the positive spike. This negative spike can be harmful for the gate oxide insulator of the device. For optimal outcomes, a double-pulse test is set up. This test entails the application of two closely spaced voltage pulses to a device, allowing the assessment of its switching characteristics in inductive loads. Furthermore, while examining the impact of low-side device gate resistance on crosstalk, the influence of low-side switch parasitic emitter inductance becomes evident, and the optimal values for these parameters are determined. The model is generic and applicable to any IGBT or power \u0000<sc>mosfet</small>\u0000, because crosstalk happens during turn-\u0000<sc>on</small>\u0000 process which the turn-\u0000<sc>on</small>\u0000 model of both devices is similar, with the specific case study in this article being the IXGH60N60C2 and IRFP460.","PeriodicalId":100620,"journal":{"name":"IEEE Journal of Emerging and Selected Topics in Industrial Electronics","volume":"6 1","pages":"415-424"},"PeriodicalIF":0.0,"publicationDate":"2024-10-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142905948","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
The application of wireless power transfer (WPT) for consumer electronics, electric vehicles, and drones has garnered growing attention, with one of the key challenges being the ability to tolerate coil misalignment. This article proposes a WPT system with the LCC-S compensation and a novel O-to-OXY magnetic coupler to maintain high output power and transfer efficiency, aiming to tolerate coil misalignments in both lateral and longitudinal directions. The O and XY coils, representing planar and crossed-dipole coils, are coaxially stacked and naturally decoupled by sharing a common ferrite core to form a compact OXY receiver. Accordingly, a 500 W experimental prototype is developed to verify the effectiveness of the proposed system under different loads. The measured transfer efficiency of the proposed magnetic coupler can reach up to 64.86% at the misaligned distance of 150 mm, marking a 17.34% improvement of average efficiency than the traditional O-to-O magnetic coupler across the entire misalignment range. Additionally, the transfer power can be maximally increased by up to 200 W. Finally, both theoretical analyses and experimental results confirm the feasibility and stability of the proposed WPT system.
{"title":"2-D Misalignment-Tolerant Wireless Power Transfer With a Compact O-to-OXY Magnetic Coupler","authors":"Xuxing Duan;Wei Han;Youhao Hu;Hanlei Tian;Jinliang Huang","doi":"10.1109/JESTIE.2024.3467064","DOIUrl":"https://doi.org/10.1109/JESTIE.2024.3467064","url":null,"abstract":"The application of wireless power transfer (WPT) for consumer electronics, electric vehicles, and drones has garnered growing attention, with one of the key challenges being the ability to tolerate coil misalignment. This article proposes a WPT system with the LCC-S compensation and a novel O-to-OXY magnetic coupler to maintain high output power and transfer efficiency, aiming to tolerate coil misalignments in both lateral and longitudinal directions. The O and XY coils, representing planar and crossed-dipole coils, are coaxially stacked and naturally decoupled by sharing a common ferrite core to form a compact OXY receiver. Accordingly, a 500 W experimental prototype is developed to verify the effectiveness of the proposed system under different loads. The measured transfer efficiency of the proposed magnetic coupler can reach up to 64.86% at the misaligned distance of 150 mm, marking a 17.34% improvement of average efficiency than the traditional O-to-O magnetic coupler across the entire misalignment range. Additionally, the transfer power can be maximally increased by up to 200 W. Finally, both theoretical analyses and experimental results confirm the feasibility and stability of the proposed WPT system.","PeriodicalId":100620,"journal":{"name":"IEEE Journal of Emerging and Selected Topics in Industrial Electronics","volume":"6 1","pages":"9-18"},"PeriodicalIF":0.0,"publicationDate":"2024-10-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142905749","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-09-30DOI: 10.1109/JESTIE.2024.3471339
G K Naveen Kumar;Arun Kumar Verma;Sandeep N
This article proposes a single-phase bridgeless single-ended primary inductance-based power factor correction (PFC) converter that can function as a front-end converter for on-board low-voltage electric vehicle charging applications. The ability to inherently achieve the PFC in discontinuous inductor current mode is utilized in the proposed converter, thereby, the need for input voltage/current sensing is completely eliminated. Further, the structure of the proposed converter reduces the gate driver complexity owing to the common ground shared by all of the active switches which further adds to the cost effectiveness. The experimental results from a 1 kW prototype are presented to validate feasibility under steady state and dynamic conditions for wide output and input voltage ranges.
{"title":"Bridgeless SEPIC PFC Converter for Low-Voltage EV Applications With Reduced Sensor Count","authors":"G K Naveen Kumar;Arun Kumar Verma;Sandeep N","doi":"10.1109/JESTIE.2024.3471339","DOIUrl":"https://doi.org/10.1109/JESTIE.2024.3471339","url":null,"abstract":"This article proposes a single-phase bridgeless single-ended primary inductance-based power factor correction (PFC) converter that can function as a front-end converter for on-board low-voltage electric vehicle charging applications. The ability to inherently achieve the PFC in discontinuous inductor current mode is utilized in the proposed converter, thereby, the need for input voltage/current sensing is completely eliminated. Further, the structure of the proposed converter reduces the gate driver complexity owing to the common ground shared by all of the active switches which further adds to the cost effectiveness. The experimental results from a 1 kW prototype are presented to validate feasibility under steady state and dynamic conditions for wide output and input voltage ranges.","PeriodicalId":100620,"journal":{"name":"IEEE Journal of Emerging and Selected Topics in Industrial Electronics","volume":"6 1","pages":"3-8"},"PeriodicalIF":0.0,"publicationDate":"2024-09-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142905752","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-09-26DOI: 10.1109/JESTIE.2024.3469569
Sakshi Chalia;Aakash Kumar Seth;Mukhtiar Singh
This article introduces the design of a bidirectional two-stage, on-board electric vehicle (EV) charger controller. As with the growing trend of EVs, their widespread use may compromise grid quality, leading to the demand for a stable, simple, and better control system. However, some controllers provide sluggish responses and fail to compensate for harmonics. Therefore, to mitigate the grid current harmonics, a repetitive controller (RC) has been analyzed. Within a specified integer period, for any periodic signal, the RC may accomplish tracking of zero steady-state error. However, if grid frequency varies under the permissible range the performance of conventional RC degrades. Therefore, a Lagrange interpolating polynomial-based fractional-order RC has been implemented with a fixed sampling rate to enhance its performance during frequency fluctuations. PLL estimates the frequency, which is fed back to update the controller's resonant frequency. Then, using Lagrange interpolating the polynomial the fractional delay is approximated. The proposed controller has been designed within a MATLAB environment. Its performance has also been probed in a real-time experimental setup with OPAL-RT (4510).
{"title":"Frequency Adaptive Discrete Repetitive Controller Design for Electric Vehicle Charger","authors":"Sakshi Chalia;Aakash Kumar Seth;Mukhtiar Singh","doi":"10.1109/JESTIE.2024.3469569","DOIUrl":"https://doi.org/10.1109/JESTIE.2024.3469569","url":null,"abstract":"This article introduces the design of a bidirectional two-stage, on-board electric vehicle (EV) charger controller. As with the growing trend of EVs, their widespread use may compromise grid quality, leading to the demand for a stable, simple, and better control system. However, some controllers provide sluggish responses and fail to compensate for harmonics. Therefore, to mitigate the grid current harmonics, a repetitive controller (RC) has been analyzed. Within a specified integer period, for any periodic signal, the RC may accomplish tracking of zero steady-state error. However, if grid frequency varies under the permissible range the performance of conventional RC degrades. Therefore, a Lagrange interpolating polynomial-based fractional-order RC has been implemented with a fixed sampling rate to enhance its performance during frequency fluctuations. PLL estimates the frequency, which is fed back to update the controller's resonant frequency. Then, using Lagrange interpolating the polynomial the fractional delay is approximated. The proposed controller has been designed within a MATLAB environment. Its performance has also been probed in a real-time experimental setup with OPAL-RT (4510).","PeriodicalId":100620,"journal":{"name":"IEEE Journal of Emerging and Selected Topics in Industrial Electronics","volume":"6 1","pages":"72-81"},"PeriodicalIF":0.0,"publicationDate":"2024-09-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142905775","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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