Pub Date : 2024-09-16DOI: 10.1109/JESTIE.2024.3462848
Milad Babalou;Hossein Torkaman;Edris Pouresmaeil
The on-board chargers (OBCs) are commonly utilized in electric vehicles (EVs) due to their cost-effectiveness and ease of installation. The performance of EVs to supply power back to the grid has sparked interest in bidirectional power flow solutions. Dual-active-bridge (DAB) dc–dc converters have gained prominence as a promising power interface between energy storage components and the power bus. However, failures in the active devices of DAB converters can result in converter disconnection. In this article, a fault-tolerant DAB (FT-DAB) converter is proposed to improve the reliability of the OBC. In order to ensure uninterrupted operation in short-circuit and open-circuit faults of the semiconductors, the topology of the single-phase DAB is modified in such a way that the single transformer is replaced with dual-transformers in addition to employing an H5 structure for each bridge. The proposed FT-DAB converter is investigated in various faulty conditions, in which, the post-fault performance and the maximum level of the output power are discussed in detail. Finally, the FT-DAB is prototyped and tested under various post-fault scenarios. Experimental test results validate the reliable and uninterrupted operation of the FT-DAB.
{"title":"Fault-Tolerant Topology of Dual Active Bridge Converter for On-Board Charger in Electric Vehicles","authors":"Milad Babalou;Hossein Torkaman;Edris Pouresmaeil","doi":"10.1109/JESTIE.2024.3462848","DOIUrl":"https://doi.org/10.1109/JESTIE.2024.3462848","url":null,"abstract":"The on-board chargers (OBCs) are commonly utilized in electric vehicles (EVs) due to their cost-effectiveness and ease of installation. The performance of EVs to supply power back to the grid has sparked interest in bidirectional power flow solutions. Dual-active-bridge (DAB) dc–dc converters have gained prominence as a promising power interface between energy storage components and the power bus. However, failures in the active devices of DAB converters can result in converter disconnection. In this article, a fault-tolerant DAB (FT-DAB) converter is proposed to improve the reliability of the OBC. In order to ensure uninterrupted operation in short-circuit and open-circuit faults of the semiconductors, the topology of the single-phase DAB is modified in such a way that the single transformer is replaced with dual-transformers in addition to employing an H5 structure for each bridge. The proposed FT-DAB converter is investigated in various faulty conditions, in which, the post-fault performance and the maximum level of the output power are discussed in detail. Finally, the FT-DAB is prototyped and tested under various post-fault scenarios. Experimental test results validate the reliable and uninterrupted operation of the FT-DAB.","PeriodicalId":100620,"journal":{"name":"IEEE Journal of Emerging and Selected Topics in Industrial Electronics","volume":"6 1","pages":"106-114"},"PeriodicalIF":0.0,"publicationDate":"2024-09-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142905922","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
The series stacked active power decoupling (SS-APD) circuit is a power dense and efficient alternative for ripple energy storage in single phase power converter. The SS-APD circuit needs to absorb a small amount of real power to meet power losses in it. For this, the literature uses additional power supply or modifies the controller for SS-APD circuit. Such modified controllers require high bandwidth current sensing or noise-prone differentiation function. To address these challenges, this article proposes a conductance emulation control for SS-APD circuit. Here, the value of emulated conductance dictates the real power absorbed by the SS-APD circuit. It eliminates the need for differentiation function, dc-link current sensing and additional power supply for absorbing real power. Further, it uses feedback of dc-link voltage and enables independent control of SS-APD circuit from the single-phase converter. The proposed technique is investigated using state-plane analysis and small signal impedance analysis to highlight the design dependencies. In addition, the practical challenges such as proper sensing of ripple in dc-link voltage are also addressed. The load transient and steady-state performance of the proposed technique are validated by experimental studies with a 2 kW laboratory prototype.
{"title":"Conductance Emulation Control for Real Power Compensation in Series-Stacked Active Power Decoupling Circuit","authors":"Nachiketa Deshmukh;Arnab Sarkar;Sandeep Anand;Soumya Ranjan Sahoo","doi":"10.1109/JESTIE.2024.3456331","DOIUrl":"https://doi.org/10.1109/JESTIE.2024.3456331","url":null,"abstract":"The series stacked active power decoupling (SS-APD) circuit is a power dense and efficient alternative for ripple energy storage in single phase power converter. The SS-APD circuit needs to absorb a small amount of real power to meet power losses in it. For this, the literature uses additional power supply or modifies the controller for SS-APD circuit. Such modified controllers require high bandwidth current sensing or noise-prone differentiation function. To address these challenges, this article proposes a conductance emulation control for SS-APD circuit. Here, the value of emulated conductance dictates the real power absorbed by the SS-APD circuit. It eliminates the need for differentiation function, dc-link current sensing and additional power supply for absorbing real power. Further, it uses feedback of dc-link voltage and enables independent control of SS-APD circuit from the single-phase converter. The proposed technique is investigated using state-plane analysis and small signal impedance analysis to highlight the design dependencies. In addition, the practical challenges such as proper sensing of ripple in dc-link voltage are also addressed. The load transient and steady-state performance of the proposed technique are validated by experimental studies with a 2 kW laboratory prototype.","PeriodicalId":100620,"journal":{"name":"IEEE Journal of Emerging and Selected Topics in Industrial Electronics","volume":"6 1","pages":"350-361"},"PeriodicalIF":0.0,"publicationDate":"2024-09-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142905869","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-09-03DOI: 10.1109/JESTIE.2024.3454219
Snehamoy Patra;Amit Kumar Singha
Traditional digital implementation of average current-mode control (CMC) digitizes current loop and voltage loop. Accuracy of average current tracking depends on the sampled value of the inductor current. Existing uniformly sampled digital average CMC techniques use leading-edge modulation or dual-edge modulation and they are not easily configurable to control the peak inductor current. Moreover, existing peak CMC under leading-edge modulation is prone to noise. This article proposes a simple and robust sampling mechanism that can be configured to implement digital average CMC or peak CMC under trailing-edge modulation without changing the fundamental structure of the controller. Furthermore, the proposed peak CMC is insensitive to noise and stable even with a duty greater than 0.5. Approximate discrete-time modeling approach is considered to model the proposed mechanism. Impacts of system's parasitics on the sampling mechanism are analyzed and they are found to be insignificant. The proposed average and peak current control schemes are validated with MATLAB simulations and experimental results. The proposed sampling mechanism can be easily extended for other digital current-mode controlled converters.
{"title":"A Unified Sampling Mechanism to Control Average and Peak Current in a Buck Converter Under Trailing-Edge Modulation","authors":"Snehamoy Patra;Amit Kumar Singha","doi":"10.1109/JESTIE.2024.3454219","DOIUrl":"https://doi.org/10.1109/JESTIE.2024.3454219","url":null,"abstract":"Traditional digital implementation of average current-mode control (CMC) digitizes current loop and voltage loop. Accuracy of average current tracking depends on the sampled value of the inductor current. Existing uniformly sampled digital average CMC techniques use leading-edge modulation or dual-edge modulation and they are not easily configurable to control the peak inductor current. Moreover, existing peak CMC under leading-edge modulation is prone to noise. This article proposes a simple and robust sampling mechanism that can be configured to implement digital average CMC or peak CMC under trailing-edge modulation without changing the fundamental structure of the controller. Furthermore, the proposed peak CMC is insensitive to noise and stable even with a duty greater than 0.5. Approximate discrete-time modeling approach is considered to model the proposed mechanism. Impacts of system's parasitics on the sampling mechanism are analyzed and they are found to be insignificant. The proposed average and peak current control schemes are validated with MATLAB simulations and experimental results. The proposed sampling mechanism can be easily extended for other digital current-mode controlled converters.","PeriodicalId":100620,"journal":{"name":"IEEE Journal of Emerging and Selected Topics in Industrial Electronics","volume":"6 1","pages":"403-414"},"PeriodicalIF":0.0,"publicationDate":"2024-09-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142905773","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
The increasing prevalence of grid-following (GFL) converters in modern power systems raises concerns about transient stability, mainly stemming from loss of synchronization (LOS). In certain scenarios, grid-forming (GFM) converters are utilized to improve system stability. Existing literature focuses on the transient stability analysis of individual converter types, with limited attention given to hybrid systems incorporating both GFL and GFM converters. Particularly, the interactions between these converter types, concerning transient stability, are seldom discussed, and stability enhancement in such systems remains unexplored. To address this gap, this article aims to investigate the interaction mechanism of paralleled GFL and GFM converters and propose a control strategy to mitigate the risk of LOS in hybrid systems. The article presents detailed aggregated models, theoretical analysis, and the control design of the proposed scheme. Theoretical analyses and the proposed method are validated through simulation and experimental results.
{"title":"Transient Stability Analysis and Enhancement of Grid-Forming and Grid-Following Converters","authors":"Chenhang Xu;Zhixiang Zou;Jiajun Yang;Zheng Wang;Wu Chen;Giampaolo Buticchi","doi":"10.1109/JESTIE.2024.3452001","DOIUrl":"https://doi.org/10.1109/JESTIE.2024.3452001","url":null,"abstract":"The increasing prevalence of grid-following (GFL) converters in modern power systems raises concerns about transient stability, mainly stemming from loss of synchronization (LOS). In certain scenarios, grid-forming (GFM) converters are utilized to improve system stability. Existing literature focuses on the transient stability analysis of individual converter types, with limited attention given to hybrid systems incorporating both GFL and GFM converters. Particularly, the interactions between these converter types, concerning transient stability, are seldom discussed, and stability enhancement in such systems remains unexplored. To address this gap, this article aims to investigate the interaction mechanism of paralleled GFL and GFM converters and propose a control strategy to mitigate the risk of LOS in hybrid systems. The article presents detailed aggregated models, theoretical analysis, and the control design of the proposed scheme. Theoretical analyses and the proposed method are validated through simulation and experimental results.","PeriodicalId":100620,"journal":{"name":"IEEE Journal of Emerging and Selected Topics in Industrial Electronics","volume":"5 4","pages":"1396-1408"},"PeriodicalIF":0.0,"publicationDate":"2024-08-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142438640","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
In a distributed direct current (dc) microgrid system, the networked communication architecture enhances the accessibility of data but introduces the risk of cyberattacks. Accurate and comprehensive attack detection and mitigation techniques are essential to ensure its reliable operation, effective control, and exposure to hidden dangers and security implications. This article proposes a two-fold deep neural network (TFDNN)-based control architecture for detecting and mitigating the false data injection attack (FDIA) at the sensor level for a distributed dc microgrid system. TFDNN is a combination of two neural networks. The first neutral network predicts the converter's duty, and the second neural network detects the FDIA by producing the error value. The combination of two network outputs is the desired duty after eliminating the effect of an FDIA. Neural networks are trained with a wide range of data, including attack scenarios and system disturbances, to perform effectively for various FDIA and in-adverse conditions. Later the designed dc microgrid control is deployed into the microcontroller for standalone operation. The proposed scheme is implemented in real-time hardware, and the results are explored.
{"title":"Standalone Deployment of Two-Fold Deep Neural Network in Distributed DC Microgrid—FDIA Detection and Mitigation Scheme","authors":"Koduru Sriranga Suprabhath;Machina Venkata Siva Prasad;Sreedhar Madichetty;Sukumar Mishra","doi":"10.1109/JESTIE.2024.3451720","DOIUrl":"https://doi.org/10.1109/JESTIE.2024.3451720","url":null,"abstract":"In a distributed direct current (dc) microgrid system, the networked communication architecture enhances the accessibility of data but introduces the risk of cyberattacks. Accurate and comprehensive attack detection and mitigation techniques are essential to ensure its reliable operation, effective control, and exposure to hidden dangers and security implications. This article proposes a two-fold deep neural network (TFDNN)-based control architecture for detecting and mitigating the false data injection attack (FDIA) at the sensor level for a distributed dc microgrid system. TFDNN is a combination of two neural networks. The first neutral network predicts the converter's duty, and the second neural network detects the FDIA by producing the error value. The combination of two network outputs is the desired duty after eliminating the effect of an FDIA. Neural networks are trained with a wide range of data, including attack scenarios and system disturbances, to perform effectively for various FDIA and in-adverse conditions. Later the designed dc microgrid control is deployed into the microcontroller for standalone operation. The proposed scheme is implemented in real-time hardware, and the results are explored.","PeriodicalId":100620,"journal":{"name":"IEEE Journal of Emerging and Selected Topics in Industrial Electronics","volume":"6 1","pages":"204-214"},"PeriodicalIF":0.0,"publicationDate":"2024-08-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142905872","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}