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Design and Analysis of a Power-Efficient Dynamic Comparator with an Improved Transconductance in Ultra-low Power SAR ADC Applications 在超低功耗 SAR ADC 应用中设计和分析具有改进电感的高能效动态比较器
IF 2.3 3区 工程技术 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2024-08-13 DOI: 10.1007/s00034-024-02818-8
Zahra Mehrabi Moghadam, Mohammad Reza Salehi, Salman Roudgar Nashta, Ebrahim Abiri

This paper presents an ultra-low power comparator with minimum delay and low offset, used in successive approximation register analog-to-digital converters (SAR ADCs) for biomedical system-on-chips (SoCs). To reduce the power consumption, the proposed comparator is designed with a minimum supply voltage in the sub-threshold region. Additionally, intermediate switches are utilized in the design to serve two purposes: 1) breaking the connection between the latch and preamplifier parts during the pre-charge phase to reduce power consumption, 2) reducing the parasitic resistance of the discharge path during the evaluation phase to enhance effective transconductance of the latch (({g}_{meff,latch})). Furthermore, the proposed design incorporates, two transistors as auxiliary paths to increase the speed of discharging in the latching process. Overall, the proposed design aims to achieve a low power and high-performance comparator simulated at a frequency of 50 kHz using TSMC 65nm CMOS technology. The post-layout simulation results show that the proposed structure enjoyed from an ultra-low power consumption of 141.4 pW as well as excellent delay and offset with 357 ns and 3.32 mV values, respectively. The occupied area of the designed layout for the proposed comparator is 106.8 μm2 allowed us to embed it in multi-channel recording system on chips (SoCs). The Figure of Merit (FoM) of the proposed comparator is 0.000463 fVW/Hz. Moreover, the proposed comparator has been validated by using it in successive approximation conversion algorithm with a sampling frequency of 1 kS/s.

本文提出了一种具有最小延迟和低偏移的超低功耗比较器,用于生物医学片上系统 (SoC) 的逐次逼近寄存器模数转换器 (SAR ADC)。为了降低功耗,所提出的比较器在设计时采用了亚阈值区的最低电源电压。此外,设计中还使用了中间开关,以实现两个目的:1)在预充电阶段断开锁存器和前置放大器部件之间的连接,以降低功耗;2)在评估阶段降低放电路径的寄生电阻,以提高锁存器的有效跨导({g}_{meff,latch})。此外,该设计还采用了两个晶体管作为辅助路径,以提高闩锁过程中的放电速度。总之,所提出的设计旨在利用台积电 65nm CMOS 技术实现低功耗、高性能的比较器,模拟频率为 50 kHz。布局后仿真结果表明,所提出的结构具有 141.4 pW 的超低功耗,以及分别为 357 ns 和 3.32 mV 的出色延迟和偏移值。拟议比较器的设计布局占用面积为 106.8 μm2,这使我们能够将其嵌入多通道记录系统芯片(SoC)中。拟议比较器的优越性图(FoM)为 0.000463 fVW/Hz。此外,通过在采样频率为 1 kS/s 的逐次逼近转换算法中使用该比较器,验证了所提出的比较器。
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引用次数: 0
Exploring Discrete Haar Wavelet and Cosine Transforms for Accuracy-and Energy-Quality VLSI Watermarking Systems Design 探索用于精度和能量质量 VLSI 水印系统设计的离散哈小波和余弦变换
IF 2.3 3区 工程技术 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2024-08-13 DOI: 10.1007/s00034-024-02802-2
Morgana M. A. da Rosa, Eduardo A. C. da Costa, Rafael Soares, Sergio Bampi

Digital watermarking conceals data within host images to safeguard against unauthorized distribution of multimedia content. It offers content protection and anti-piracy measures, maintaining content quality by embedding invisible information. This process involves inserting and extracting watermarks. We introduce a robust algorithm, combining discrete Haar wavelet transform (DHWT) and discrete cosine transform (DCT), yielding effective watermarking with high resistance to extraction without data loss. This combination of transforms represents a hybrid approach that we call HyDHWCT in this work. Evaluations reveal our approach’s superior accuracy compared to state-of-the-art methods. Our hardware watermarking solution excels in robustness and energy efficiency, even under diverse attack scenarios. FPGA and ASIC assessments show our HyDHWCT’s exceptional area and power performance, with the algorithm achieving a lossless watermark extraction (NC = 1), outperforming prior methods in accuracy-quality, and energy-, and area-savings (approximately (2.621times ) and (1.174times ), respectively). Accuracy-quality results confirm a perfect extraction rate (NC = 1), ensuring 100% accuracy in watermark extraction.

数字水印将数据隐藏在主机图像中,以防止多媒体内容在未经授权的情况下传播。它提供内容保护和反盗版措施,通过嵌入隐形信息来保持内容质量。这一过程包括插入和提取水印。我们介绍了一种结合离散哈小波变换(DHWT)和离散余弦变换(DCT)的鲁棒性算法,可在不丢失数据的情况下有效地提取水印。这种变换组合是一种混合方法,我们在本文中称之为 HyDHWCT。评估显示,与最先进的方法相比,我们的方法具有更高的准确性。我们的硬件水印解决方案在鲁棒性和能效方面表现出色,即使在各种攻击情况下也是如此。FPGA和ASIC评估表明,我们的HyDHWCT具有卓越的面积和功耗性能,该算法实现了无损水印提取(NC = 1),在精度-质量、能耗-和面积-节省(分别约为(2.621times )和(1.174times ))方面优于先前的方法。准确性-质量结果证实了完美的提取率(NC = 1),确保了水印提取的 100%准确性。
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引用次数: 0
Human Violence Detection in Videos Using Key Frame Identification and 3D CNN with Convolutional Block Attention Module 利用关键帧识别和带有卷积块注意力模块的 3D CNN 检测视频中的人类暴力行为
IF 2.3 3区 工程技术 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2024-08-13 DOI: 10.1007/s00034-024-02824-w
Venkatesh Akula, Ilaiah Kavati

In recent years, there has been an increase in demand for intelligent automatic surveillance systems to detect abnormal activities at various places, such as schools, hospitals, prisons, psychiatric centers, and public gatherings. The availability of video surveillance cameras in such places enables techniques for automatically identifying violent actions and alerting the authorities to minimize loss. Deep learning-based models, such as Convolutional Neural Networks (CNNs), have shown better performance in detecting violent activities by utilizing the spatiotemporal features of video frames. In this work, we propose a violence detection model based on 3D CNN, which employs a DenseNet architecture for enhanced spatiotemporal feature capture. First, the video’s redundant frames are discarded by identifying the key frames in the video. We exploit the Multi-Scale Structural Similarity Index Measure (MS-SSIM) technique to identify the key frames of the video, which contain significant information about the video. Key frame identification helps to reduce the complexity of the model. Next, the identified video key frames with the lowest MS-SSIM are forwarded to 3D CNN to extract spatiotemporal features. Furthermore, we exploit the Convolutional Block Attention Module (CBAM) to increase the representational capabilities of the 3D CNN. The results on different benchmark datasets show that the proposed violence detection method performs better than most of the existing methods. The source code for the proposed method is publicly available at https://github.com/venkateshakula19/violence-detection-using-keyframe-extraction-and-CNN-with-attention-CBAM

近年来,在学校、医院、监狱、精神病治疗中心和公共集会等各种场所检测异常活动的智能自动监控系统的需求不断增加。在这些场所安装视频监控摄像头,可实现自动识别暴力行为并向当局发出警报的技术,从而将损失降到最低。基于深度学习的模型,如卷积神经网络(CNN),通过利用视频帧的时空特征,在检测暴力活动方面表现出了更好的性能。在这项工作中,我们提出了一种基于 3D CNN 的暴力检测模型,该模型采用 DenseNet 架构来增强时空特征捕捉。首先,通过识别视频中的关键帧,剔除视频中的冗余帧。我们利用多尺度结构相似性指数测量(MS-SSIM)技术来识别视频中包含重要视频信息的关键帧。关键帧识别有助于降低模型的复杂性。接下来,MS-SSIM 值最低的已识别视频关键帧将被转发到 3D CNN,以提取时空特征。此外,我们还利用卷积块注意力模块(CBAM)来提高 3D CNN 的表征能力。在不同基准数据集上的结果表明,所提出的暴力检测方法的性能优于大多数现有方法。建议方法的源代码可在 https://github.com/venkateshakula19/violence-detection-using-keyframe-extraction-and-CNN-with-attention-CBAM 上公开获取。
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引用次数: 0
A design approach of fractional model error compensator for fractional dynamical systems with polytopic uncertainty and disturbance 具有多态不确定性和扰动的分数动力系统的分数模型误差补偿器设计方法
IF 2.3 3区 工程技术 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2024-08-13 DOI: 10.1007/s00034-024-02813-z
Ahmed Haddi, Mohamed El Azzouzi, Mohamed Laabissi

We present a novel design methodology for a fractional model error compensator (FMEC) that addresses the challenge of model errors in fractional dynamical systems with polytopic uncertainty and disturbances. The FMEC can effectively compensate for model errors, thereby enhancing the performance of control systems. This approach leverages a combination of (mathcal{H}_infty )-norm criteria and the Particle Swarm Optimization (PSO) algorithm to optimize the compensator design. The methodology integrates (mathcal{H}_infty )-norm criteria for robust performance evaluation and PSO for optimization. The proposed FMEC design is validated through numerical simulations conducted on a fractional dynamical system. These simulations demonstrate that the design successfully compensates for model errors and improves the overall performance of the control system. This study offers a practical solution for designing robust FMECs applicable in various engineering fields, particularly for systems susceptible to polytopic uncertainty and disturbances.

我们提出了一种新颖的分数模型误差补偿器(FMEC)设计方法,以解决具有多态不确定性和干扰的分数动力系统中的模型误差难题。FMEC 可以有效补偿模型误差,从而提高控制系统的性能。该方法结合了 (mathcal{H}_infty )-norm准则和粒子群优化(PSO)算法来优化补偿器设计。该方法整合了用于鲁棒性能评估的 (mathcal{H}_infty)-norm 准则和用于优化的 PSO。通过对分数动态系统进行数值模拟,验证了所提出的 FMEC 设计。这些仿真表明,该设计成功地补偿了模型误差,提高了控制系统的整体性能。这项研究为设计适用于各种工程领域的鲁棒 FMEC 提供了一个实用的解决方案,尤其适用于易受多态不确定性和干扰影响的系统。
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引用次数: 0
2D Second-Order Time–Frequency Synchrosqueezing Transform: For Non-stationary Signals Well-Localized Components Extraction and Separation 二维二阶时频同步变换:针对非稳态信号的良好定位成分提取与分离
IF 2.3 3区 工程技术 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2024-08-13 DOI: 10.1007/s00034-024-02823-x
Yumeng Chen, Juan Li

The time–frequency analysis (TFA) method is an effective tool to separate and extract main components for non-stationary signals such as vibration signals and seismic signals, which are time-varying and affected by high noise. However, suffering from the Heisenberg uncertainty principle and cross terms of time–frequency result, conventional TFA methods usually produce vague time–frequency representations (TFRs). As a branch of the TFA method, current redistributive compressive transforms enable to generate clear TFR. However, these techniques are limited to a singular type of signal, which is not applicable to deal with complicated signals in production. In order to enhance the applicability and the time–frequency (TF) aggregation capability, this paper proposes a promoted TFA method 2D-FTSST2 based on the synchrosqueezing transform combining two-dimensional information of time and frequency domains. For an accurate IF estimate, we also define a time redistribution operator, which can describe strong time and frequency-varying signals. This algorithm not only provides a high-resolution decomposition of multicomponent signals but also enables to extract main features in noisy environments. Experiments on simulated signals and real data confirm the validity and effectiveness of the proposed algorithm.

时频分析(TFA)方法是分离和提取非稳态信号(如振动信号和地震信号)主要成分的有效工具,这些信号具有时变性并受高噪声影响。然而,受海森堡不确定性原理和时频交叉结果的影响,传统的 TFA 方法通常会产生模糊的时频表示(TFR)。作为 TFA 方法的一个分支,目前的重分布压缩变换可以生成清晰的时频表示。然而,这些技术仅限于单一类型的信号,不适用于处理生产中的复杂信号。为了提高适用性和时频(TF)聚合能力,本文提出了一种基于同步萃取变换、结合时域和频域二维信息的改进型 TFA 方法 2D-FTSST2。为了准确估计中频,我们还定义了一个时间重分布算子,它可以描述强时变和频变信号。这种算法不仅能对多分量信号进行高分辨率分解,还能在噪声环境中提取主要特征。对模拟信号和真实数据的实验证实了所提算法的有效性和有效性。
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引用次数: 0
Order Reduction of z-Domain Interval Systems by Advanced Routh Approximation Method 用先进的 Routh 近似法减少 z 域区间系统的阶次
IF 2.3 3区 工程技术 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2024-08-07 DOI: 10.1007/s00034-024-02799-8
Praveen Kumar, Pankaj Rai, Amit Kumar Choudhary

Since decades mathematicians have been designing the transfer function for the available physical models followed by the involvement of control engineers to work on it. Through the study of the offered representations, many systems were found to be of higher order which are nevertheless not easy to study and analyze in their core form. Furthermore, again uncertainties within the system was found that cannot be ignored. All these increases the complexities for analysis of the physical systems. This demands a technique for order reduction to derive an approximate lower order representation of the higher order systems. In continuation, this paper is an attempt to propose a computationally efficient approach for obtaining the reduced interval model based on Routh Approximation technique. The proposed approach is a novel method for discrete-time interval system and is discussed in detail in the article content ahead. The provided examples offer the desired explanation for the effectiveness of the proposed algorithm.

几十年来,数学家们一直在为现有的物理模型设计传递函数,随后控制工程师也参与其中。通过对所提供的表示方法进行研究,发现许多系统都是高阶系统,但要研究和分析其核心形式并不容易。此外,还发现系统内部存在一些不容忽视的不确定性。所有这些都增加了物理系统分析的复杂性。这就需要一种阶次缩减技术来推导出高阶系统的近似低阶表示。因此,本文试图提出一种基于 Routh 近似技术的高效计算方法,以获得简化的区间模型。所提出的方法是离散时间区间系统的一种新方法,将在文章内容中详细讨论。所提供的示例为所提算法的有效性提供了所需的解释。
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引用次数: 0
Input–Output Scheduling and Control for Efficient FPGA Realization of Digit-Serial Multiplication Over Generic Binary Extension Fields 在通用二进制扩展字段上高效实现数串乘法的 FPGA 输入输出调度与控制
IF 2.3 3区 工程技术 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2024-08-07 DOI: 10.1007/s00034-024-02793-0
Dibakar Pradhan, Pramod Kumar Meher, Bimal Kumar Meher

In this paper, we propose an energy-efficient design of architecture for digit-serial multiplication over generic GF((2^m)), which could be used for different fields as and when required and to enhance the security by changing the fields. An efficient input scheduling scheme is proposed to reduce the required number of input pins and a digit extraction circuit for digit-serial multiplication. Besides, to reduce the dynamic power consumption, we have proposed a simple technique using an array of m AND gates that minimizes the output bit-switching. To study the impact of digit size, the digit-serial multipliers for (m=163) and 233 are synthesised by Xilinx Vivado for FPGA implementation. It is found that the required number of slices, power consumption, and energy per multiplication increase while the computational delay falls with the increase in digit size. Therefore, larger digit sizes could be considered only when fast multiplication is necessary. The array of AND gates for output bit control helps in reducing the dynamic power consumption and energy per multiplication, respectively, by 50.4% and 57.7% for (m=163) and (49.8%) and (51.8%), for (m=233), on average, for different digit sizes over the conventional least-significant-digit-first design.

在本文中,我们为通用 GF((2^m))上的数字串行乘法提出了一种高能效的架构设计,它可以根据需要用于不同的字段,并通过改变字段来增强安全性。我们提出了一种高效的输入调度方案,以减少数字串行乘法所需的输入引脚和数字提取电路的数量。此外,为了降低动态功耗,我们提出了一种使用 m AND 门阵列的简单技术,可最大限度地减少输出位切换。为了研究数位大小的影响,我们用 Xilinx Vivado 合成了 (m=163) 和 233 的数位串行乘法器,用于 FPGA 实现。结果发现,随着位数的增加,每次乘法所需的片数、功耗和能量都会增加,而计算延迟则会下降。因此,只有在需要快速乘法的情况下,才可以考虑更大的数字大小。与传统的最小有效数字优先设计相比,用于输出位控制的AND门阵列有助于在不同位数大小的情况下,在(m=163)和(m=233)的情况下,将每次乘法的动态功耗和能耗分别平均降低50.4%和57.7%,在(m=49.8%)和(m=51.8%)的情况下,将每次乘法的动态功耗和能耗分别平均降低50.4%和57.7%。
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引用次数: 0
Optimal Design of Low-Power Ultra-Wideband Low-Noise Transconductance Amplifier in 0.18 µm CMOS 0.18 µm CMOS 低功耗超宽带低噪声跨导放大器的优化设计
IF 2.3 3区 工程技术 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2024-08-07 DOI: 10.1007/s00034-024-02803-1
W. Yasmeen, G. N. Swamy, K. Padma Priya

A low-noise amplifier (LNA) is one of the most crucial components of a communication system. The current low-noise amplifier design faces challenges due to intrinsic noise sources in CMOS transistors and trade-offs to maximize gain and bandwidth. Hence the Optimal design of a low-power ultra-wideband low-noise transconductance amplifier in 0.18 µm CMOS is introduced to minimize the noise figure of the amplifier. Ultra wideband (UWB) signals cover a wide frequency range making it challenging to achieve good input and output matching across the entire band. Thus, Cascode inductive degenerative using pi matching network enhances input–output matching by providing impedance transformation, matching source impedance to low input impedance, and improving power transfer rate. However, the cascode configuration with pi matching offers superior performance over a wide frequency range, but it requires careful consideration of gain and noise figures. Therefore, a current reuse technique is utilized to improve gain and reduce noise figures by optimizing the distribution of bias currents and enhancing the overall performance of the amplifier. Furthermore, the main design challenge for LNAs is achieving high linearity in interference-filled environments. Hence novel Cascade inductive degenerative using T matching network addresses low-frequency signal interference by utilizing multiple amplifier stages for gain and high linearity. Thus, the result obtained showed that the proposed model outperforms the existing design with high gain of 17.7 dB, high input return loss of 10.6 dB, high FOM of 24.4 and low noise figures of 0.573 dB, thus improves the overall performance of the system.

低噪声放大器(LNA)是通信系统最关键的组件之一。目前的低噪声放大器设计面临着 CMOS 晶体管固有噪声源以及增益和带宽最大化权衡带来的挑战。因此,我们采用 0.18 µm CMOS 对低功耗超宽带低噪声跨导放大器进行了优化设计,以最大限度地降低放大器的噪声系数。超宽带 (UWB) 信号覆盖的频率范围很广,因此在整个频段内实现良好的输入和输出匹配具有挑战性。因此,使用π匹配网络的级联电感变性通过提供阻抗变换、将源阻抗匹配到低输入阻抗以及提高功率传输速率来增强输入输出匹配。不过,带 pi 匹配的级联配置在较宽的频率范围内性能优越,但需要仔细考虑增益和噪声系数。因此,我们采用了电流重复使用技术,通过优化偏置电流的分布来提高增益和降低噪声系数,从而提高放大器的整体性能。此外,低噪声放大器的主要设计挑战是在充满干扰的环境中实现高线性度。因此,采用 T 匹配网络的新型级联电感式退变通过利用多级放大器实现增益和高线性度,从而解决了低频信号干扰问题。结果表明,所提出的模型优于现有设计,具有 17.7 dB 的高增益、10.6 dB 的高输入回损、24.4 的高 FOM 和 0.573 dB 的低噪声,从而提高了系统的整体性能。
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引用次数: 0
Composite State Tracking Control Protocol for Semi-Markovian Jump Systems with Time-Varying Delays 具有时变延迟的半马尔可夫跳跃系统的复合状态跟踪控制协议
IF 2.3 3区 工程技术 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2024-08-07 DOI: 10.1007/s00034-024-02773-4
Harshavarthini Shanmugam, Sakthivel Rathinasamy, Anusuya Sundaram, Mohammadzadeh Ardashir

A robust finite-time state tracking issue for a class of linear semi-Markovian jump systems in the presence of unknown disturbance and uncertainties is scrutinized in this study. A lumped disturbance estimator, which bears the consequence of disturbance signals and uncertainties, is devised to ease the required tracking results and to estimate the external input and model perturbations simultaneously. More precisely, in this work, a composite lumped disturbance rejection and robust finite-time state tracking strategy is proposed to get the required result. Additionally, a list of sufficient requirements is constructed within the context of linear matrix inequalities using Lyapunov stability theory to guarantee that the trajectories of the resulting tracking error system are stable in finite-time span. Eventually, the efficacy and practicability of the designed control strategy are validated by using two numerical examples including switched boost converter circuit model.

本研究探讨了一类线性半马尔可夫跃迁系统在存在未知干扰和不确定性时的鲁棒有限时间状态跟踪问题。本文设计了一个可承受扰动信号和不确定性后果的叠加扰动估计器,以简化所需的跟踪结果,并同时估计外部输入和模型扰动。更确切地说,本文提出了一种复合的整块干扰抑制和鲁棒有限时间状态跟踪策略,以获得所需的结果。此外,还利用 Lyapunov 稳定性理论,在线性矩阵不等式的背景下构建了一系列充分条件,以保证所得到的跟踪误差系统的轨迹在有限时间跨度内是稳定的。最后,通过两个包含开关式升压转换器电路模型的数值示例,验证了所设计控制策略的有效性和实用性。
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引用次数: 0
Posture-Invariant Human Detection and Tracking for Outdoor Night-Time Surveillance 用于室外夜间监控的姿态不变人体检测与跟踪技术
IF 2.3 3区 工程技术 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2024-08-07 DOI: 10.1007/s00034-024-02808-w
Merzouk Younsi, Moussa Diaf, Patrick Siarry

Human detection and tracking from infrared image sequences has received considerable attention in many practical applications, ranging from security and surveillance to automated health-care monitoring. However, most of the systems currently reported in the literature assume that humans are in an upright standing or walking posture in the monitored scene, which may not be true in some real-world surveillance scenarios, as humans can move in other abnormal postures, such as creeping and crawling. To overcome this limitation and enable human detection even in the presence of posture changes, this paper proposes a novel system based on locating human head–shoulder Ω-like part and two legs. For tracking purposes, a particle filter and an adaptive combination of different cues, namely spatial, intensity, texture and motion velocity are used. Then, to better describe the posture of the detected human and thus enable its effective recognition over time, three different features, namely Krawtchouk moments, chain code histograms and geometry-based features are first extracted, and then fed into a dendrogram-based support vector machine classifier for posture recognition. The results of posture recognition, in combination with the tracking information, are finally exploited to analyze the behavior of the detected human in the monitored scene. The proposed system was evaluated by performing extensive experiments using several infrared image sequences taken in a real outdoor nighttime environment. The obtained results are satisfactory and demonstrate the feasibility and effectiveness of the proposed system for the automatic detection of moving humans and the analysis of their behavior.

在许多实际应用中,从红外图像序列中进行人体检测和跟踪已受到广泛关注,应用范围从安防和监控到自动医疗监控。然而,目前文献中报道的大多数系统都假定人类在监控场景中处于直立或行走姿态,而这在现实世界的某些监控场景中可能并不正确,因为人类可能以其他异常姿态移动,如匍匐和爬行。为了克服这一限制,即使在姿势变化的情况下也能检测到人类,本文提出了一种基于定位人类头肩Ω状部位和两条腿的新型系统。为实现跟踪目的,使用了粒子滤波器和不同线索(即空间、强度、纹理和运动速度)的自适应组合。然后,为了更好地描述检测到的人的姿势,从而使其在一段时间内得到有效识别,首先提取了三种不同的特征,即 Krawtchouk 矩、链码直方图和基于几何的特征,然后输入基于树枝图的支持向量机分类器进行姿势识别。姿态识别结果与跟踪信息相结合,最终用于分析被检测到的人在监控场景中的行为。通过使用在真实的室外夜间环境中拍摄的若干红外图像序列进行大量实验,对所提出的系统进行了评估。实验结果令人满意,证明了所提议的系统在自动检测移动的人类并分析其行为方面的可行性和有效性。
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引用次数: 0
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