Pub Date : 2014-05-27DOI: 10.1109/ITHERM.2014.6892401
N. Malu, Disha Bora, S. Nakanekar, S. Tonapi
A lot of effort has been put to develop the next generation cooling technologies for Insulated Gate Bipolar Transistor module of hybrid vehicles. Two phase cooling has been identified as a potential solution for cooling of such modules. This paper explores the viability and implementation of a two phase cooling scheme and its comparison with single phase cooling. For this inverter module of Toyota Prius consisting of 12 pairs of IGBT devices and diodes is used. Thermal simulation technique is used to study the effect of convective heat transfer coefficient, cold plate dimensions, total power on IGBT, thermal interface material and its thickness on the thermal performance of the module.
{"title":"Thermal management of an IGBT module using two-phase cooling","authors":"N. Malu, Disha Bora, S. Nakanekar, S. Tonapi","doi":"10.1109/ITHERM.2014.6892401","DOIUrl":"https://doi.org/10.1109/ITHERM.2014.6892401","url":null,"abstract":"A lot of effort has been put to develop the next generation cooling technologies for Insulated Gate Bipolar Transistor module of hybrid vehicles. Two phase cooling has been identified as a potential solution for cooling of such modules. This paper explores the viability and implementation of a two phase cooling scheme and its comparison with single phase cooling. For this inverter module of Toyota Prius consisting of 12 pairs of IGBT devices and diodes is used. Thermal simulation technique is used to study the effect of convective heat transfer coefficient, cold plate dimensions, total power on IGBT, thermal interface material and its thickness on the thermal performance of the module.","PeriodicalId":12453,"journal":{"name":"Fourteenth Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm)","volume":"39 1","pages":"1079-1085"},"PeriodicalIF":0.0,"publicationDate":"2014-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"77544418","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-05-27DOI: 10.1109/ITHERM.2014.6892288
Tuhin Sinha, J. Zitz, Rebecca Wagner, S. Iruvanti
Ensuring adequate thermal performance is essential for the reliable operation of flip-chip electronic packages. Thermal interface materials (TIMs), applied between the die and a heat spreader form a crucial thermal junction between the first level package and external cooling mechanisms such as heat-sinks and cooling fans. Selection of a good TIM is dependent not only on its thermal properties but also on its ability to withstand mechanical stresses in an electronic package. In the past, FEM models have been applied to obtain the stresses and strains in the TIM using time-independent analysis. However, there has only been limited work in extending these models to predict the damage (both mechanical and thermal) in a TIM during thermo-cyclic loading. Our current work presents a technique to predict the thermal damage in TIMs over cyclic loading. Calibrated finite element analysis models have been created to predict accurate TIM strains in thermal test-vehicles. These predicted mechanical strains are then correlated with experimentally observed thermal degradation and finally, a phenomenological model is developed which predicts the thermal performance of an electronic package during cyclic loading.
{"title":"Predicting thermo-mechanical degradation of first-level thermal interface materials (TIMs) in flip-chip electronic packages","authors":"Tuhin Sinha, J. Zitz, Rebecca Wagner, S. Iruvanti","doi":"10.1109/ITHERM.2014.6892288","DOIUrl":"https://doi.org/10.1109/ITHERM.2014.6892288","url":null,"abstract":"Ensuring adequate thermal performance is essential for the reliable operation of flip-chip electronic packages. Thermal interface materials (TIMs), applied between the die and a heat spreader form a crucial thermal junction between the first level package and external cooling mechanisms such as heat-sinks and cooling fans. Selection of a good TIM is dependent not only on its thermal properties but also on its ability to withstand mechanical stresses in an electronic package. In the past, FEM models have been applied to obtain the stresses and strains in the TIM using time-independent analysis. However, there has only been limited work in extending these models to predict the damage (both mechanical and thermal) in a TIM during thermo-cyclic loading. Our current work presents a technique to predict the thermal damage in TIMs over cyclic loading. Calibrated finite element analysis models have been created to predict accurate TIM strains in thermal test-vehicles. These predicted mechanical strains are then correlated with experimentally observed thermal degradation and finally, a phenomenological model is developed which predicts the thermal performance of an electronic package during cyclic loading.","PeriodicalId":12453,"journal":{"name":"Fourteenth Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm)","volume":"5 1","pages":"240-250"},"PeriodicalIF":0.0,"publicationDate":"2014-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"80525481","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-05-27DOI: 10.1109/ITHERM.2014.6892445
Y. Koh, K. Yazawa, A. Shakouri
Thermoelectric (TE) microcoolers are solid state devices widely considered as strong candidates for precise temperature control and spot cooling in microelectronic circuits, especially for temperature sensitive devices such as laser diodes. Despite the excellent scalability and process compatibility of TE microcoolers for microelectronics, their utilization has been limited by their relatively moderate performance compared to vapor compression cycles due to the relatively small material figure-of-merit (ZT). In addition to crucial advantage of TE for a hotspot cooling, improving the ZT value of thermoelectric material has been the focus of research interest over the past few decades. Yet the independent impacts of three components of the ZT value have not been very clear. In this paper, we report the material cost impact of TE microcooler integration and coefficient-ofperformance (COP) change relative to modifications of the electrical conductivity, the Seebeck coefficient, and the thermal conductivity. This study is mostly focused on high heat-flux spot cooling based on the analysis of a practical TE microcooler integrated with a microchannel heat sink. Based on a one-dimensional analytic model, including the system thermal resistances, we maximize the cooling COP as functions of the drive current and the design thickness of a TE element. An example demonstrates the cooling performance for a 500 μm x 500 μm size integrated circuit with a temperature constraint of 65 °C maximum and an operating temperature of 74 °C for the heat sink. Increasing the ZT value linearly increases the maximum COP for a given temperature constraint and the maximum COP changes equally by varying any of the thermoelectric properties as expected. For the same ZT value, however, a lower thermal conductivity requires a thinner TE element for a design optimized for COP, e.g. changing the thermal conductivity from 1.5 W/mK to 0.75 W/mK reduces the optimum thickness from approximately 9 μm to 5 μm for 100 W/cm2 of heat flux. This result is encouraging for the utilization of TE for spot cooling since the TE cost directly relates to the mass usage of the material.
{"title":"Cooling heat flux, COP, and cost optimization of integrated thermoelectric microcoolers with variation of thermoelectric properties","authors":"Y. Koh, K. Yazawa, A. Shakouri","doi":"10.1109/ITHERM.2014.6892445","DOIUrl":"https://doi.org/10.1109/ITHERM.2014.6892445","url":null,"abstract":"Thermoelectric (TE) microcoolers are solid state devices widely considered as strong candidates for precise temperature control and spot cooling in microelectronic circuits, especially for temperature sensitive devices such as laser diodes. Despite the excellent scalability and process compatibility of TE microcoolers for microelectronics, their utilization has been limited by their relatively moderate performance compared to vapor compression cycles due to the relatively small material figure-of-merit (ZT). In addition to crucial advantage of TE for a hotspot cooling, improving the ZT value of thermoelectric material has been the focus of research interest over the past few decades. Yet the independent impacts of three components of the ZT value have not been very clear. In this paper, we report the material cost impact of TE microcooler integration and coefficient-ofperformance (COP) change relative to modifications of the electrical conductivity, the Seebeck coefficient, and the thermal conductivity. This study is mostly focused on high heat-flux spot cooling based on the analysis of a practical TE microcooler integrated with a microchannel heat sink. Based on a one-dimensional analytic model, including the system thermal resistances, we maximize the cooling COP as functions of the drive current and the design thickness of a TE element. An example demonstrates the cooling performance for a 500 μm x 500 μm size integrated circuit with a temperature constraint of 65 °C maximum and an operating temperature of 74 °C for the heat sink. Increasing the ZT value linearly increases the maximum COP for a given temperature constraint and the maximum COP changes equally by varying any of the thermoelectric properties as expected. For the same ZT value, however, a lower thermal conductivity requires a thinner TE element for a design optimized for COP, e.g. changing the thermal conductivity from 1.5 W/mK to 0.75 W/mK reduces the optimum thickness from approximately 9 μm to 5 μm for 100 W/cm2 of heat flux. This result is encouraging for the utilization of TE for spot cooling since the TE cost directly relates to the mass usage of the material.","PeriodicalId":12453,"journal":{"name":"Fourteenth Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm)","volume":"30 1","pages":"1412-1416"},"PeriodicalIF":0.0,"publicationDate":"2014-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"84872681","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-05-27DOI: 10.1109/ITHERM.2014.6892342
S. Solovitz, M. Lewis
Modern electronics feature high surface heat fluxes, particularly at localized hot spots, which can be detrimental to chip performance. While techniques have been developed to alleviate these local effects, they are typically advanced solutions using embedded cooling devices. Instead, an effective, less aggressive solution involves the adaptation of traditional micro-channel cooling to the particular thermal profile. An analytical method is developed to determine individual channel flow rates and convective heat transfer through traditional correlations. This results in a simple power law relating passage diameter, D, to hot spot power, q, where D ~ qm. Unfortunately, this method is limited by the form of the empirical correlations, being applicable to only certain ranges of Reynolds numbers and channel sizes. To address this issue, a series of computational simulations has been conducted to select the appropriate power law for typical flow conditions in a micro-channel heat sink. For laminar, developing flow at ReD ~ 100, an empirical fit was generated. At an arbitrary, non-uniform chip power dissipation, the device temperature rises balanced to within less than 5%, even with up to three times more power at local spots.
{"title":"Tailored parallel micro-channel cooling for hot spot mitigation","authors":"S. Solovitz, M. Lewis","doi":"10.1109/ITHERM.2014.6892342","DOIUrl":"https://doi.org/10.1109/ITHERM.2014.6892342","url":null,"abstract":"Modern electronics feature high surface heat fluxes, particularly at localized hot spots, which can be detrimental to chip performance. While techniques have been developed to alleviate these local effects, they are typically advanced solutions using embedded cooling devices. Instead, an effective, less aggressive solution involves the adaptation of traditional micro-channel cooling to the particular thermal profile. An analytical method is developed to determine individual channel flow rates and convective heat transfer through traditional correlations. This results in a simple power law relating passage diameter, D, to hot spot power, q, where D ~ qm. Unfortunately, this method is limited by the form of the empirical correlations, being applicable to only certain ranges of Reynolds numbers and channel sizes. To address this issue, a series of computational simulations has been conducted to select the appropriate power law for typical flow conditions in a micro-channel heat sink. For laminar, developing flow at ReD ~ 100, an empirical fit was generated. At an arbitrary, non-uniform chip power dissipation, the device temperature rises balanced to within less than 5%, even with up to three times more power at local spots.","PeriodicalId":12453,"journal":{"name":"Fourteenth Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm)","volume":"404 1","pages":"641-648"},"PeriodicalIF":0.0,"publicationDate":"2014-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"77462886","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-05-27DOI: 10.1109/ITHERM.2014.6892352
K. Nemati, B. Murray, B. Sammakia
Water-cooled server racks are typically closed cabinets, so no heat load is removed by the room cooling system in a raised floor data center. Instead, the cooling is provided by a closed system employing an air-water (fin-tube) heat exchanger. This kind of heat exchanger uses chilled water from a central plant, and there is the potential of using the waste heat that is returned. The goal of this study is characterize a specific sealed-door, water-cooled server cabinet under steady state and transient operation. The experimental part of the study is being performed on a Knurr CoolThermTM® rack. In this cabinet, the water/air heat exchanger is located at the bottom. Cooling air is circulated by three rear door mounted fans, the cooled air flows upward in front of the servers. The specific cabinet being tested has the capability to handle 25 kW and has a 30% cooling system energy efficiency. In the experiments, 16 1U servers and a 9U load bank are employed for generating a heat load. Over 100 thermocouples are used to monitor air temperature within different parts of the cabinet. The operating conditions monitored include: water flow rate, water inlet temperature, air flow rate through the servers, air flow rate through the heat exchanger, air temperatures and server power. The internal temperature of the servers is also monitored. From the measured data, the effectiveness is calculated for four different water flow rates and different power dissipation levels. Computational modeling of the air flow and heat transfer in a simplified model of the cabinet is also performed.
{"title":"Experimental characterization and modeling of a water-cooled server cabinet","authors":"K. Nemati, B. Murray, B. Sammakia","doi":"10.1109/ITHERM.2014.6892352","DOIUrl":"https://doi.org/10.1109/ITHERM.2014.6892352","url":null,"abstract":"Water-cooled server racks are typically closed cabinets, so no heat load is removed by the room cooling system in a raised floor data center. Instead, the cooling is provided by a closed system employing an air-water (fin-tube) heat exchanger. This kind of heat exchanger uses chilled water from a central plant, and there is the potential of using the waste heat that is returned. The goal of this study is characterize a specific sealed-door, water-cooled server cabinet under steady state and transient operation. The experimental part of the study is being performed on a Knurr CoolThermTM® rack. In this cabinet, the water/air heat exchanger is located at the bottom. Cooling air is circulated by three rear door mounted fans, the cooled air flows upward in front of the servers. The specific cabinet being tested has the capability to handle 25 kW and has a 30% cooling system energy efficiency. In the experiments, 16 1U servers and a 9U load bank are employed for generating a heat load. Over 100 thermocouples are used to monitor air temperature within different parts of the cabinet. The operating conditions monitored include: water flow rate, water inlet temperature, air flow rate through the servers, air flow rate through the heat exchanger, air temperatures and server power. The internal temperature of the servers is also monitored. From the measured data, the effectiveness is calculated for four different water flow rates and different power dissipation levels. Computational modeling of the air flow and heat transfer in a simplified model of the cabinet is also performed.","PeriodicalId":12453,"journal":{"name":"Fourteenth Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm)","volume":"122 1","pages":"723-728"},"PeriodicalIF":0.0,"publicationDate":"2014-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"73133362","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-05-27DOI: 10.1109/ITHERM.2014.6892264
K. Matin, Yan Zheng, A. Bar-Cohen
High heat flux management schemes in laser diodes require appropriate cooling applications. Micro channel coolers are now widely used in high power laser diode industry with the highest total thermal resistance reported as low as 0.03 cm2-K/W with pressure drops as low as 10~50 psi. Since, the geometries, flow rates as well as high heat fluxes of current SOA LD micro-coolers differ, it is necessary to understand their thermal performance relative to conductive, convective and caloric thermal resistance. To do this comparison an equivalent effective micro-cooler thermal model is developed and then iterated with scaled input parameters from SOA LD micro-coolers. The objective is to identify the dominant thermal resistance - that plays the major role in decreasing the total thermal resistance. This paper will then predict a micro cooler that will perhaps be able to reduce total thermal resistance lower than 0.01 K-cm2/W with minimal pressure drop for next generation high heat flux applications. The current study will be restricted to only single phase liquid cooling.
{"title":"Numerical modeling and simulation of laser diode diamond microcoolers","authors":"K. Matin, Yan Zheng, A. Bar-Cohen","doi":"10.1109/ITHERM.2014.6892264","DOIUrl":"https://doi.org/10.1109/ITHERM.2014.6892264","url":null,"abstract":"High heat flux management schemes in laser diodes require appropriate cooling applications. Micro channel coolers are now widely used in high power laser diode industry with the highest total thermal resistance reported as low as 0.03 cm2-K/W with pressure drops as low as 10~50 psi. Since, the geometries, flow rates as well as high heat fluxes of current SOA LD micro-coolers differ, it is necessary to understand their thermal performance relative to conductive, convective and caloric thermal resistance. To do this comparison an equivalent effective micro-cooler thermal model is developed and then iterated with scaled input parameters from SOA LD micro-coolers. The objective is to identify the dominant thermal resistance - that plays the major role in decreasing the total thermal resistance. This paper will then predict a micro cooler that will perhaps be able to reduce total thermal resistance lower than 0.01 K-cm2/W with minimal pressure drop for next generation high heat flux applications. The current study will be restricted to only single phase liquid cooling.","PeriodicalId":12453,"journal":{"name":"Fourteenth Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm)","volume":"519 1","pages":"59-63"},"PeriodicalIF":0.0,"publicationDate":"2014-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"77186539","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-05-27DOI: 10.1109/ITHERM.2014.6892278
Yu-Hsiang Yang, Yen-Fu Su, K. Chiang
Global warming highlights the effect of light-emitting diodes (LEDs), the advantages of which include lo w pollution and power consumption, as well as a long operation lifetime. However, LED research and development is limited by Illuminating Engineering Society of North America (IES) LM-80-08. This standard reliability test, which is utilized by most LED companies, is time-consuming and prolongs time-to-market. LEDs are degraded by various types of stresses, including temperature, current, and optical stresses. Thus, this study proposes an accelerated aging test for high-power LEDs under different high-temperature stresses without input current. 1-W LEDs based on gallium nitride (GaN) from the same series were obtained as test samples. At the beginning of the accelerated aging test, the device structure is presumably known. This test aims to (i) extrapolate the degradation model to accurately estimate lifetime; and (ii) propose a method to shorten IES LM-80-08 and TM-21-11, which last for a minimum of 6000 h. The results of the accelerated aging test show that sufficiently high-temperature stress effectively shortens the unstable period of the LED chip. During aging, light output degraded as well, and the activation energy of the degradation process was 0.65 eV. This value was obtained by applying the Arrhenius model as the prediction model for the lumen maintenance and temperature of the LED. The LED lifetime estimated by the prediction model varied from that projected by the experimental method by only 10%.
全球变暖凸显了发光二极管(led)的影响，其优点包括低污染和低功耗，以及较长的使用寿命。然而，LED的研究和发展受到北美照明工程学会(IES) LM-80-08的限制。大多数LED公司采用的这种标准可靠性测试非常耗时，并且延长了上市时间。led会受到各种应力的退化，包括温度、电流和光学应力。因此，本研究提出了一种无输入电流的大功率led在不同高温应力下的加速老化测试方法。从同一系列中获得了基于氮化镓(GaN)的1 w led作为测试样品。在加速老化试验开始时，假定器件结构是已知的。本试验旨在(i)外推退化模型以准确估计寿命;(ii)提出缩短IES LM-80-08和TM-21-11的方法，其持续时间至少为6000 h。加速老化试验结果表明，充分的高温应力可以有效缩短LED芯片的不稳定时间。老化过程中，光输出也发生了退化，降解过程的活化能为0.65 eV。该值是应用Arrhenius模型作为LED的流明维持和温度的预测模型得到的。预测模型估计的LED寿命与实验方法预测的寿命仅相差10%。
{"title":"Acceleration factor analysis of aging test on gallium nitride (GaN)-based high power light-emitting diode (LED)","authors":"Yu-Hsiang Yang, Yen-Fu Su, K. Chiang","doi":"10.1109/ITHERM.2014.6892278","DOIUrl":"https://doi.org/10.1109/ITHERM.2014.6892278","url":null,"abstract":"Global warming highlights the effect of light-emitting diodes (LEDs), the advantages of which include lo w pollution and power consumption, as well as a long operation lifetime. However, LED research and development is limited by Illuminating Engineering Society of North America (IES) LM-80-08. This standard reliability test, which is utilized by most LED companies, is time-consuming and prolongs time-to-market. LEDs are degraded by various types of stresses, including temperature, current, and optical stresses. Thus, this study proposes an accelerated aging test for high-power LEDs under different high-temperature stresses without input current. 1-W LEDs based on gallium nitride (GaN) from the same series were obtained as test samples. At the beginning of the accelerated aging test, the device structure is presumably known. This test aims to (i) extrapolate the degradation model to accurately estimate lifetime; and (ii) propose a method to shorten IES LM-80-08 and TM-21-11, which last for a minimum of 6000 h. The results of the accelerated aging test show that sufficiently high-temperature stress effectively shortens the unstable period of the LED chip. During aging, light output degraded as well, and the activation energy of the degradation process was 0.65 eV. This value was obtained by applying the Arrhenius model as the prediction model for the lumen maintenance and temperature of the LED. The LED lifetime estimated by the prediction model varied from that projected by the experimental method by only 10%.","PeriodicalId":12453,"journal":{"name":"Fourteenth Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm)","volume":"8 1","pages":"178-181"},"PeriodicalIF":0.0,"publicationDate":"2014-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"75997977","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-05-27DOI: 10.1109/ITHERM.2014.6892345
H. Celik, M. Mobedi
Laminar mixed convection heat transfer in a two dimensional symmetrically and partially heated vertical channel is investigated. The heated portions exist on the both walls of channel and their temperature is constant. The number of the heated portions is changed from 2 to 4 for each wall; however the total length of the heated portions is fixed. The fluid inlet velocity is uniform and air is taken as working fluid. The continuity, momentum and energy equations are solved numerically by using finite volume method. Results are compared with available studies in literature and good agreement is observed. The velocity and temperature fields are obtained for Gr / Re2 = 0.0033 and 13.33. Based on the obtained temperature distributions, the change of local Nusselt number for different number of heated portions are obtained and plotted. The variation of the mean Nusselt number with the number of heated portions is also discussed.
{"title":"Mixed convection heat transfer in a partially heated parallel plate vertical channel","authors":"H. Celik, M. Mobedi","doi":"10.1109/ITHERM.2014.6892345","DOIUrl":"https://doi.org/10.1109/ITHERM.2014.6892345","url":null,"abstract":"Laminar mixed convection heat transfer in a two dimensional symmetrically and partially heated vertical channel is investigated. The heated portions exist on the both walls of channel and their temperature is constant. The number of the heated portions is changed from 2 to 4 for each wall; however the total length of the heated portions is fixed. The fluid inlet velocity is uniform and air is taken as working fluid. The continuity, momentum and energy equations are solved numerically by using finite volume method. Results are compared with available studies in literature and good agreement is observed. The velocity and temperature fields are obtained for Gr / Re2 = 0.0033 and 13.33. Based on the obtained temperature distributions, the change of local Nusselt number for different number of heated portions are obtained and plotted. The variation of the mean Nusselt number with the number of heated portions is also discussed.","PeriodicalId":12453,"journal":{"name":"Fourteenth Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm)","volume":"75 1","pages":"666-672"},"PeriodicalIF":0.0,"publicationDate":"2014-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"76029550","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-05-27DOI: 10.1109/ITHERM.2014.6892427
A. Ranade, R. Havens, K. Srihari
Miniaturization and higher functionality have been and continue to be serious pursuits of the electronics industry. In relation to the miniaturization of package size, the 3D integration of devices using through silicon vias (or TSVs) is currently being researched extensively. 2.5D integration with a passive interposer is currently being researched as a step toward achieving the goal of complete 3D integration. This paper analyzes the packaging industry's transition from 2D to 3D integration of packages. Literature focused on manufacturability, materials of interest, geometrical dimensions, market trends, and customer focus is discussed in detail. The utilization of TSV packages in high power and high temperature products is the research area still to be explored. Hence, existing simulation data is extrapolated to high power die dimensions to analyze the effect of package dimensions on the thermo-mechanical behavior of TSV power die. Furthermore, a basic thermo-mechanical model of a Cu-filled TSV passive interposer is studied under high power and high temperature field conditions. Multiple cases are simulated to study the effect of TSV dimensions and material properties on the thermo-mechanical behavior of power packages. The current limitations of TSVs in high power application s ar e stated based on the results.
{"title":"The application of through silicon vias (or TSVs) for high power and temperature devices","authors":"A. Ranade, R. Havens, K. Srihari","doi":"10.1109/ITHERM.2014.6892427","DOIUrl":"https://doi.org/10.1109/ITHERM.2014.6892427","url":null,"abstract":"Miniaturization and higher functionality have been and continue to be serious pursuits of the electronics industry. In relation to the miniaturization of package size, the 3D integration of devices using through silicon vias (or TSVs) is currently being researched extensively. 2.5D integration with a passive interposer is currently being researched as a step toward achieving the goal of complete 3D integration. This paper analyzes the packaging industry's transition from 2D to 3D integration of packages. Literature focused on manufacturability, materials of interest, geometrical dimensions, market trends, and customer focus is discussed in detail. The utilization of TSV packages in high power and high temperature products is the research area still to be explored. Hence, existing simulation data is extrapolated to high power die dimensions to analyze the effect of package dimensions on the thermo-mechanical behavior of TSV power die. Furthermore, a basic thermo-mechanical model of a Cu-filled TSV passive interposer is studied under high power and high temperature field conditions. Multiple cases are simulated to study the effect of TSV dimensions and material properties on the thermo-mechanical behavior of power packages. The current limitations of TSVs in high power application s ar e stated based on the results.","PeriodicalId":12453,"journal":{"name":"Fourteenth Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm)","volume":"24 9 1","pages":"1270-1278"},"PeriodicalIF":0.0,"publicationDate":"2014-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"82686780","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-05-27DOI: 10.1109/ITHERM.2014.6892353
M. Schultz, M. Gaynes, P. Parida, T. Chainer
As part of a US Department of Energy cost shared grant, a liquid cooled chiller-less data center test facility was designed and constructed with the goal of reducing total cooling energy use to less than 5% of the total IT and facilities energy usage by utilizing warm water cooling of the electronic rack. A server compatible Liquid Metal Thermal Interface (LMTI) [1] was developed and integrated to improve the thermal conduction path of the hot server components to the ambient cooling of the data center. This LMTI has a thermal resistance an order of magnitude better than that achieved with most commercially utilized thermal interface materials (TIMs). When integrated directly between a bare die and a water cooled heat sink, this technology achieved a significant improvement in thermal conduction and enabled the computer devices to operate in a much higher ambient temperature environment. Initial studies on single modules showed substantial improvement in operating temperature when utilizing LMTI. Based upon this result, a detailed study was completed using two liquid cooled System X 3550 servers, comparing the thermal performance between the commercial thermal solution of a standard lidded module interfaced with a thermal grease to a cold plate, and the solution where the lid was removed and LMTI was used between the bare die and the same cold plate. The servers were first characterized using bench top investigation and then in a Data Center Liquid Cooled System with the standard lidded module and subsequently reassembled with a direct die attach LMTI. The servers CPU core temperatures showed a 5 to 6 °C advantage in CPU core temperature for the direct attach LMTI compared to the standard lidded module with thermal grease.
作为美国能源部成本共享拨款的一部分，设计和建造了一个液冷式无冷水机数据中心测试设施，其目标是通过利用电子机架的温水冷却，将总冷却能耗减少到IT和设施总能耗的5%以下。开发并集成了服务器兼容的液态金属热接口(LMTI)[1]，以改善服务器热组件对数据中心环境冷却的热传导路径。该LMTI的热阻比大多数商用热界面材料(TIMs)的热阻要好一个数量级。当直接集成在裸模和水冷散热片之间时，该技术实现了热传导的显着改进，并使计算机设备能够在更高的环境温度环境中运行。对单个模块的初步研究表明，当使用LMTI时，工作温度有了实质性的提高。基于此结果，使用两台液冷System X 3550服务器完成了详细的研究，比较了标准有盖模块与导热脂接口的商用热解决方案与冷板之间的热性能，以及在裸模和同一冷板之间去除盖子并使用LMTI的解决方案。首先使用台式调查对服务器进行了表征，然后在具有标准盖子模块的数据中心液冷系统中对服务器进行了表征，随后使用直接连接模具的LMTI进行了重新组装。与带有导热脂的标准上盖模块相比，直接连接LMTI的服务器CPU核心温度显示出5至6°C的优势。
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