Pub Date : 2024-12-04DOI: 10.1109/TED.2024.3498282
{"title":"Blank Page","authors":"","doi":"10.1109/TED.2024.3498282","DOIUrl":"https://doi.org/10.1109/TED.2024.3498282","url":null,"abstract":"","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"71 12","pages":"C4-C4"},"PeriodicalIF":2.9,"publicationDate":"2024-12-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10778122","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142777603","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-12-04DOI: 10.1109/TED.2024.3508659
Zhipeng Chen;Kaibin Xu;Tianyou Luo;Guowei Zhi;Yuhan Zhu;Peidong Ouyang;Guoqiang Li
The poor crystal quality of AlScN films is a serious obstacle to the development of broadband film bulk acoustic resonator (FBAR) filters. To address this issue, a low-temperature staged deposition method was proposed, in which a single-crystalline AlN buffer layer was deposited on a silicon substrate using pulsed laser deposition (PLD) and subsequently sputtered to produce a high-quality Al0.8Sc0.2N film by physical vapor deposition (PVD). The results showed that the single-crystalline AlN buffer layer created by PLD had a low dislocation density, which was attributable to the low-temperature growth and unique benefits of PLD. Growth of the Al0.8Sc0.2N film on the single-crystalline AlN buffer layer resulted in significant improvements in crystal quality, surface roughness, and stress. The produced FBAR has a high figure of merit (FOM) of 187, a 61.2% improvement over the PVD method, owing to the higher quality of the Al0.8Sc0.2N film. At a center frequency of approximately 3.41 GHz, the designed filter had a 3-dB bandwidth of 314 MHz with a minimum insertion loss of −0.984 dB and a maximum insertion loss of −1.646 dB in the passband. This work presents a novel approach for advancing the development of high-performance FBARs and high-frequency broadband FBAR filters.
{"title":"High-Performance Film Bulk Acoustic Resonator and Filter Based on an Al0.8Sc0.2N Film Prepared by a Low-Temperature Staged Deposition Method","authors":"Zhipeng Chen;Kaibin Xu;Tianyou Luo;Guowei Zhi;Yuhan Zhu;Peidong Ouyang;Guoqiang Li","doi":"10.1109/TED.2024.3508659","DOIUrl":"https://doi.org/10.1109/TED.2024.3508659","url":null,"abstract":"The poor crystal quality of AlScN films is a serious obstacle to the development of broadband film bulk acoustic resonator (FBAR) filters. To address this issue, a low-temperature staged deposition method was proposed, in which a single-crystalline AlN buffer layer was deposited on a silicon substrate using pulsed laser deposition (PLD) and subsequently sputtered to produce a high-quality Al0.8Sc0.2N film by physical vapor deposition (PVD). The results showed that the single-crystalline AlN buffer layer created by PLD had a low dislocation density, which was attributable to the low-temperature growth and unique benefits of PLD. Growth of the Al0.8Sc0.2N film on the single-crystalline AlN buffer layer resulted in significant improvements in crystal quality, surface roughness, and stress. The produced FBAR has a high figure of merit (FOM) of 187, a 61.2% improvement over the PVD method, owing to the higher quality of the Al0.8Sc0.2N film. At a center frequency of approximately 3.41 GHz, the designed filter had a 3-dB bandwidth of 314 MHz with a minimum insertion loss of −0.984 dB and a maximum insertion loss of −1.646 dB in the passband. This work presents a novel approach for advancing the development of high-performance FBARs and high-frequency broadband FBAR filters.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"72 1","pages":"383-389"},"PeriodicalIF":2.9,"publicationDate":"2024-12-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142918281","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
In this work, the effects of reducing the thickness of Al0.8Sc0.2N films from 100 to 40 nm on the ferroelectric properties of Pt/Al0.8Sc0.2N/Pt capacitors were investigated. As Al0.8Sc0.2N film thickness decreases, remanent polarization significantly drops, and coercive field ( ${E}_{text {c}}$ ) increases, which origins from the diminished c-axis orientation and reduced crystalline size. Piezoresponse force microscopy results confirm polarization switching in all films, with thinner films exhibiting larger ${E}_{text {c}}$ and lower initial polarization. Notably, the thinner films show the lower leakage current, attributed to a decrease in nitrogen vacancies. Moreover, thinner Al0.8Sc0.2N films exhibit better endurance performance, with a maximum switching cycle of $10^{{5}}$ cycles achieved for the 40-nm Al0.8Sc0.2N film. These results underscore the critical role of film thickness in optimizing aluminum scandium nitride (AlScN) thin films for high-performance ferroelectric applications, providing crucial insights for future device development.
{"title":"Impact of Scaling Thickness on the Ferroelectric Properties of Pt/Al₀.₈Sc₀.₂N/Pt Capacitors","authors":"Xiaoxi Li;Yuan Fang;Jiuren Zhou;Bochang Li;Zhifan Wu;Cizhe Fang;Xiangyu Zeng;Siying Zheng;Wei Mao;Yue Hao;Yan Liu;Genquan Han","doi":"10.1109/TED.2024.3506513","DOIUrl":"https://doi.org/10.1109/TED.2024.3506513","url":null,"abstract":"In this work, the effects of reducing the thickness of Al0.8Sc0.2N films from 100 to 40 nm on the ferroelectric properties of Pt/Al0.8Sc0.2N/Pt capacitors were investigated. As Al0.8Sc0.2N film thickness decreases, remanent polarization significantly drops, and coercive field (\u0000<inline-formula> <tex-math>${E}_{text {c}}$ </tex-math></inline-formula>\u0000) increases, which origins from the diminished c-axis orientation and reduced crystalline size. Piezoresponse force microscopy results confirm polarization switching in all films, with thinner films exhibiting larger \u0000<inline-formula> <tex-math>${E}_{text {c}}$ </tex-math></inline-formula>\u0000 and lower initial polarization. Notably, the thinner films show the lower leakage current, attributed to a decrease in nitrogen vacancies. Moreover, thinner Al0.8Sc0.2N films exhibit better endurance performance, with a maximum switching cycle of \u0000<inline-formula> <tex-math>$10^{{5}}$ </tex-math></inline-formula>\u0000 cycles achieved for the 40-nm Al0.8Sc0.2N film. These results underscore the critical role of film thickness in optimizing aluminum scandium nitride (AlScN) thin films for high-performance ferroelectric applications, providing crucial insights for future device development.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"72 1","pages":"370-375"},"PeriodicalIF":2.9,"publicationDate":"2024-12-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142918280","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-12-04DOI: 10.1109/TED.2024.3506509
Siri Narla;Piyush Kumar;Mohammad Adnaan;Azad Naeemi
In this article, we present a comprehensive design and benchmarking study of content addressable memory (CAM) at the 7-nm technology node in the context of similarity search applications. We design CAM cells based on static random access memory (SRAM), spin-orbit torque (SOT), and ferroelectric field effect transistor devices and from their layouts extract cell parasitics using state-of-the-art electronic design automation (EDA) tools. These parasitics are used to develop SPICE netlists to model search operations. We use a CAM-based dataset search and a sequential recommendation system (RS) to highlight the application-level performance degradation due to interconnect parasitics. We propose and evaluate two solutions to mitigate interconnect effects.
{"title":"Cross-Layer Modeling and Design of Content Addressable Memories in Advanced Technology Nodes for Similarity Search","authors":"Siri Narla;Piyush Kumar;Mohammad Adnaan;Azad Naeemi","doi":"10.1109/TED.2024.3506509","DOIUrl":"https://doi.org/10.1109/TED.2024.3506509","url":null,"abstract":"In this article, we present a comprehensive design and benchmarking study of content addressable memory (CAM) at the 7-nm technology node in the context of similarity search applications. We design CAM cells based on static random access memory (SRAM), spin-orbit torque (SOT), and ferroelectric field effect transistor devices and from their layouts extract cell parasitics using state-of-the-art electronic design automation (EDA) tools. These parasitics are used to develop SPICE netlists to model search operations. We use a CAM-based dataset search and a sequential recommendation system (RS) to highlight the application-level performance degradation due to interconnect parasitics. We propose and evaluate two solutions to mitigate interconnect effects.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"72 1","pages":"240-246"},"PeriodicalIF":2.9,"publicationDate":"2024-12-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142925401","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-12-04DOI: 10.1109/TED.2024.3502034
Aditya Singh Thakur;Meenakshi Rawat;Manfred Thumm;M. V. Kartikeyan
This article presents a comprehensive theoretical investigation into a double-negative metamaterial (MTM)-loaded helical slow-wave structure (DNM-HSWS) employing an equivalent circuit analysis (ECA) approach considering the sheath-helix model of the helix. The study involves deriving dispersion and interaction impedance formulations, with a focus on analyzing the propagation and interaction characteristics of the structure. The practically feasible DNM-HSWS is designed and analyzed using CST-microwave studio software. A comparative analysis is conducted between theoretical and simulation results for the designed CST model, verifying the accuracy of the proposed theoretical investigation for the DNM-HSWS. Beyond validation, this study highlights the practical utility of the proposed theoretical investigations and the designed DNM-HSWS within the domain of MTM-inspired vacuum electron device (VED) applications. The findings contribute to advancing the understanding and application of MTM-loaded structures for improved performance in microwave devices.
{"title":"Investigation of a Double-Negative Metamaterial-Loaded Helical Slow-Wave Structure: Equivalent Circuit Analysis Approach","authors":"Aditya Singh Thakur;Meenakshi Rawat;Manfred Thumm;M. V. Kartikeyan","doi":"10.1109/TED.2024.3502034","DOIUrl":"https://doi.org/10.1109/TED.2024.3502034","url":null,"abstract":"This article presents a comprehensive theoretical investigation into a double-negative metamaterial (MTM)-loaded helical slow-wave structure (DNM-HSWS) employing an equivalent circuit analysis (ECA) approach considering the sheath-helix model of the helix. The study involves deriving dispersion and interaction impedance formulations, with a focus on analyzing the propagation and interaction characteristics of the structure. The practically feasible DNM-HSWS is designed and analyzed using CST-microwave studio software. A comparative analysis is conducted between theoretical and simulation results for the designed CST model, verifying the accuracy of the proposed theoretical investigation for the DNM-HSWS. Beyond validation, this study highlights the practical utility of the proposed theoretical investigations and the designed DNM-HSWS within the domain of MTM-inspired vacuum electron device (VED) applications. The findings contribute to advancing the understanding and application of MTM-loaded structures for improved performance in microwave devices.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"72 1","pages":"432-438"},"PeriodicalIF":2.9,"publicationDate":"2024-12-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142918282","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-12-04DOI: 10.1109/TED.2024.3508113
{"title":"TechRxiv: Share Your Preprint Research with the World!","authors":"","doi":"10.1109/TED.2024.3508113","DOIUrl":"https://doi.org/10.1109/TED.2024.3508113","url":null,"abstract":"","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"71 12","pages":"8047-8047"},"PeriodicalIF":2.9,"publicationDate":"2024-12-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10778164","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142777620","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-12-04DOI: 10.1109/TED.2024.3497479
{"title":"Bridging the Data Gap in Photovoltaics with Synthetic Data Generation","authors":"","doi":"10.1109/TED.2024.3497479","DOIUrl":"https://doi.org/10.1109/TED.2024.3497479","url":null,"abstract":"","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"71 12","pages":"8043-8044"},"PeriodicalIF":2.9,"publicationDate":"2024-12-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10778167","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142789137","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Forksheet (FSH) field-effect transistors (FETs) have the potential to continue scaling beyond the 3-nm technology node. Here, we present a comprehensive analysis of the performance of hysteresis-free negative capacitance (NC)-FSH FET with a metal-ferroelectric–metal-insulator–semiconductor (MFMIS) structure. Adding a ferroelectric (FE) layer into the gate-stack of a conventional FSH FET can significantly boost device performance, enabling lower subthreshold swing (SS), higher on-current-to- off -current ( ${I}_{text {ON}}$ / ${I}_{text {OFF}}$ ) ratio, lower threshold voltage ( ${V}_{text {th}}$ ), higher transconductance ( ${g}_{text {m}}$ ), and faster switching. Device characteristics are obtained by combining the solutions of the 1-D Landau-Khalatnikov (L-K) equation with fully calibrated 3-D technology computer-aided design (TCAD) simulations. The proposed NC-FSH FET exhibits, on average, a ~3.46% increase in ${I}_{text {ON}}$ / ${I}_{text {OFF}}$ ratio, ~19.2% faster switching, and ~63% reduction in ${V}_{text {th}}$ compared to the baseline FSH FET. Furthermore, the NC-FSH FET achieves an SS as low as 29.76 mV/decade, which is a ~62% reduction from its baseline counterpart. Results also show the superiority of NC-FSH FET over NC-nanosheet (NSH) FET in terms of ${I}_{text {ON}}$ / ${I}_{text {OFF}}$ ratio and SS. Overall, introducing the NC effect in FSH FETs can add considerable power and performance benefits, while overcoming the scaling challenges associated with 3 nm and beyond manufacturing nodes.
{"title":"Analysis of Negative Capacitance Effect in Sub-3-nm Forksheet FETs","authors":"Yeasin Arafat Pritom;Hridita Biswas;Mainul Hossain","doi":"10.1109/TED.2024.3506503","DOIUrl":"https://doi.org/10.1109/TED.2024.3506503","url":null,"abstract":"Forksheet (FSH) field-effect transistors (FETs) have the potential to continue scaling beyond the 3-nm technology node. Here, we present a comprehensive analysis of the performance of hysteresis-free negative capacitance (NC)-FSH FET with a metal-ferroelectric–metal-insulator–semiconductor (MFMIS) structure. Adding a ferroelectric (FE) layer into the gate-stack of a conventional FSH FET can significantly boost device performance, enabling lower subthreshold swing (SS), higher on-current-to-\u0000<sc>off</small>\u0000-current (\u0000<inline-formula> <tex-math>${I}_{text {ON}}$ </tex-math></inline-formula>\u0000/\u0000<inline-formula> <tex-math>${I}_{text {OFF}}$ </tex-math></inline-formula>\u0000) ratio, lower threshold voltage (\u0000<inline-formula> <tex-math>${V}_{text {th}}$ </tex-math></inline-formula>\u0000), higher transconductance (\u0000<inline-formula> <tex-math>${g}_{text {m}}$ </tex-math></inline-formula>\u0000), and faster switching. Device characteristics are obtained by combining the solutions of the 1-D Landau-Khalatnikov (L-K) equation with fully calibrated 3-D technology computer-aided design (TCAD) simulations. The proposed NC-FSH FET exhibits, on average, a ~3.46% increase in \u0000<inline-formula> <tex-math>${I}_{text {ON}}$ </tex-math></inline-formula>\u0000/\u0000<inline-formula> <tex-math>${I}_{text {OFF}}$ </tex-math></inline-formula>\u0000 ratio, ~19.2% faster switching, and ~63% reduction in \u0000<inline-formula> <tex-math>${V}_{text {th}}$ </tex-math></inline-formula>\u0000 compared to the baseline FSH FET. Furthermore, the NC-FSH FET achieves an SS as low as 29.76 mV/decade, which is a ~62% reduction from its baseline counterpart. Results also show the superiority of NC-FSH FET over NC-nanosheet (NSH) FET in terms of \u0000<inline-formula> <tex-math>${I}_{text {ON}}$ </tex-math></inline-formula>\u0000/\u0000<inline-formula> <tex-math>${I}_{text {OFF}}$ </tex-math></inline-formula>\u0000 ratio and SS. Overall, introducing the NC effect in FSH FETs can add considerable power and performance benefits, while overcoming the scaling challenges associated with 3 nm and beyond manufacturing nodes.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"72 1","pages":"83-89"},"PeriodicalIF":2.9,"publicationDate":"2024-12-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142918439","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-12-03DOI: 10.1109/TED.2024.3508669
Dun-Bao Ruan;Kuei-Shu Chang-Liao;Huan Wu;Fu-Yang Chu;Po-Chun Wu;Zefu Zhao;Kai-Jhih Gan
An ozone-based plasma pretreatment was proposed to reduce the oxygen vacancy and unstable germanium (Ge) suboxide (GeO $_{x}text {)}$ at lower interface of interfacial layer (IL). With higher oxidizing ability of ozone and lower plasma damage in process, the formation of unstable GeOx at lower interface of IL can be effectively suppressed. The devices with a mixed hydrogen and ozone plasma (MHOP) pretreatment exhibit an ultrathin equivalent oxide thickness (EOT) of 0.57 nm, a fairly acceptable gate leakage current density of $3 times 10^{-{3}}$ A/cm2, lower interface trap density of $10^{{11}}$ cm $^{-{2}}cdot $ eV $^{-{1}}$ , and fewer border traps in Ge MOS capacitor. Also, a higher driver current of 1.4 mA, a lower subthreshold swing (SS) of 113 mV/dec, and higher on/off current ratio of $3.2 times 10^{{3}}$ for Ge MOSFET can be achieved with an MHOP treatment.
为了减少界面层（IL）下界面的氧空位和不稳定的锗（Ge）亚氧化物（GeO $_{x}text{）}$，提出了臭氧等离子体预处理方法。由于具有较高的臭氧氧化能力和较低的等离子体损伤，可以有效地抑制IL下界面不稳定GeOx的形成。采用混合氢臭氧等离子体（MHOP）预处理的器件具有0.57 nm的超薄等效氧化物厚度（EOT）、3 × 10^{-{3}}$ a /cm2的栅极漏电流密度、10^{{11}}$ cm $^{-{2}}cdot $ eV $^{-{1}}$较低的界面阱密度和较少的边界阱。此外，通过MHOP处理，可以实现更高的驱动电流1.4 mA，更低的亚阈值摆幅（SS）为113 mV/dec，以及更高的开/关电流比为3.2 × 10^{{3}}$。
{"title":"Oxidation State Modification in Gate Dielectric for Ge nMOSFET With Mixed Hydrogen and Ozone Plasma Pretreatments","authors":"Dun-Bao Ruan;Kuei-Shu Chang-Liao;Huan Wu;Fu-Yang Chu;Po-Chun Wu;Zefu Zhao;Kai-Jhih Gan","doi":"10.1109/TED.2024.3508669","DOIUrl":"https://doi.org/10.1109/TED.2024.3508669","url":null,"abstract":"An ozone-based plasma pretreatment was proposed to reduce the oxygen vacancy and unstable germanium (Ge) suboxide (GeO\u0000<inline-formula> <tex-math>$_{x}text {)}$ </tex-math></inline-formula>\u0000 at lower interface of interfacial layer (IL). With higher oxidizing ability of ozone and lower plasma damage in process, the formation of unstable GeOx at lower interface of IL can be effectively suppressed. The devices with a mixed hydrogen and ozone plasma (MHOP) pretreatment exhibit an ultrathin equivalent oxide thickness (EOT) of 0.57 nm, a fairly acceptable gate leakage current density of \u0000<inline-formula> <tex-math>$3 times 10^{-{3}}$ </tex-math></inline-formula>\u0000 A/cm2, lower interface trap density of \u0000<inline-formula> <tex-math>$10^{{11}}$ </tex-math></inline-formula>\u0000 cm\u0000<inline-formula> <tex-math>$^{-{2}}cdot $ </tex-math></inline-formula>\u0000eV\u0000<inline-formula> <tex-math>$^{-{1}}$ </tex-math></inline-formula>\u0000, and fewer border traps in Ge MOS capacitor. Also, a higher driver current of 1.4 mA, a lower subthreshold swing (SS) of 113 mV/dec, and higher on/off current ratio of \u0000<inline-formula> <tex-math>$3.2 times 10^{{3}}$ </tex-math></inline-formula>\u0000 for Ge MOSFET can be achieved with an MHOP treatment.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"72 1","pages":"57-61"},"PeriodicalIF":2.9,"publicationDate":"2024-12-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142918459","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-12-03DOI: 10.1109/TED.2024.3501255
Samuel Tlemsani;Stéphane Ricq;Olivier Marcelot;Emilie De Pretto;Jean-Pierre Carrere;Thomas Dalleau;Pierre Magnan
In a CMOS image sensor, the total dark current (DC) is the sum of several contributions that are difficult to discriminate, even if activation energies are extracted. For example, when considering the interface generation, there may still be ambiguities about which interface, whether the front-side, back-side, or trench isolation is dominant. Electrical characterizations on test structures are powerful tools for investigating specific interfaces and providing complementary information, such as passivation quality. In this work, chemical and field-effect passivation are studied using capacitance-voltage measurements on a dedicated test structure. Quantitative results are obtained, enabling the computation of DC based on the Shockley-Read–Hall (SRH) formalism. This model, which depends on the voltage applied to the trench, fits direct DC measurements.
{"title":"Capacitive Deep Trench Interface Characterizations and Dark Current Modeling for Photogate Pixels","authors":"Samuel Tlemsani;Stéphane Ricq;Olivier Marcelot;Emilie De Pretto;Jean-Pierre Carrere;Thomas Dalleau;Pierre Magnan","doi":"10.1109/TED.2024.3501255","DOIUrl":"https://doi.org/10.1109/TED.2024.3501255","url":null,"abstract":"In a CMOS image sensor, the total dark current (DC) is the sum of several contributions that are difficult to discriminate, even if activation energies are extracted. For example, when considering the interface generation, there may still be ambiguities about which interface, whether the front-side, back-side, or trench isolation is dominant. Electrical characterizations on test structures are powerful tools for investigating specific interfaces and providing complementary information, such as passivation quality. In this work, chemical and field-effect passivation are studied using capacitance-voltage measurements on a dedicated test structure. Quantitative results are obtained, enabling the computation of DC based on the Shockley-Read–Hall (SRH) formalism. This model, which depends on the voltage applied to the trench, fits direct DC measurements.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"72 1","pages":"37-43"},"PeriodicalIF":2.9,"publicationDate":"2024-12-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142918458","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
京公网安备 11010802042870号
京ICP备2023020795号-1
扫码关注我们
求助内容：
应助结果提醒方式：