We present a simulation study of vertically stacked 2-D nanosheet field-effect transistors (NSFETs). The aim of this investigation is to assess the performance and potential of FinFET alternatives, i.e., gate-all-around (GAA) nanosheet FET at the ultimate nanosheet thickness, using 2-D materials (2DMs). In particular, our numerical study specifically explores the potential of multilayer vertically stacked GAA MoS2 FETs, considering different geometries and device parameters (e.g., number of stacked nanosheets, spacer dimensions, doping, and so on) with the aim of providing guidelines for obtaining high-performance devices. Sources of nonideality that have been considered are the effects of contact resistance and line-edge roughness (LER), which significantly affect the overall performance of NSFETs. Finally, circuit performance has been benchmarked by calculating the energy per switching and worst case delay of a 32-bit full adder circuit.
{"title":"Simulation of Vertically Stacked 2-D Nanosheet FETs","authors":"Prabhat Kumar Dubey;Damiano Marian;Alejandro Toral-Lopez;Theresia Knobloch;Tibor Grasser;Gianluca Fiori","doi":"10.1109/TED.2025.3533474","DOIUrl":"https://doi.org/10.1109/TED.2025.3533474","url":null,"abstract":"We present a simulation study of vertically stacked 2-D nanosheet field-effect transistors (NSFETs). The aim of this investigation is to assess the performance and potential of FinFET alternatives, i.e., gate-all-around (GAA) nanosheet FET at the ultimate nanosheet thickness, using 2-D materials (2DMs). In particular, our numerical study specifically explores the potential of multilayer vertically stacked GAA MoS2 FETs, considering different geometries and device parameters (e.g., number of stacked nanosheets, spacer dimensions, doping, and so on) with the aim of providing guidelines for obtaining high-performance devices. Sources of nonideality that have been considered are the effects of contact resistance and line-edge roughness (LER), which significantly affect the overall performance of NSFETs. Finally, circuit performance has been benchmarked by calculating the energy per switching and worst case delay of a 32-bit full adder circuit.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"72 3","pages":"1494-1500"},"PeriodicalIF":2.9,"publicationDate":"2025-02-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10877270","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143580904","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
To enhance gate swing and reduce gate leakage in p-GaN gate high electron mobility transistors (HEMTs), this work introduces novel metal-insulator–semiconductor (MIS) p-GaN tunneling gate HEMTs with an ultrathin Al2O3 tunneling layer. By varying the oxygen sources of atomic layer deposition (ALD), as well as the Al2O3 thickness of the MIS structure, we demonstrate the following results: 1) overdose hydrogen introduced by Al2O3 deposition using H2O as oxygen source severely deactivates the Mg dopants, negatively shifts the threshold voltage ${V}_{text {TH}}$ , and undermines the dynamic performance; 2) the MIS structure can effectively boost the forward bias gate breakdown voltage ${V}_{text {G-BD}}$ ; 3) thick Al2O3 insulator of the MIS structure can, however, undermine the dynamic stability; and 4) MIS p-GaN tunneling gate HEMTs, with a 3-nm ultrathin Al2O3 insulator deposited using O3 as the oxygen source, exhibit an improved ${V}_{text {G-BD}}$ from 12 to 13.2 V, a suppressed gate leakage, an optimized ${V}_{text {TH}}$ from 1.8 to 2.2 V, and unaffected ${V}_{text {TH}}$ stability and dynamic ${R}_{text {on}}$ performances. This work not only exposes the drawbacks of the traditional MIS p-GaN gate HEMTs but also proposes a novel MIS p-GaN tunneling gate structure to dedicatedly balance the static and dynamic performance, thus providing a new option for fabricating high-reliability HEMTs.
{"title":"MIS p-GaN Tunneling Gate HEMTs on 6-In Si: A Novel Approach to Enhance Gate Reliability","authors":"Zhanfei Han;Xiangdong Li;Jian Ji;Qiushuang Li;Yuanhang Zhang;Lili Zhai;Hongyue Wang;Jingjing Chang;Shuzhen You;Zhihong Liu;Yue Hao;Jincheng Zhang","doi":"10.1109/TED.2025.3535475","DOIUrl":"https://doi.org/10.1109/TED.2025.3535475","url":null,"abstract":"To enhance gate swing and reduce gate leakage in p-GaN gate high electron mobility transistors (HEMTs), this work introduces novel metal-insulator–semiconductor (MIS) p-GaN tunneling gate HEMTs with an ultrathin Al2O3 tunneling layer. By varying the oxygen sources of atomic layer deposition (ALD), as well as the Al2O3 thickness of the MIS structure, we demonstrate the following results: 1) overdose hydrogen introduced by Al2O3 deposition using H2O as oxygen source severely deactivates the Mg dopants, negatively shifts the threshold voltage <inline-formula> <tex-math>${V}_{text {TH}}$ </tex-math></inline-formula>, and undermines the dynamic performance; 2) the MIS structure can effectively boost the forward bias gate breakdown voltage <inline-formula> <tex-math>${V}_{text {G-BD}}$ </tex-math></inline-formula>; 3) thick Al2O3 insulator of the MIS structure can, however, undermine the dynamic stability; and 4) MIS p-GaN tunneling gate HEMTs, with a 3-nm ultrathin Al2O3 insulator deposited using O3 as the oxygen source, exhibit an improved <inline-formula> <tex-math>${V}_{text {G-BD}}$ </tex-math></inline-formula> from 12 to 13.2 V, a suppressed gate leakage, an optimized <inline-formula> <tex-math>${V}_{text {TH}}$ </tex-math></inline-formula> from 1.8 to 2.2 V, and unaffected <inline-formula> <tex-math>${V}_{text {TH}}$ </tex-math></inline-formula> stability and dynamic <inline-formula> <tex-math>${R}_{text {on}}$ </tex-math></inline-formula> performances. This work not only exposes the drawbacks of the traditional MIS p-GaN gate HEMTs but also proposes a novel MIS p-GaN tunneling gate structure to dedicatedly balance the static and dynamic performance, thus providing a new option for fabricating high-reliability HEMTs.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"72 3","pages":"1060-1065"},"PeriodicalIF":2.9,"publicationDate":"2025-02-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143521326","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-02-04DOI: 10.1109/TED.2025.3534747
Wenrui Wei;Qing Li;Zhuangzhuang Xu;Jiachang Chen;Lu Chen;Huijun Guo;Peng Wang;Weida Hu
The short-wave infrared (SWIR) HgCdTe avalanche photodiodes (APDs) have demonstrated promising applications in low-flux and high-speed optical communication systems at high temperatures. However, the big gap between the theoretical highest gain-bandwidth product (GBP) and the reported performances indicates that there is still room for device optimization. In this work, numerical models were established for the 3-$mu $ m cutoff wavelength SWIR HgCdTe electron-initiated APDs (e-APDs) working at 140 K. The absorption and multiplication layer thickness dependence of the impulse response and multiplication gain has been characterized. Our results show that a thinner absorption and multiplication layer will enhance the bandwidth performance, and a mesa structure device can achieve a higher bandwidth compared to a planar one. The tradeoff between the bandwidth and multiplication gain was analyzed to optimize the GBP of the device. The structural optimization increases the device bandwidth from 300 to 750 MHz and achieved a 21-GHz GBP at 16 V bias. Specially, the high GBP and ability to maintain a low excess noise factor make HgCdTe APDs extremely valuable for high-quality signal transmission applications.
{"title":"Gain–Bandwidth Product Optimization of Short-Wavelength Infrared HgCdTe e-Avalanche Photodiodes","authors":"Wenrui Wei;Qing Li;Zhuangzhuang Xu;Jiachang Chen;Lu Chen;Huijun Guo;Peng Wang;Weida Hu","doi":"10.1109/TED.2025.3534747","DOIUrl":"https://doi.org/10.1109/TED.2025.3534747","url":null,"abstract":"The short-wave infrared (SWIR) HgCdTe avalanche photodiodes (APDs) have demonstrated promising applications in low-flux and high-speed optical communication systems at high temperatures. However, the big gap between the theoretical highest gain-bandwidth product (GBP) and the reported performances indicates that there is still room for device optimization. In this work, numerical models were established for the 3-<inline-formula> <tex-math>$mu $ </tex-math></inline-formula>m cutoff wavelength SWIR HgCdTe electron-initiated APDs (e-APDs) working at 140 K. The absorption and multiplication layer thickness dependence of the impulse response and multiplication gain has been characterized. Our results show that a thinner absorption and multiplication layer will enhance the bandwidth performance, and a mesa structure device can achieve a higher bandwidth compared to a planar one. The tradeoff between the bandwidth and multiplication gain was analyzed to optimize the GBP of the device. The structural optimization increases the device bandwidth from 300 to 750 MHz and achieved a 21-GHz GBP at 16 V bias. Specially, the high GBP and ability to maintain a low excess noise factor make HgCdTe APDs extremely valuable for high-quality signal transmission applications.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"72 3","pages":"1254-1258"},"PeriodicalIF":2.9,"publicationDate":"2025-02-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143521341","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
In this study, the instability of heterogeneous Ga2O3-on-SiC (GaOSiC) MOSFETs under unipolar positive/negative bias stress (UPBS/UNBS) was investigated systematically. By adjusting key parameters of stress voltage waveform, including frequency (f), holding time (${t} _{text {h}}$ ), rising time (${t} _{text {r}}$ ), and falling time (${t} _{text {f}}$ ), a two-phase shift in threshold voltage (${V} _{text {T}}$ ) with cycle number (${C} _{n}$ ) was observed in the UPBS measurement. The UPBS-induced positive ${V} _{text {T}}$ shift is primarily attributed to electron trapping by traps at/near the Al2O3/$beta $ -Ga2O3 interface during the ${t} _{text {r}}$ transient. At the beginning of UPBS test (first phase of degradation), most trap states are unoccupied and the electron trapping is predominant, leading to similar ${V} _{text {T}}$ shifts in different stress conditions. With ${C} _{n}$ further increasing (second phase of degradation), deeper level traps begin trapping electrons due to the accumulation effect, which has been found to have a strong correlation with ${t} _{text {f}}$ . Notably, a monotonic positive shift in ${V} _{text {T}}$ was also observed in the UNBS measurement. This ${V} _{text {T}}$ shift under UNBS was modeled using a stretched exponential equation. Parameters of this equation were used to characterize the rate and magnitude of ${V} _{text {T}}$ degradation under various stress conditions, elucidating the significant role of f and ${t} _{text {r}}$ in the ${V} _{text {T}}$ degradation of GaOSiC MOSFET. TCAD simulations suggest that the monotonic positive shift in ${V} _{text {T}}$ under UNBS is caused by electron trapping at the $beta $ -Ga2O3/SiC interfacial layer, which contains a high density of traps.
{"title":"Unique Monotonic Positive Shifts in Threshold Voltages of Ga₂O₃-on-SiC MOSFETs Under Both Unipolar Positive and Negative Bias Stresses","authors":"Chenyu Liu;Bochang Li;Yibo Wang;Wenhui Xu;Chunxiao Yu;Haodong Hu;Xiaole Jia;Shuqi Huang;Zeyu Yang;Xiaoxi Li;Zhengdong Luo;Cizhe Fang;Yan Liu;Tiangui You;Xin Ou;Yue Hao;Genquan Han","doi":"10.1109/TED.2025.3534742","DOIUrl":"https://doi.org/10.1109/TED.2025.3534742","url":null,"abstract":"In this study, the instability of heterogeneous Ga2O3-on-SiC (GaOSiC) MOSFETs under unipolar positive/negative bias stress (UPBS/UNBS) was investigated systematically. By adjusting key parameters of stress voltage waveform, including frequency (f), holding time (<inline-formula> <tex-math>${t} _{text {h}}$ </tex-math></inline-formula>), rising time (<inline-formula> <tex-math>${t} _{text {r}}$ </tex-math></inline-formula>), and falling time (<inline-formula> <tex-math>${t} _{text {f}}$ </tex-math></inline-formula>), a two-phase shift in threshold voltage (<inline-formula> <tex-math>${V} _{text {T}}$ </tex-math></inline-formula>) with cycle number (<inline-formula> <tex-math>${C} _{n}$ </tex-math></inline-formula>) was observed in the UPBS measurement. The UPBS-induced positive <inline-formula> <tex-math>${V} _{text {T}}$ </tex-math></inline-formula> shift is primarily attributed to electron trapping by traps at/near the Al2O3/<inline-formula> <tex-math>$beta $ </tex-math></inline-formula>-Ga2O3 interface during the <inline-formula> <tex-math>${t} _{text {r}}$ </tex-math></inline-formula> transient. At the beginning of UPBS test (first phase of degradation), most trap states are unoccupied and the electron trapping is predominant, leading to similar <inline-formula> <tex-math>${V} _{text {T}}$ </tex-math></inline-formula> shifts in different stress conditions. With <inline-formula> <tex-math>${C} _{n}$ </tex-math></inline-formula> further increasing (second phase of degradation), deeper level traps begin trapping electrons due to the accumulation effect, which has been found to have a strong correlation with <inline-formula> <tex-math>${t} _{text {f}}$ </tex-math></inline-formula>. Notably, a monotonic positive shift in <inline-formula> <tex-math>${V} _{text {T}}$ </tex-math></inline-formula> was also observed in the UNBS measurement. This <inline-formula> <tex-math>${V} _{text {T}}$ </tex-math></inline-formula> shift under UNBS was modeled using a stretched exponential equation. Parameters of this equation were used to characterize the rate and magnitude of <inline-formula> <tex-math>${V} _{text {T}}$ </tex-math></inline-formula> degradation under various stress conditions, elucidating the significant role of f and <inline-formula> <tex-math>${t} _{text {r}}$ </tex-math></inline-formula> in the <inline-formula> <tex-math>${V} _{text {T}}$ </tex-math></inline-formula> degradation of GaOSiC MOSFET. TCAD simulations suggest that the monotonic positive shift in <inline-formula> <tex-math>${V} _{text {T}}$ </tex-math></inline-formula> under UNBS is caused by electron trapping at the <inline-formula> <tex-math>$beta $ </tex-math></inline-formula>-Ga2O3/SiC interfacial layer, which contains a high density of traps.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"72 3","pages":"1047-1052"},"PeriodicalIF":2.9,"publicationDate":"2025-02-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143521550","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
We experimentally demonstrate a back-end-of-line (BEOL) compatible InGaZnOx (IGZO)-based ferroelectric-modulated diode (FMD), showcasing effective enhancement of the memory window (MW) compared to ferroelectric field-effect transistor (FeFET) fabricated under identical process conditions. In addition, we establish a modeling framework elucidating the interplay between ferroelectric (FE) polarization and Schottky contact to reproduce the energy barrier modulation effect. A comparative analysis of MW formation mechanisms between conventional oxide semiconductor (OS) FeFETs and our novel FMDs is conducted, validating the performance improvements of our FMD devices by overcoming the weak erase problem of OS FeFETs. Furthermore, we carry out a systematic investigation into the structural dependence of the FMD MW by varying the Schottky metalwork functions and the semiconductor layer thicknesses. These critical insights, supported by both experiments and simulations, provide a design guideline for optimizing MW of BEOL-compatible FE memories to meet the requirements of future nonvolatile memory (NVM) applications.
{"title":"Experimental Demonstration and Modeling of BEOL-Compatible IGZO-Based Ferroelectric-Modulated Diodes","authors":"Leming Jiao;Zuopu Zhou;Zijie Zheng;Kaizhen Han;Qiwen Kong;Xiaolin Wang;Haiwen Xu;Jishen Zhang;Chen Sun;Yuye Kang;Gengchiau Liang;Xiao Gong","doi":"10.1109/TED.2025.3534182","DOIUrl":"https://doi.org/10.1109/TED.2025.3534182","url":null,"abstract":"We experimentally demonstrate a back-end-of-line (BEOL) compatible InGaZnOx (IGZO)-based ferroelectric-modulated diode (FMD), showcasing effective enhancement of the memory window (MW) compared to ferroelectric field-effect transistor (FeFET) fabricated under identical process conditions. In addition, we establish a modeling framework elucidating the interplay between ferroelectric (FE) polarization and Schottky contact to reproduce the energy barrier modulation effect. A comparative analysis of MW formation mechanisms between conventional oxide semiconductor (OS) FeFETs and our novel FMDs is conducted, validating the performance improvements of our FMD devices by overcoming the weak erase problem of OS FeFETs. Furthermore, we carry out a systematic investigation into the structural dependence of the FMD MW by varying the Schottky metalwork functions and the semiconductor layer thicknesses. These critical insights, supported by both experiments and simulations, provide a design guideline for optimizing MW of BEOL-compatible FE memories to meet the requirements of future nonvolatile memory (NVM) applications.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"72 3","pages":"1146-1153"},"PeriodicalIF":2.9,"publicationDate":"2025-02-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143521330","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
This article investigated the total ionizing dose (TID) effects on the metal-semiconductor-metal (MSM) $beta $ -Ga2O3 solar-blind ultraviolet photodetector under bias conditions through photoelectric response tests. The photocurrent and dark current of the device exhibited a notable increase after 2 Mrad(Si) TID irradiation. The TID irradiation caused a slight degradation in a photo-to-dark current ratio (PDCR). Additionally, microscopic characteristic changes and degradation mechanisms due to TID irradiation were evaluated using Raman spectroscopy, atomic force microscopy (AFM), and X-ray photoelectron spectroscopy (XPS). The TID-induced oxygen vacancy defect in the $beta $ -Ga2O3 film increased both the photocurrent and dark current of the device. This study demonstrated the outstanding TID radiation tolerance of biased $beta $ -Ga2O3 solar-blind ultraviolet photodetectors, highlighting their significant potential for applications in the field of optoelectronics under extreme environmental conditions.
{"title":"Total Ionizing Dose Responses of β-Ga₂O₃ Thin Film Solar-Blind Ultraviolet Photodetectors","authors":"Tao Xiao;Teng Ma;Zhifeng Lei;Weili Fu;Hong Zhang;Chao Peng;Zhangang Zhang;Hongjia Song;Zhao Fu;Daoyou Guo;Xiangli Zhong;Jinbin Wang;Xiaoping Ouyang","doi":"10.1109/TED.2025.3534175","DOIUrl":"https://doi.org/10.1109/TED.2025.3534175","url":null,"abstract":"This article investigated the total ionizing dose (TID) effects on the metal-semiconductor-metal (MSM) <inline-formula> <tex-math>$beta $ </tex-math></inline-formula>-Ga2O3 solar-blind ultraviolet photodetector under bias conditions through photoelectric response tests. The photocurrent and dark current of the device exhibited a notable increase after 2 Mrad(Si) TID irradiation. The TID irradiation caused a slight degradation in a photo-to-dark current ratio (PDCR). Additionally, microscopic characteristic changes and degradation mechanisms due to TID irradiation were evaluated using Raman spectroscopy, atomic force microscopy (AFM), and X-ray photoelectron spectroscopy (XPS). The TID-induced oxygen vacancy defect in the <inline-formula> <tex-math>$beta $ </tex-math></inline-formula>-Ga2O3 film increased both the photocurrent and dark current of the device. This study demonstrated the outstanding TID radiation tolerance of biased <inline-formula> <tex-math>$beta $ </tex-math></inline-formula>-Ga2O3 solar-blind ultraviolet photodetectors, highlighting their significant potential for applications in the field of optoelectronics under extreme environmental conditions.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"72 3","pages":"1249-1253"},"PeriodicalIF":2.9,"publicationDate":"2025-02-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143521414","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
The application of scandate cathode with high emission current density in microwave vacuum electronic devices is constrained by issues of poor emission uniformity and reproducibility. An effective strategy to enhance the emission performance of scandate cathodes is through the doping of additional elements. This article prepared yttrium-doped scandate cathodes and investigated the mechanism of yttrium affecting cathode emission performance via impregnant composition analysis, cathode emission property testing, surface element analysis, and density functional theory (DFT) calculations of surface work function and adsorption energy. As the yttrium content increases from 0 to 6 atom%, the total amount of aluminate compounds remains above 85%. The content of Ba2ScAlO5 in impregnant increased first and then decreased, while cathode emission property test results also increased first and then declined. The cathode with yttrium content of 3 atom% in impregnant has the best emission property, with an emission current density of 466.4 A/cm2 at 2000 V pulse voltage under 1100 ° Cb, the practical work function of 1.64–1.68 eV. The theoretical surface work function of the ${x} = 3$ cathode is 1.67 eV, and the theoretical adsorption energy indicates a low evaporation rate on the surface of yttrium atoms during cathode operation. It can be inferred that the doping of yttrium has a visible impact on the composition of the impregnant. An appropriate amount of yttrium doping facilitates the formation of Ba2 ScAlO5 and enhances cathode emission properties, while superfluous yttrium inhibits Ba2ScAlO5 formation and results in an increased presence of BaY2O4 in impregnant, reducing the coverage of Ba atoms on the cathode surface, suppressing the enhancement of cathode emission performance.
{"title":"Preparation and Emission Performance Investigation of Yttrium-Doped Impregnated Scandate Cathode","authors":"Ruoqi Zhang;Shixian Ding;Xiaoxia Wang;Feng Ren;Shengyi Yin","doi":"10.1109/TED.2025.3534154","DOIUrl":"https://doi.org/10.1109/TED.2025.3534154","url":null,"abstract":"The application of scandate cathode with high emission current density in microwave vacuum electronic devices is constrained by issues of poor emission uniformity and reproducibility. An effective strategy to enhance the emission performance of scandate cathodes is through the doping of additional elements. This article prepared yttrium-doped scandate cathodes and investigated the mechanism of yttrium affecting cathode emission performance via impregnant composition analysis, cathode emission property testing, surface element analysis, and density functional theory (DFT) calculations of surface work function and adsorption energy. As the yttrium content increases from 0 to 6 atom%, the total amount of aluminate compounds remains above 85%. The content of Ba2ScAlO5 in impregnant increased first and then decreased, while cathode emission property test results also increased first and then declined. The cathode with yttrium content of 3 atom% in impregnant has the best emission property, with an emission current density of 466.4 A/cm2 at 2000 V pulse voltage under 1100 ° Cb, the practical work function of 1.64–1.68 eV. The theoretical surface work function of the <inline-formula> <tex-math>${x} = 3$ </tex-math></inline-formula> cathode is 1.67 eV, and the theoretical adsorption energy indicates a low evaporation rate on the surface of yttrium atoms during cathode operation. It can be inferred that the doping of yttrium has a visible impact on the composition of the impregnant. An appropriate amount of yttrium doping facilitates the formation of Ba2 ScAlO5 and enhances cathode emission properties, while superfluous yttrium inhibits Ba2ScAlO5 formation and results in an increased presence of BaY2O4 in impregnant, reducing the coverage of Ba atoms on the cathode surface, suppressing the enhancement of cathode emission performance.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"72 3","pages":"1427-1434"},"PeriodicalIF":2.9,"publicationDate":"2025-02-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143521524","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
In this study, the drain-dependent dynamic ${V}_{text {th}}$ in Schottky-type p-GaN gate HEMT is investigated using a trapezoid-wave-based extraction method, revealing the combined influences of drain stress (${V}_{text {DS-off}}$ ), gate stress (${V}_{text {GS-on}}$ ), and the drain bias, at which ${V}_{text {th}}$ is measured (${V}_{text {DS-M}}$ ). In the first part of study, the effect of gate stress is minimized by using ${V}_{text {GS-off}}$ /${V}_{text {GS-on}} =0$ V/+3 V. With ${V}_{text {DS-off}}$ /${V}_{text {DS-M}} =390$ /380 V, the device exhibits a severe gate/drain coupled barrier lowering (GDCBL) effect, as is manifested by a negative ${V}_{text {th}}$ shift of −0.65 V. With ${V}_{text {DS-off}}$ /${V}_{text {DS-M}} =390$ /1 V, the devices suffer from a negative charge storage in the floating p-GaN layer, as manifested by a positive ${V}_{text {th}}$ shift of +0.87 V. In the second part, the effect of gate stress is included by using ${V}_{text {GS-off}}$ /${V}_{text {GS-on}}= -3$ V/+6 V, which is expected to add to the negative charge storage effect. With ${V}_{text {DS-off}}$ /${V}_{text {DS-M}} =390$ /380 V, the device exhibits a smaller negative ${V}_{text {th}}$ shift of −0.23 V. With ${V}_{text {DS-off}}$ /${V}_{text {DS-M}} =390$ /1 V, the device exhibits a larger positive ${V}_{text {th}}$ shift of −1.35 V. The result indicates that the dynamic ${V}_{text {th}}$ of the device varies bidirectionally with ${V}_{text {DS}}$ in a switching process, and the shift is highly influenced by the operation condition of the device [i.e., whether the device is operated as a standard power switch (SW) or a field-effect rectifier].
{"title":"Full-Range Investigation of Drain-Dependent Bidirectional Dynamic Threshold Voltage Shift in Schottky-Type p-GaN Gate HEMT","authors":"Muqin Nuo;Ming Zhong;Zetao Fan;Yunhong Lao;Lifeng Liu;Maojun Wang;Jin Wei","doi":"10.1109/TED.2025.3534155","DOIUrl":"https://doi.org/10.1109/TED.2025.3534155","url":null,"abstract":"In this study, the drain-dependent dynamic <inline-formula> <tex-math>${V}_{text {th}}$ </tex-math></inline-formula> in Schottky-type p-GaN gate HEMT is investigated using a trapezoid-wave-based extraction method, revealing the combined influences of drain stress (<inline-formula> <tex-math>${V}_{text {DS-off}}$ </tex-math></inline-formula>), gate stress (<inline-formula> <tex-math>${V}_{text {GS-on}}$ </tex-math></inline-formula>), and the drain bias, at which <inline-formula> <tex-math>${V}_{text {th}}$ </tex-math></inline-formula> is measured (<inline-formula> <tex-math>${V}_{text {DS-M}}$ </tex-math></inline-formula>). In the first part of study, the effect of gate stress is minimized by using <inline-formula> <tex-math>${V}_{text {GS-off}}$ </tex-math></inline-formula>/<inline-formula> <tex-math>${V}_{text {GS-on}} =0$ </tex-math></inline-formula> V/+3 V. With <inline-formula> <tex-math>${V}_{text {DS-off}}$ </tex-math></inline-formula>/<inline-formula> <tex-math>${V}_{text {DS-M}} =390$ </tex-math></inline-formula>/380 V, the device exhibits a severe gate/drain coupled barrier lowering (GDCBL) effect, as is manifested by a negative <inline-formula> <tex-math>${V}_{text {th}}$ </tex-math></inline-formula> shift of −0.65 V. With <inline-formula> <tex-math>${V}_{text {DS-off}}$ </tex-math></inline-formula>/<inline-formula> <tex-math>${V}_{text {DS-M}} =390$ </tex-math></inline-formula>/1 V, the devices suffer from a negative charge storage in the floating p-GaN layer, as manifested by a positive <inline-formula> <tex-math>${V}_{text {th}}$ </tex-math></inline-formula> shift of +0.87 V. In the second part, the effect of gate stress is included by using <inline-formula> <tex-math>${V}_{text {GS-off}}$ </tex-math></inline-formula>/<inline-formula> <tex-math>${V}_{text {GS-on}}= -3$ </tex-math></inline-formula> V/+6 V, which is expected to add to the negative charge storage effect. With <inline-formula> <tex-math>${V}_{text {DS-off}}$ </tex-math></inline-formula>/<inline-formula> <tex-math>${V}_{text {DS-M}} =390$ </tex-math></inline-formula>/380 V, the device exhibits a smaller negative <inline-formula> <tex-math>${V}_{text {th}}$ </tex-math></inline-formula> shift of −0.23 V. With <inline-formula> <tex-math>${V}_{text {DS-off}}$ </tex-math></inline-formula>/<inline-formula> <tex-math>${V}_{text {DS-M}} =390$ </tex-math></inline-formula>/1 V, the device exhibits a larger positive <inline-formula> <tex-math>${V}_{text {th}}$ </tex-math></inline-formula> shift of −1.35 V. The result indicates that the dynamic <inline-formula> <tex-math>${V}_{text {th}}$ </tex-math></inline-formula> of the device varies bidirectionally with <inline-formula> <tex-math>${V}_{text {DS}}$ </tex-math></inline-formula> in a switching process, and the shift is highly influenced by the operation condition of the device [i.e., whether the device is operated as a standard power switch (SW) or a field-effect rectifier].","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"72 3","pages":"1021-1026"},"PeriodicalIF":2.9,"publicationDate":"2025-02-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143521542","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-02-04DOI: 10.1109/TED.2025.3532410
Huimin Geng;Enhao Guan;Jianqun Yang;Gang Lv;Weiqi Li;Zhongli Liu;Wenzhu Shao;Xingji Li
The evolution states of Si-SiO2 interface traps have been attracting much attention, but there are few reports on the recombination enhanced defect reaction (REDR) effect at interface traps. Here, the REDR effect is studied at the Si-SiO2 interface in the base region of gate-controlled lateral p-n-p transistors (GLPNPs) by forward bias method. There is a significant correlation between the peak variation and the ionization defects (oxide charges and interface traps) in gate sweep (GS) curve. For GLPNPs with high oxide charges and low interface traps, the change rate of surface recombination current at peak in GS curve is smaller. This result provides strong evidence for the REDR effect of interface traps. In addition, based on technology computer-aided design (TCAD) simulation, the possible change of interface traps state after REDR effect is proposed.
{"title":"New Evidence for Nonradiative Recombination Enhanced Defect Reaction Effect at Si-SiO₂ Interface Traps","authors":"Huimin Geng;Enhao Guan;Jianqun Yang;Gang Lv;Weiqi Li;Zhongli Liu;Wenzhu Shao;Xingji Li","doi":"10.1109/TED.2025.3532410","DOIUrl":"https://doi.org/10.1109/TED.2025.3532410","url":null,"abstract":"The evolution states of Si-SiO2 interface traps have been attracting much attention, but there are few reports on the recombination enhanced defect reaction (REDR) effect at interface traps. Here, the REDR effect is studied at the Si-SiO2 interface in the base region of gate-controlled lateral p-n-p transistors (GLPNPs) by forward bias method. There is a significant correlation between the peak variation and the ionization defects (oxide charges and interface traps) in gate sweep (GS) curve. For GLPNPs with high oxide charges and low interface traps, the change rate of surface recombination current at peak in GS curve is smaller. This result provides strong evidence for the REDR effect of interface traps. In addition, based on technology computer-aided design (TCAD) simulation, the possible change of interface traps state after REDR effect is proposed.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"72 3","pages":"965-970"},"PeriodicalIF":2.9,"publicationDate":"2025-02-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143521556","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
A multiscale model that determines self-heating effect (SHE)-induced and mechanical deformation-accelerated trap generation and also assesses its impact on dielectric breakdown (BD) in hafnium-oxide (HfO2)/(interfacial)silicon dioxide (SiO2)-based gate-stack in a 5-nm stacked nanosheet field effect transistor (SNFET) has been developed here. Initially, T-CAD thermodynamic (TD) simulation was performed to estimate nonuniform SHE across SNFET under applied SHE bias, which was later supplemented by a multiphysics-based simulation as was executed to extract process (anneal) derived residual stresses from both silicon nanosheets and surrounded dielectric layers. Furthermore, simulated deformation profiles were provided as inputs to an ab initio simulation module, which calculated the spatial variations of defect [neutral oxygen vacancies (NOVs)] formation energies (FEs) either across HfO2 or (interfacial) SiO2 molecules. Updated FEs and local temperatures of dielectrics due to SHE in SNFET were then fed as inputs to a standard thermochemical trap generation model for profiling trap generation rates within the dielectric layers. Later, the critical path (CP) of dielectric BD was assessed by a shortest path search algorithm, which estimated the costs of all probable percolating paths through joining the trap generation sites between gate and nanosheet channels and then organized them as per their precedence for analyzing the critical BD path.
{"title":"Multiscale Modeling of Self-Heating-Induced and Deformation-Accelerated Dielectric Traps Impacting Critical Path of Dielectric Breakdown in 5-nm Stacked Nanosheet FET","authors":"Vivek Kumar;Deepak Kumar Sharma;Sudeb Dasgupta;Arnab Datta","doi":"10.1109/TED.2025.3535680","DOIUrl":"https://doi.org/10.1109/TED.2025.3535680","url":null,"abstract":"A multiscale model that determines self-heating effect (SHE)-induced and mechanical deformation-accelerated trap generation and also assesses its impact on dielectric breakdown (BD) in hafnium-oxide (HfO2)/(interfacial)silicon dioxide (SiO2)-based gate-stack in a 5-nm stacked nanosheet field effect transistor (SNFET) has been developed here. Initially, T-CAD thermodynamic (TD) simulation was performed to estimate nonuniform SHE across SNFET under applied SHE bias, which was later supplemented by a multiphysics-based simulation as was executed to extract process (anneal) derived residual stresses from both silicon nanosheets and surrounded dielectric layers. Furthermore, simulated deformation profiles were provided as inputs to an ab initio simulation module, which calculated the spatial variations of defect [neutral oxygen vacancies (NOVs)] formation energies (FEs) either across HfO2 or (interfacial) SiO2 molecules. Updated FEs and local temperatures of dielectrics due to SHE in SNFET were then fed as inputs to a standard thermochemical trap generation model for profiling trap generation rates within the dielectric layers. Later, the critical path (CP) of dielectric BD was assessed by a shortest path search algorithm, which estimated the costs of all probable percolating paths through joining the trap generation sites between gate and nanosheet channels and then organized them as per their precedence for analyzing the critical BD path.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"72 3","pages":"1293-1300"},"PeriodicalIF":2.9,"publicationDate":"2025-02-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143519864","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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