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ASEMD2023 – Introduction ASEMD2023 - 简介
IF 1.7 3区 物理与天体物理 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2024-11-21 DOI: 10.1109/TASC.2024.3485319
Jian Xun Jin
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引用次数: 0
A Broadband Mechanically Tuned Superconducting Cavity Design Suitable for the Fermilab Main Injector 适合费米实验室主注入器的宽带机械调谐超导腔体设计
IF 1.7 3区 物理与天体物理 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2024-11-12 DOI: 10.1109/TASC.2024.3491418
Brian J. Vaughn
Radio Frequency superconductivity has been a mainstay of accelerator science for decades. However, its benefits have yet to be applied to proton synchrotrons with demanding tuning requirements. For example, the Main Injector (MI), Fermilab's high-energy proton synchrotron, currently utilizes 20+ ferrite-loaded cavities for a targeted 1.2 s acceleration cycle. Harnessing the extremely high gradients associated with superconductivity, the required number of cavities could be reduced by an order of magnitude, dramatically lowering operational power requirements even with cryogenic considerations. Additionally, the current plans for the Fermilab accelerator complex evolution initiative involve almost doubling the number of cavities in MI if the same designs are to be used, further highlighting the potential benefits of superconductivity. These advantages are attractive, but to date, no tunable superconducting cavity suitable for MI has been proposed due to the incompatibility of conventional broadband tuning methods with superconductivity. Here, we present a tunable superconducting cavity concept capable of record-breaking performance. Tuning will be accomplished by using high-speed linear actuators to vary the insertion depth of metallic plungers into the cavity volume. This tuning concept is theoretically viable with currently available technology and will be fully compatible with a superconducting cavity.
几十年来,射频超导一直是加速器科学的支柱。然而,它的优势尚未应用于对调谐要求苛刻的质子同步加速器。例如,费米实验室的高能质子同步加速器 "主注入器"(MI)目前使用 20 多个铁氧体空腔来实现 1.2 秒的目标加速周期。利用与超导相关的极高梯度,所需的空腔数量可以减少一个数量级,即使考虑到低温因素,也能显著降低运行功率要求。此外,费米实验室加速器综合体进化计划的当前计划涉及,如果使用相同的设计,MI 中的空腔数量将增加几乎一倍,这进一步凸显了超导的潜在优势。这些优势非常吸引人,但由于传统的宽带调谐方法与超导不兼容,迄今为止还没有提出适合 MI 的可调谐超导腔。在这里,我们提出了一种可调谐超导腔概念,它能够实现破纪录的性能。调谐将通过使用高速线性致动器来改变金属柱塞插入腔体的深度来实现。这种调谐概念在理论上是可行的,目前已有的技术也可以实现,而且与超导腔完全兼容。
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引用次数: 0
A High-Temperature Superconducting Triplexer Based on Co-Coupling of Multimode Resonators 基于多模谐振器共耦合的高温超导三合一器
IF 1.7 3区 物理与天体物理 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2024-11-06 DOI: 10.1109/TASC.2024.3492545
Yan Shaoqi;Wei Xie;Li Jinding;Long Teng;Xiaoling Zhang;Qingduan Meng;Chi Zhang;Jia Wang;Chunguang Li;Yun Wu;Xu Wang;Liang Sun
This article presents a miniaturized C-band high-temperature superconducting triplexer. The triplexer is composed of multimode resonators and adopts the co-coupling structure to reduce its size. Furthermore, the co-coupling structure voids designing the impedance matching structure of triplexers adopting branch line structures and improves the design efficiency of triplexers. Besides, the isolation of the triplexer has been effectively improved by adjusting the coupling between resonators without increasing its size. The measured results show that the center frequencies of the triplexer are 5.503, 6.002, and 6.500 GHz, with relative bandwidths of 1.113%, 1.155%, and 1.115%, respectively. The insertion losses are 0.53, 0.28, and 0.37 dB, respectively. The isolations between channels are larger than 33.9 dB. The adopted approaches benefit to design miniaturized triplexers with high performance.
本文介绍了一种小型化 C 波段高温超导三工器。该三重器由多模谐振器组成,采用共耦合结构以减小体积。此外,共耦合结构避免了采用分支线结构的三工器的阻抗匹配结构设计,提高了三工器的设计效率。此外,通过调整谐振器之间的耦合,在不增加体积的情况下有效提高了三工器的隔离度。测量结果表明,三工器的中心频率分别为 5.503、6.002 和 6.500 GHz,相对带宽分别为 1.113%、1.155% 和 1.115%。插入损耗分别为 0.53、0.28 和 0.37 dB。通道之间的隔离度大于 33.9 dB。所采用的方法有利于设计出具有高性能的小型化三工器。
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引用次数: 0
A Drag-Torque Method for Measuring AC Losses in Superconducting Samples 测量超导样品交流损耗的拖曳力矩法
IF 1.7 3区 物理与天体物理 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2024-10-29 DOI: 10.1109/TASC.2024.3487978
Ning Zhang;John R. Hull
AC losses in high-temperature superconductors are considered a major obstacle in the development of fully superconducting machines. Current methods for measuring ac losses can be difficult to implement for superconducting samples that are large or have complex geometries. This article presents a new method, known as the drag-torque method, for measuring ac losses. The present measurement system involves suspending the superconducting sample holder, which is cooled by liquid nitrogen, in the air using a pair of air-bearing journals. When the sample is placed in a rotating magnetic field generated by a permanent magnet rotor, ac losses are induced in the superconducting material. As a result, the sample holder tends to rotate with the permanent magnet rotor and is stopped by a load cell. By measuring the torque exerted on the load cell, the ac losses can be calculated. This method can be applied to complex superconducting samples, such as coils and stacks of superconducting tapes.
高温超导体中的交流损耗被认为是开发全超导机器的主要障碍。对于大型或几何形状复杂的超导样品,目前的交流损耗测量方法很难实现。本文介绍了一种测量交流损耗的新方法,即拖曳力矩法。目前的测量系统包括使用一对空气轴承轴颈将由液氮冷却的超导样品支架悬挂在空气中。当样品置于永磁转子产生的旋转磁场中时,超导材料中会产生交流损耗。因此,样品支架会随永磁转子一起旋转,并由一个称重传感器停止。通过测量施加在传感器上的扭矩,可以计算出交流损耗。这种方法可用于复杂的超导样品,如线圈和超导带堆。
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引用次数: 0
4-Bit Factorization Circuit Composed of Multiplier Units With Superconducting Flux Qubits Toward Quantum Annealing 由带有超导通量微微子的乘法器单元组成的 4 位因式分解电路实现量子退火
IF 1.7 3区 物理与天体物理 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2024-10-25 DOI: 10.1109/TASC.2024.3486791
Daisuke Saida;Mutsuo Hidaka;Yuki Yamanashi
Prime factorization (P = M × N) is considered to be a promising application in quantum computations. We perform 4-bit factorization in experiments using a superconducting flux qubit toward quantum annealing (QA). Our proposed method uses a superconducting quantum circuit implementing a multiplier Hamiltonian, which provides combinations of M and N as a factorization solution after QA when the integer P is initially set. The circuit comprises multiple multiplier units (MUs) combined with connection qubits. The key points are a native implementation of the multiplier Hamiltonian to the superconducting quantum circuit and its fabrication using a Nb multilayer process with a Josephson junction dedicated to the qubit. The 4-bit factorization circuit comprises 32 superconducting flux qubits. Our method has superior scalability because the Hamiltonian is implemented with fewer qubits than in conventional methods using a chimera graph architecture. We perform experiments at 10 mK to clarify the validity of interconnections of a MU using qubits. We demonstrate experiments at 4.2 K and simulations for the factorization of integers four, six, and nine.
质数因式分解(P = M × N)被认为是量子计算中的一项前景广阔的应用。我们在实验中使用超导通量量子比特进行量子退火(QA),实现了 4 位因式分解。我们提出的方法使用一个超导量子电路来实现乘法器哈密顿,当整数 P 初始设定时,该电路在 QA 之后提供 M 和 N 的组合作为因式分解解。电路由多个乘法器单元(MU)和连接量子比特组成。其关键点在于将乘法器哈密顿原生实现到超导量子电路中,并采用铌多层工艺和量子比特专用约瑟夫森结进行制造。4 位因式分解电路由 32 个超导通量量子比特组成。与使用嵌合图架构的传统方法相比,我们的方法用更少的量子位实现了哈密顿,因此具有更优越的可扩展性。我们在 10 mK 下进行了实验,以澄清使用量子比特的 MU 相互连接的有效性。我们演示了在 4.2 K 条件下进行的实验,以及对整数四、六和九的因式分解进行的模拟。
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引用次数: 0
On-Chip Frequency Multiplication Using Kinetic Inductance Within a Coplanar Waveguide 利用共面波导内的动感进行片上频率倍增
IF 1.7 3区 物理与天体物理 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2024-10-24 DOI: 10.1109/TASC.2024.3486249
Grant Giesbrecht;Nathan E. Flowers-Jacobs;Adam Sirois;Manuel A. Castellanos-Beltran;Michael Vissers;Jiansong Gao;Taylor Barton;Paul Dresselhaus
This article presents a method of frequency multiplication which exploits the kinetic inductance of a superconducting coplanar waveguide (CPW). Both frequency doubling and tripling are examined, with attention paid to conversion efficiency. This approach allows up-conversion to be implemented in a miniaturized packaged and cryogenic environment, which can simplify the design of cryogenic systems. We achieved a conversion efficiency of 12.7% and an output power of −5.0 dBm when up-converting a 10-GHz fundamental tone to the 20-GHz second harmonic, which is an improvement compared to higher power room-temperature commercial offerings. To better understand device behavior, we also develop a measurement-based model using a harmonic balance simulation, and achieved good agreement between measurements and simulations.
本文介绍了一种利用超导共面波导(CPW)动感的倍频方法。文章对倍频和倍增进行了研究,并关注转换效率。这种方法可以在微型封装和低温环境中实现上转换,从而简化低温系统的设计。在将 10 GHz 基音上转换为 20 GHz 二次谐波时,我们实现了 12.7% 的转换效率和 -5.0 dBm 的输出功率,这与更高功率的室温商用产品相比有所提高。为了更好地理解器件行为,我们还利用谐波平衡仿真开发了一个基于测量的模型,并在测量和仿真之间取得了良好的一致性。
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引用次数: 0
Design and Demonstration of Array and Wallace-Tree Multiplier Families Using Adiabatic Quantum Flux Parametrons 利用绝热量子通量旁瓣电子设计和演示阵列和华莱士树乘法器系列
IF 1.7 3区 物理与天体物理 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2024-10-24 DOI: 10.1109/TASC.2024.3486124
Yu Hoshika;Shohei Takagi;Tomoyuki Tanaka;Christopher L. Ayala;Nobuyuki Yoshikawa
Adiabatic quantum-flux-parametron (AQFP) logic is an emerging superconducting circuit technology, which is superior in terms of energy dissipation at reasonable clock frequencies. Although multiplication is important for signal or image processing applications, such as fast Fourier transform processors or GPUs, no multipliers implemented in AQFP logic have been demonstrated yet. In this article, we introduce two types of algorithms to calculate multiplication results: array type and Wallace-tree type. We design 4-bit multipliers based on these algorithms using the AIST 10 kA/cm$^{2}$ high-speed standard process and compare these circuits in terms of the following metrics: number of Josephson junctions, circuit latency, area, and power dissipation. As a result, in all respects, the Wallace-tree type is better than the array type. In addition, we experimentally confirm that the fabricated chips containing both types of multipliers are operating correctly at 100 kHz for all test patterns, including random patterns. This is the first time AQFP multipliers have been experimentally demonstrated completely.
绝热量子通量参数子(AQFP)逻辑是一种新兴的超导电路技术,它在合理的时钟频率下具有更优越的能量耗散性能。虽然乘法对于信号或图像处理应用(如快速傅立叶变换处理器或 GPU)非常重要,但目前还没有利用 AQFP 逻辑实现乘法器的实例。在本文中,我们介绍了两种计算乘法结果的算法:数组型和华莱士树型。我们使用 AIST 10 kA/cm$^{2}$ 高速标准工艺设计了基于这些算法的 4 位乘法器,并从约瑟夫森结数量、电路延迟、面积和功率耗散等方面对这些电路进行了比较。结果表明,在所有方面,华莱士树型都优于阵列型。此外,我们通过实验证实,包含这两种乘法器的制造芯片在 100 kHz 频率下对所有测试模式(包括随机模式)都能正常工作。这是 AQFP 乘法器首次得到完整的实验验证。
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引用次数: 0
Corrections to “Synchronization Stability Constrained SFCL-Based Fault Ride-Through Strategy for PMSG” 对 "基于同步稳定约束 SFCL 的 PMSG 故障穿越策略 "的更正
IF 1.7 3区 物理与天体物理 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2024-10-24 DOI: 10.1109/TASC.2024.3468828
Qi Xie;Zixuan Zheng;Xianyong Xiao;Tingting Dai;Jie Ren;Binxiang Xu
Presents corrections to the article “Synchronization Stability Constrained SFCL-Based Fault Ride-Through Strategy for PMSG”.
对文章 "基于 SFCL 的 PMSG 同步稳定约束故障穿越策略 "提出更正。
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引用次数: 0
Experimental Demonstration of 1.2-Gb/s/Channel Readout Operation of Josephson–CMOS Hybrid Memory 约瑟夫森-CMOS 混合存储器 1.2 GB/秒/通道读出操作的实验演示
IF 1.7 3区 物理与天体物理 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2024-10-22 DOI: 10.1109/TASC.2024.3485097
Yuki Hironaka;Nobuyuki Yoshikawa
In this study, we aimed to achieve high-speed readout operations of Josephson–CMOS hybrid memory. We first experimentally evaluated the timing margin in the readout operations of the hybrid memory. In single-channel bit line measurements, we confirmed that the hybrid memory could work at a 1-GHz memory clock frequency with a timing margin as high as 0.63 ns. Subsequently, we designed and measured a Josephson–CMOS hybrid accumulator circuit to demonstrate high-speed read operations of the hybrid memory. The core design of the Josephson–CMOS hybrid memory follows our previous design. We introduced a sequential-access read-only CMOS memory and a single-flux-quantum accumulator into a test circuit, enabling high-speed measurement of Josephson–CMOS hybrid memory with only two high-speed external inputs. We designed and fabricated a test circuit using the Rohm 180-nm CMOS process and the AIST-ADP2 Josephson process. In the measurement, we achieved correct operation of the test circuit, including the readout operation of the 32-b hybrid memory at a memory clock frequency as high as 1.2 GHz, corresponding to a 38.4-Gb/s readout.
在这项研究中,我们的目标是实现约瑟夫森-CMOS 混合存储器的高速读出操作。我们首先通过实验评估了混合存储器读出操作的时序余量。在单通道位线测量中,我们证实混合存储器可在 1 GHz 存储器时钟频率下工作,且时序裕度高达 0.63 ns。随后,我们设计并测量了约瑟夫森-CMOS 混合累加器电路,以演示混合存储器的高速读取操作。约瑟夫-CMOS 混合存储器的核心设计沿用了我们之前的设计。我们在测试电路中引入了顺序访问只读 CMOS 存储器和单流量子累加器,从而只需两个高速外部输入即可实现约瑟夫森-CMOS 混合存储器的高速测量。我们使用 Rohm 180 纳米 CMOS 工艺和 AIST-ADP2 约瑟夫森工艺设计并制造了一个测试电路。在测量中,我们实现了测试电路的正确运行,包括 32-b 混合存储器在高达 1.2 GHz 的存储器时钟频率下的读出操作,相当于 38.4-Gb/s 的读出速度。
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引用次数: 0
A New Variable Flux Partitioned-Stator Flux Modulation Machine With Multiple Excitations 新型多激励可变磁通分区定子磁通调制器
IF 1.7 3区 物理与天体物理 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2024-10-21 DOI: 10.1109/TASC.2024.3484332
Yao Meng;Yanzheng Zhu;Shuhua Fang;Hong Chen;Yuxiang Zhong
This paper proposes a new variable flux partitioned-stator flux modulation machine with multiple excitations (VF-PSFMMEM), which places permanent magnets (PMs) on the inner stator and rotor simultaneously to enhance torque production, and employs field windings in the inner stator to realize flux weakening. The configuration and operating principle of machine are described. A multi-objective optimization design of machine is developed for obtaining high average torque (Tavg), good flux weakening capability and low torque ripple (Trip). The electromagnetic performances of VF-PSFMMEM at different excitation sources are analyzed through finite element method. The results indicate that VF-PSFMMEM can provide large flux linkage, high Tavg, low Trip, high efficiency and good flux weakening capability.
本文提出了一种新型多励磁可变磁通分区定子磁通调制机(VF-PSFMMEM),它在定子内侧和转子上同时安装永磁体(PM)以提高转矩输出,并在定子内侧采用磁场绕组实现磁通削弱。介绍了机器的构造和工作原理。为获得高平均转矩(Tavg)、良好的磁通削弱能力和低转矩纹波(Trip),对机器进行了多目标优化设计。通过有限元法分析了 VF-PSFMMEM 在不同激励源下的电磁性能。结果表明,VF-PSFMMEM 可以提供大磁通量、高 Tavg、低 Trip、高效率和良好的磁通削弱能力。
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引用次数: 0
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IEEE Transactions on Applied Superconductivity
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