Pub Date : 2024-03-21DOI: 10.1109/TPDS.2024.3380443
Chiranjeb Mondal;Sanjay Rajopadhye
RNA-RNA interactions (RRIs) are essential in many biological processes, including gene transcription, translation, and localization. They play a critical role in diseases such as cancer and Alzheimer’s. Algorithms to model RRI typically use dynamic programming and have the complexity $Theta (N^{3} , M^{3})$ in time and $Theta (N^{2} , M^{2})$ in space where $N$ and $M$ are the lengths of the two RNA sequences. This makes it both essential and challenging to parallelize them. Previous efforts to do so have been hand-optimized, which is prone to human error and costly to develop and maintain. This paper presents a multi-core CPU parallelization of BPMax, one of the simpler RRI algorithms, generated by a user-guided polyhedral code generation tool, AlphaZ . The user starts with a mathematical specification of the dynamic programming algorithm and provides the choice of polyhedral program transformations such as schedules, memory-maps, and multi-level tiling. AlphaZ automatically generates highly optimized code. At the lowest level, we implemented a small hand-optimized register-tiled “matrix max-plus” kernel and integrated it with our tool-generated optimized code. Our final optimized program version is about $400times$ faster than the base program, translating to around 312 GFLOPS, more than half of our platform's Roofline Machine Peak ( RMP ) performance. On a single core, we attain 80% of RMP . The main kernel in the algorithm, whose complexity is $Theta (N^{3} , M^{3})$ , attains 58 GFLOPS on a single-core and 344 GFLOPS on multi-core (90% and 58% of RMP , respectively).
{"title":"Taking RNA-RNA Interaction to Machine Peak","authors":"Chiranjeb Mondal;Sanjay Rajopadhye","doi":"10.1109/TPDS.2024.3380443","DOIUrl":"10.1109/TPDS.2024.3380443","url":null,"abstract":"RNA-RNA interactions (RRIs) are essential in many biological processes, including gene transcription, translation, and localization. They play a critical role in diseases such as cancer and Alzheimer’s. Algorithms to model RRI typically use dynamic programming and have the complexity \u0000<inline-formula><tex-math>$Theta (N^{3} , M^{3})$</tex-math></inline-formula>\u0000 in time and \u0000<inline-formula><tex-math>$Theta (N^{2} , M^{2})$</tex-math></inline-formula>\u0000 in space where \u0000<inline-formula><tex-math>$N$</tex-math></inline-formula>\u0000 and \u0000<inline-formula><tex-math>$M$</tex-math></inline-formula>\u0000 are the lengths of the two RNA sequences. This makes it both essential and challenging to parallelize them. Previous efforts to do so have been hand-optimized, which is prone to human error and costly to develop and maintain. This paper presents a multi-core CPU parallelization of BPMax, one of the simpler RRI algorithms, generated by a user-guided polyhedral code generation tool, \u0000<small><monospace><b>AlphaZ</b></monospace></small>\u0000. The user starts with a mathematical specification of the dynamic programming algorithm and provides the choice of polyhedral program transformations such as schedules, memory-maps, and multi-level tiling. \u0000<small><monospace><b>AlphaZ</b></monospace></small>\u0000 automatically generates highly optimized code. At the lowest level, we implemented a small hand-optimized register-tiled “matrix max-plus” kernel and integrated it with our tool-generated optimized code. Our final optimized program version is about \u0000<inline-formula><tex-math>$400times$</tex-math></inline-formula>\u0000 faster than the base program, translating to around 312 GFLOPS, more than half of our platform's \u0000<i>Roofline Machine Peak</i>\u0000 (\u0000<small><monospace><b>RMP</b></monospace></small>\u0000) performance. On a single core, we attain 80% of \u0000<small><monospace><b>RMP</b></monospace></small>\u0000. The main kernel in the algorithm, whose complexity is \u0000<inline-formula><tex-math>$Theta (N^{3} , M^{3})$</tex-math></inline-formula>\u0000, attains 58 GFLOPS on a single-core and 344 GFLOPS on multi-core (90% and 58% of \u0000<small><monospace><b>RMP</b></monospace></small>\u0000, respectively).","PeriodicalId":13257,"journal":{"name":"IEEE Transactions on Parallel and Distributed Systems","volume":null,"pages":null},"PeriodicalIF":5.3,"publicationDate":"2024-03-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140203646","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Clustered federated learning (CFL) is a promising solution to address the non-IID problem in the spatial domain for federated learning (FL). However, existing CFL solutions overlook the non-IID issue in the temporal domain and lack consideration of time efficiency. In this work, we propose a novel approach, called ClusterFLADS , which takes advantage of the false predictions of the inappropriate global models, together with knowledge of temperature scaling and catastrophic forgetting to reveal distributional similarities between the training data (of different clusters) and the test data. Additionally, we design an efficient feature extraction scheme by exploiting the role of each layer in a neural network's learning process. By strategically selecting model parameters and using PCA for dimensionality reduction, ClusterFLADS effectively improves clustering speed. We evaluate ClusterFLADS using real-world IoT trace data in various scenarios. Our results show that ClusterFLADS accurately and efficiently clusters clients, achieving a 100% true positive rate and low false positives across various data distributions in both the spatial and temporal domains.
{"title":"Taking Advantage of the Mistakes: Rethinking Clustered Federated Learning for IoT Anomaly Detection","authors":"Jiamin Fan;Kui Wu;Guoming Tang;Yang Zhou;Shengqiang Huang","doi":"10.1109/TPDS.2024.3379905","DOIUrl":"10.1109/TPDS.2024.3379905","url":null,"abstract":"Clustered federated learning (CFL) is a promising solution to address the non-IID problem in the spatial domain for federated learning (FL). However, existing CFL solutions overlook the non-IID issue in the temporal domain and lack consideration of time efficiency. In this work, we propose a novel approach, called \u0000<italic>ClusterFLADS</i>\u0000, which takes advantage of the false predictions of the inappropriate global models, together with knowledge of temperature scaling and catastrophic forgetting to reveal distributional similarities between the training data (of different clusters) and the test data. Additionally, we design an efficient feature extraction scheme by exploiting the role of each layer in a neural network's learning process. By strategically selecting model parameters and using PCA for dimensionality reduction, \u0000<italic>ClusterFLADS</i>\u0000 effectively improves clustering speed. We evaluate \u0000<italic>ClusterFLADS</i>\u0000 using real-world IoT trace data in various scenarios. Our results show that \u0000<italic>ClusterFLADS</i>\u0000 accurately and efficiently clusters clients, achieving a 100% true positive rate and low false positives across various data distributions in both the spatial and temporal domains.","PeriodicalId":13257,"journal":{"name":"IEEE Transactions on Parallel and Distributed Systems","volume":null,"pages":null},"PeriodicalIF":5.3,"publicationDate":"2024-03-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140203675","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
CRYSTALS-Kyber, as the only public key encryption (PKE) algorithm selected by the National Institute of Standards and Technology (NIST) in the third round, is considered one of the most promising post-quantum cryptography (PQC) schemes. Lattice-based cryptography uses complex discrete algorithm problems on lattices to build secure encryption and decryption systems to resist attacks from quantum computing. Performance is an important bottleneck affecting the promotion of post quantum cryptography. In this paper, we present a High-performance Implementation of Kyber (named HI-Kyber) on the NVIDIA GPUs, which can increase the key-exchange performance of Kyber to the million-level. Firstly, we propose a lattice-based PQC implementation architecture based on kernel fusion, which can avoid redundant global-memory access operations. Secondly, We optimize and implement the core operations of CRYSTALS-Kyber, including Number Theoretic Transform (NTT), inverse NTT (INTT), pointwise multiplication, etc. Especially for the calculation bottleneck NTT operation, three novel methods are proposed to explore extreme performance: the sliced layer merging (SLM), the sliced depth-first search (SDFS-NTT) and the entire depth-first search (EDFS-NTT), which achieve a speedup of 7.5%, 28.5%, and 41.6% compared to the native implementation. Thirdly, we conduct comprehensive performance experiments with different parallel dimensions based on the above optimization. Finally, our key exchange performance reaches 1,664 kops/s. Specifically, based on the same platform, our HI-Kyber is 3.52× that of the GPU implementation based on the same instruction set and 1.78× that of the state-of-the-art one based on AI-accelerated tensor core.
{"title":"HI-Kyber: A Novel High-Performance Implementation Scheme of Kyber Based on GPU","authors":"Xinyi Ji;Jiankuo Dong;Tonggui Deng;Pinchang Zhang;Jiafeng Hua;Fu Xiao","doi":"10.1109/TPDS.2024.3379734","DOIUrl":"10.1109/TPDS.2024.3379734","url":null,"abstract":"CRYSTALS-Kyber, as the only public key encryption (PKE) algorithm selected by the National Institute of Standards and Technology (NIST) in the third round, is considered one of the most promising post-quantum cryptography (PQC) schemes. Lattice-based cryptography uses complex discrete algorithm problems on lattices to build secure encryption and decryption systems to resist attacks from quantum computing. Performance is an important bottleneck affecting the promotion of post quantum cryptography. In this paper, we present a High-performance Implementation of Kyber (named HI-Kyber) on the NVIDIA GPUs, which can increase the key-exchange performance of Kyber to the million-level. Firstly, we propose a lattice-based PQC implementation architecture based on kernel fusion, which can avoid redundant global-memory access operations. Secondly, We optimize and implement the core operations of CRYSTALS-Kyber, including Number Theoretic Transform (NTT), inverse NTT (INTT), pointwise multiplication, etc. Especially for the calculation bottleneck NTT operation, three novel methods are proposed to explore extreme performance: the sliced layer merging (SLM), the sliced depth-first search (SDFS-NTT) and the entire depth-first search (EDFS-NTT), which achieve a speedup of 7.5%, 28.5%, and 41.6% compared to the native implementation. Thirdly, we conduct comprehensive performance experiments with different parallel dimensions based on the above optimization. Finally, our key exchange performance reaches 1,664 kops/s. Specifically, based on the same platform, our HI-Kyber is 3.52× that of the GPU implementation based on the same instruction set and 1.78× that of the state-of-the-art one based on AI-accelerated tensor core.","PeriodicalId":13257,"journal":{"name":"IEEE Transactions on Parallel and Distributed Systems","volume":null,"pages":null},"PeriodicalIF":5.3,"publicationDate":"2024-03-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140203677","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-03-20DOI: 10.1109/TPDS.2024.3379933
Rahul Mishra;Hari Prabhat Gupta;Garvit Banga;Sajal K. Das
Federated Learning is a training framework that enables multiple participants to collaboratively train a shared model while preserving data privacy. The heterogeneity of devices and networking resources of the participants delay the training and aggregation. The paper introduces a novel approach to federated learning by incorporating resource-aware clustering. This method addresses the challenges posed by the diverse devices and networking resources among participants. Unlike static clustering approaches, this paper proposes a dynamic method to determine the optimal number of clusters using Dunn Indices. It enables adaptability to the varying heterogeneity levels among participants, ensuring a responsive and customized approach to clustering. Next, the paper goes beyond empirical observations by providing a mathematical derivation of the communication rounds for convergence within each cluster. Further, the participant assignment mechanism adds a layer of sophistication and ensures that devices and networking resources are allocated optimally. Afterwards, we incorporate a leader-follower technique, particularly through knowledge distillation, which improves the performance of lightweight models within clusters. Finally, experiments are conducted to validate the approach and to compare it with state-of-the-art. The results demonstrated an accuracy improvement of over 3% compared to its closest competitor and a reduction in communication rounds of around 10%.
{"title":"Fed-RAC: Resource-Aware Clustering for Tackling Heterogeneity of Participants in Federated Learning","authors":"Rahul Mishra;Hari Prabhat Gupta;Garvit Banga;Sajal K. Das","doi":"10.1109/TPDS.2024.3379933","DOIUrl":"10.1109/TPDS.2024.3379933","url":null,"abstract":"Federated Learning is a training framework that enables multiple participants to collaboratively train a shared model while preserving data privacy. The heterogeneity of devices and networking resources of the participants delay the training and aggregation. The paper introduces a novel approach to federated learning by incorporating resource-aware clustering. This method addresses the challenges posed by the diverse devices and networking resources among participants. Unlike static clustering approaches, this paper proposes a dynamic method to determine the optimal number of clusters using Dunn Indices. It enables adaptability to the varying heterogeneity levels among participants, ensuring a responsive and customized approach to clustering. Next, the paper goes beyond empirical observations by providing a mathematical derivation of the communication rounds for convergence within each cluster. Further, the participant assignment mechanism adds a layer of sophistication and ensures that devices and networking resources are allocated optimally. Afterwards, we incorporate a leader-follower technique, particularly through knowledge distillation, which improves the performance of lightweight models within clusters. Finally, experiments are conducted to validate the approach and to compare it with state-of-the-art. The results demonstrated an accuracy improvement of over 3% compared to its closest competitor and a reduction in communication rounds of around 10%.","PeriodicalId":13257,"journal":{"name":"IEEE Transactions on Parallel and Distributed Systems","volume":null,"pages":null},"PeriodicalIF":5.3,"publicationDate":"2024-03-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140203645","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-03-16DOI: 10.1109/TPDS.2024.3402098
Chilankamol Sunny;Satyajit Das;Kevin J. M. Martin;Philippe Coussy
Coarse-Grained Reconfigurable Array (CGRA) architectures are popular as high-performance and energy-efficient computing devices. Compute-intensive loop constructs of complex applications are mapped onto CGRAs by modulo-scheduling the innermost loop dataflow graph (DFG). In the state-of-the-art approaches, mapping quality is typically determined by initiation interval ( II ), while schedule length for one iteration is neglected. However, for nested loops, schedule length becomes important. In this article, we propose CREPE, a C oncurrent Re verse-modulo-scheduling and P lac e ment technique for CGRAs that minimizes both II and schedule length . CREPE performs simultaneous modulo-scheduling and placement coupled with dynamic graph transformations, generating good-quality mappings with high success rates. Furthermore, we introduce a compilation flow that maps nested loops onto the CGRA and modulo-schedules the innermost loop using CREPE. Experiments show that the proposed solution outperforms the conventional approaches in mapping success rate and total execution time with no impact on the compilation time. CREPE maps all kernels considered while state-of-the-art techniques Crimson and Epimap failed to find a mapping or mapped at very high II s. On a 2×4 CGRA, CREPE reports a 100% success rate and a speed-up up to 5.9× and 1.4× over Crimson with 78.5% and Epimap with 46.4% success rates respectively.
{"title":"CREPE: Concurrent Reverse-Modulo-Scheduling and Placement for CGRAs","authors":"Chilankamol Sunny;Satyajit Das;Kevin J. M. Martin;Philippe Coussy","doi":"10.1109/TPDS.2024.3402098","DOIUrl":"10.1109/TPDS.2024.3402098","url":null,"abstract":"Coarse-Grained Reconfigurable Array (CGRA) architectures are popular as high-performance and energy-efficient computing devices. Compute-intensive loop constructs of complex applications are mapped onto CGRAs by modulo-scheduling the innermost loop dataflow graph (DFG). In the state-of-the-art approaches, mapping quality is typically determined by initiation interval (\u0000<italic>II</i>\u0000), while \u0000<italic>schedule length</i>\u0000 for one iteration is neglected. However, for nested loops, \u0000<italic>schedule length</i>\u0000 becomes important. In this article, we propose CREPE, a \u0000<bold>C</b>\u0000oncurrent \u0000<bold>Re</b>\u0000verse-modulo-scheduling and \u0000<bold>P</b>\u0000lac\u0000<bold>e</b>\u0000ment technique for CGRAs that minimizes both \u0000<italic>II</i>\u0000 and \u0000<italic>schedule length</i>\u0000. CREPE performs simultaneous modulo-scheduling and placement coupled with dynamic graph transformations, generating good-quality mappings with high success rates. Furthermore, we introduce a compilation flow that maps nested loops onto the CGRA and modulo-schedules the innermost loop using CREPE. Experiments show that the proposed solution outperforms the conventional approaches in mapping success rate and total execution time with no impact on the compilation time. CREPE maps all kernels considered while state-of-the-art techniques Crimson and Epimap failed to find a mapping or mapped at very high \u0000<italic>II</i>\u0000s. On a 2×4 CGRA, CREPE reports a 100% success rate and a speed-up up to 5.9× and 1.4× over Crimson with 78.5% and Epimap with 46.4% success rates respectively.","PeriodicalId":13257,"journal":{"name":"IEEE Transactions on Parallel and Distributed Systems","volume":null,"pages":null},"PeriodicalIF":5.3,"publicationDate":"2024-03-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141062295","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-03-15DOI: 10.1109/TPDS.2024.3401164
Sai Zhang;Li Tang;Yan-Jun Liu
This paper investigates the finite-time consensus problem for nonlinear parabolic networks by designing a new tracking controller. For undirected topology, the newly designed controller allows to optimize the consensus time by adjusting the parameter $beta (0< beta < 1 )$ . First, the neural network approximation property is utilized to counteract the uncertain nonlinear dynamics of agents, and the event-triggered mechanism is designed to save energy and reduce the communication burden. Second, a tracking control protocol is proposed based on event-triggered mechanism, which drives the multi-agent system to reach leader-follower consensus in finite time. Then, by considering appropriate Lyapunov generalization functions and using some important inequalities, the sufficient condition for achieving finite-time consensus in the multi-agent system is obtained. Finally, the effectiveness of the presented method is verified by simulation.
{"title":"Adaptive Neural Control for a Network of Parabolic PDEs With Event-Triggered Mechanism","authors":"Sai Zhang;Li Tang;Yan-Jun Liu","doi":"10.1109/TPDS.2024.3401164","DOIUrl":"10.1109/TPDS.2024.3401164","url":null,"abstract":"This paper investigates the finite-time consensus problem for nonlinear parabolic networks by designing a new tracking controller. For undirected topology, the newly designed controller allows to optimize the consensus time by adjusting the parameter \u0000<inline-formula><tex-math>$beta (0< beta < 1 )$</tex-math></inline-formula>\u0000. First, the neural network approximation property is utilized to counteract the uncertain nonlinear dynamics of agents, and the event-triggered mechanism is designed to save energy and reduce the communication burden. Second, a tracking control protocol is proposed based on event-triggered mechanism, which drives the multi-agent system to reach leader-follower consensus in finite time. Then, by considering appropriate Lyapunov generalization functions and using some important inequalities, the sufficient condition for achieving finite-time consensus in the multi-agent system is obtained. Finally, the effectiveness of the presented method is verified by simulation.","PeriodicalId":13257,"journal":{"name":"IEEE Transactions on Parallel and Distributed Systems","volume":null,"pages":null},"PeriodicalIF":5.3,"publicationDate":"2024-03-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141062275","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-03-14DOI: 10.1109/TPDS.2024.3373003
Dingding Li;Weijie Zhang;Mianxiong Dong;Kaoru Ota
Modern local persistent memory (PM) file systems often rely on CPU-based memory copying for data transfer between DRAM and PM, resulting in significant CPU resource consumption. While some nascent systems explore DMA (direct memory access) as an alternative for improved efficiency, the intricacies and trade-offs remain obscure. This paper investigates the feasibility of DMA for PM I/O and argues that it is not a straightforward replacement for CPU-based methods. Two key limitations hinder the direct adoption: poor performance for small data and limited bandwidth. To relieve these issues, we propose PM-DMA, a novel I/O mechanism that leverages the strengths of both CPU and DMA. It incorporates three key components: (1) L-Switch, seamlessly switches between CPU and DMA modes based on workload characteristics, maximizing performance; (2) D-Pool, reduces DMA setup overhead, improving responsiveness; (3) P-Mode, allows servicing requests through multiple channels, even hybrid CPU-DMA ones, for enhanced throughput. We implemented PM-DMA on two well-known PM file systems, NOVA and WineFS, utilizing Intel I/OAT technology. Our experimental results demonstrate substantial CPU consumption reductions across diverse workloads. Notably, under heavy load, PM-DMA delivers up to a $10.4times$ performance improvement.
现代本地持久内存（PM）文件系统通常依赖于基于 CPU 的内存复制，在 DRAM 和 PM 之间进行数据传输，从而导致大量 CPU 资源消耗。虽然一些新生系统探索用 DMA（直接内存访问）作为提高效率的替代方法，但其中的复杂性和利弊权衡仍然模糊不清。本文研究了 DMA 用于 PM I/O 的可行性，并认为它不能直接替代基于 CPU 的方法。有两个关键限制阻碍了直接采用：小数据性能差和带宽有限。为了解决这些问题，我们提出了 PM-DMA，一种利用 CPU 和 DMA 优点的新型 I/O 机制。它包含三个关键部分：(1) L-Switch，根据工作负载特征在 CPU 和 DMA 模式之间无缝切换，从而最大限度地提高性能；(2) D-Pool，减少 DMA 设置开销，提高响应速度；(3) P-Mode，允许通过多个通道（甚至是 CPU-DMA 混合通道）为请求提供服务，从而提高吞吐量。我们利用英特尔 I/OAT 技术，在两个著名的 PM 文件系统 NOVA 和 WineFS 上实现了 PM-DMA。我们的实验结果表明，在不同的工作负载下，CPU 消耗都有大幅降低。值得注意的是，在重负载情况下，PM-DMA 可带来高达 10.4 美元/次的性能提升。
{"title":"DMA-Assisted I/O for Persistent Memory","authors":"Dingding Li;Weijie Zhang;Mianxiong Dong;Kaoru Ota","doi":"10.1109/TPDS.2024.3373003","DOIUrl":"10.1109/TPDS.2024.3373003","url":null,"abstract":"Modern local persistent memory (PM) file systems often rely on CPU-based memory copying for data transfer between DRAM and PM, resulting in significant CPU resource consumption. While some nascent systems explore DMA (direct memory access) as an alternative for improved efficiency, the intricacies and trade-offs remain obscure. This paper investigates the feasibility of DMA for PM I/O and argues that it is not a straightforward replacement for CPU-based methods. Two key limitations hinder the direct adoption: poor performance for small data and limited bandwidth. To relieve these issues, we propose PM-DMA, a novel I/O mechanism that leverages the strengths of both CPU and DMA. It incorporates three key components: (1) L-Switch, seamlessly switches between CPU and DMA modes based on workload characteristics, maximizing performance; (2) D-Pool, reduces DMA setup overhead, improving responsiveness; (3) P-Mode, allows servicing requests through multiple channels, even hybrid CPU-DMA ones, for enhanced throughput. We implemented PM-DMA on two well-known PM file systems, NOVA and WineFS, utilizing Intel I/OAT technology. Our experimental results demonstrate substantial CPU consumption reductions across diverse workloads. Notably, under heavy load, PM-DMA delivers up to a \u0000<inline-formula><tex-math>$10.4times$</tex-math></inline-formula>\u0000 performance improvement.","PeriodicalId":13257,"journal":{"name":"IEEE Transactions on Parallel and Distributed Systems","volume":null,"pages":null},"PeriodicalIF":5.3,"publicationDate":"2024-03-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140153010","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Data provenance, or data lineage, describes the life cycle of data. In scientific workflows on HPC systems, scientists often seek diverse provenance (e.g., origins of data products, usage patterns of datasets). Unfortunately, existing provenance solutions cannot address the challenges due to their incompatible provenance models and/or system implementations. In this paper, we analyze four representative scientific workflows in collaboration with the domain scientists to identify concrete provenance needs. Based on the first-hand analysis, we propose a provenance framework called PROV-IO $^+$ , which includes an I/O-centric provenance model for describing scientific data and the associated I/O operations and environments precisely. Moreover, we build a prototype of PROV-IO $^+$ to enable end-to-end provenance support on real HPC systems with little manual effort. The PROV-IO $^+$ framework can support both containerized and non-containerized workflows on different HPC platforms with flexibility in selecting various classes of provenance. Our experiments with realistic workflows show that PROV-IO $^+$ can address the provenance needs of the domain scientists effectively with reasonable performance (e.g., less than 3.5% tracking overhead for most experiments). Moreover, PROV-IO $^+$ outperforms a state-of-the-art system (i.e., ProvLake) in our experiments.
{"title":"PROV-IO$^+$+: A Cross-Platform Provenance Framework for Scientific Data on HPC Systems","authors":"Runzhou Han;Mai Zheng;Suren Byna;Houjun Tang;Bin Dong;Dong Dai;Yong Chen;Dongkyun Kim;Joseph Hassoun;David Thorsley","doi":"10.1109/TPDS.2024.3374555","DOIUrl":"10.1109/TPDS.2024.3374555","url":null,"abstract":"Data provenance, or data lineage, describes the life cycle of data. In scientific workflows on HPC systems, scientists often seek diverse provenance (e.g., origins of data products, usage patterns of datasets). Unfortunately, existing provenance solutions cannot address the challenges due to their incompatible provenance models and/or system implementations. In this paper, we analyze four representative scientific workflows in collaboration with the domain scientists to identify concrete provenance needs. Based on the first-hand analysis, we propose a provenance framework called PROV-IO\u0000<inline-formula><tex-math>$^+$</tex-math></inline-formula>\u0000, which includes an I/O-centric provenance model for describing scientific data and the associated I/O operations and environments precisely. Moreover, we build a prototype of PROV-IO\u0000<inline-formula><tex-math>$^+$</tex-math></inline-formula>\u0000 to enable end-to-end provenance support on real HPC systems with little manual effort. The PROV-IO\u0000<inline-formula><tex-math>$^+$</tex-math></inline-formula>\u0000 framework can support both containerized and non-containerized workflows on different HPC platforms with flexibility in selecting various classes of provenance. Our experiments with realistic workflows show that PROV-IO\u0000<inline-formula><tex-math>$^+$</tex-math></inline-formula>\u0000 can address the provenance needs of the domain scientists effectively with reasonable performance (e.g., less than 3.5% tracking overhead for most experiments). Moreover, PROV-IO\u0000<inline-formula><tex-math>$^+$</tex-math></inline-formula>\u0000 outperforms a state-of-the-art system (i.e., ProvLake) in our experiments.","PeriodicalId":13257,"journal":{"name":"IEEE Transactions on Parallel and Distributed Systems","volume":null,"pages":null},"PeriodicalIF":5.3,"publicationDate":"2024-03-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140153003","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-03-13DOI: 10.1109/TPDS.2024.3399840
Lu Zhao;Fu Xiao;Bo Li;Jian Zhou;Xiaolong Xu;Yun Yang
Multi-access edge computing (MEC) has emerged as a promising computing paradigm to push computing resources and services to the network edge. It allows applications/services to be deployed on edge servers for provisioning low-latency services to nearby users. However, in the MEC environment, edge servers may suffer from failures while the app vendor has to guarantee continuously available services to its users, thereby securing its revenue for application instances deployed. In this paper, we focus on available service provisioning when cost-effectively deploying application instances on edge servers. We first formulate a novel A vailability-aware R evenue-effective A pplication D eployment (ARAD) problem in the MEC environment with the aim to maximize the overall revenue by considering both service availability benefit and deployment cost. We prove that the ARAD problem is $mathcal {NP}$ -hard. Then, we propose an approximation algorithm named ARAD-A to find the ARAD solution efficiently with a constant approximation ratio of $frac{1}{2}$ . We extensively evaluate the performance of ARAD-A against five representative approaches. Experimental results demonstrate that our ARAD-A can achieve the best performance in securing the app vendor's overall revenue.
{"title":"Availability-Aware Revenue-Effective Application Deployment in Multi-Access Edge Computing","authors":"Lu Zhao;Fu Xiao;Bo Li;Jian Zhou;Xiaolong Xu;Yun Yang","doi":"10.1109/TPDS.2024.3399840","DOIUrl":"10.1109/TPDS.2024.3399840","url":null,"abstract":"Multi-access edge computing (MEC) has emerged as a promising computing paradigm to push computing resources and services to the network edge. It allows applications/services to be deployed on edge servers for provisioning low-latency services to nearby users. However, in the MEC environment, edge servers may suffer from failures while the app vendor has to guarantee continuously available services to its users, thereby securing its revenue for application instances deployed. In this paper, we focus on available service provisioning when cost-effectively deploying application instances on edge servers. We first formulate a novel \u0000<u>A</u>\u0000vailability-aware \u0000<u>R</u>\u0000evenue-effective \u0000<u>A</u>\u0000pplication \u0000<u>D</u>\u0000eployment (ARAD) problem in the MEC environment with the aim to maximize the overall revenue by considering both service availability benefit and deployment cost. We prove that the ARAD problem is \u0000<inline-formula><tex-math>$mathcal {NP}$</tex-math></inline-formula>\u0000-hard. Then, we propose an approximation algorithm named \u0000<i>ARAD-A</i>\u0000 to find the ARAD solution efficiently with a constant approximation ratio of \u0000<inline-formula><tex-math>$frac{1}{2}$</tex-math></inline-formula>\u0000. We extensively evaluate the performance of \u0000<i>ARAD-A</i>\u0000 against five representative approaches. Experimental results demonstrate that our \u0000<i>ARAD-A</i>\u0000 can achieve the best performance in securing the app vendor's overall revenue.","PeriodicalId":13257,"journal":{"name":"IEEE Transactions on Parallel and Distributed Systems","volume":null,"pages":null},"PeriodicalIF":5.3,"publicationDate":"2024-03-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140934691","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-03-13DOI: 10.1109/TPDS.2024.3399755
Yuzhen Zhao;Xiyu Liu
Spiking neural P systems (SNP systems), one of the parallel and distributed computing models with biological interpretability, have been a hot research topic in bio-inspired computational models in recent years. To improve the stability of the models, this study introduces microglia in the biological nervous system into SNP systems and proposes SNP systems with microglia (MSNP systems). In MSNP systems, besides neurons, another cell type named microglia is introduced. Microglia can help neurons in the range of action maintain homeostasis and prevent excitotoxicity, i.e., excessive excitability. Specifically, microglia use a new microglial maintenance rule to lower the number of spikes in neurons within their range of action when it is too high. The computational capability and efficiency of MSNP systems are also proved. This study makes SNP systems more stable and avoids data overflow or data explosion problems to some degree.
尖峰神经P系统（SNP系统）是具有生物可解释性的并行和分布式计算模型之一，是近年来生物启发计算模型的热门研究课题。为了提高模型的稳定性，本研究将生物神经系统中的小胶质细胞引入 SNP 系统，提出了带小胶质细胞的 SNP 系统（MSNP 系统）。在 MSNP 系统中，除了神经元，还引入了另一种名为小胶质细胞的细胞类型。小胶质细胞可以帮助作用范围内的神经元保持平衡，防止兴奋毒性，即过度兴奋。具体来说，当作用范围内神经元的尖峰数量过高时，小胶质细胞会使用一种新的小胶质细胞维持规则来降低尖峰数量。MSNP 系统的计算能力和效率也得到了证明。这项研究使 SNP 系统更加稳定，并在一定程度上避免了数据溢出或数据爆炸问题。
{"title":"Spiking Neural P Systems With Microglia","authors":"Yuzhen Zhao;Xiyu Liu","doi":"10.1109/TPDS.2024.3399755","DOIUrl":"10.1109/TPDS.2024.3399755","url":null,"abstract":"Spiking neural P systems (SNP systems), one of the parallel and distributed computing models with biological interpretability, have been a hot research topic in bio-inspired computational models in recent years. To improve the stability of the models, this study introduces microglia in the biological nervous system into SNP systems and proposes SNP systems with microglia (MSNP systems). In MSNP systems, besides neurons, another cell type named microglia is introduced. Microglia can help neurons in the range of action maintain homeostasis and prevent excitotoxicity, i.e., excessive excitability. Specifically, microglia use a new microglial maintenance rule to lower the number of spikes in neurons within their range of action when it is too high. The computational capability and efficiency of MSNP systems are also proved. This study makes SNP systems more stable and avoids data overflow or data explosion problems to some degree.","PeriodicalId":13257,"journal":{"name":"IEEE Transactions on Parallel and Distributed Systems","volume":null,"pages":null},"PeriodicalIF":5.3,"publicationDate":"2024-03-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140934761","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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