Pub Date : 2008-11-01DOI: 10.1109/IEMT.2008.5507869
T. Tilford, K. Sinclair, G. Goussetis, C. Bailey, M. Desmulliez, A. Parrott, A. Sangster
Comparison of the performance of a conventional convection oven system with a dual-section microwave system for curing thermosetting polymer encapsulant materials has been performed numerically. A numerical model capable of analysing both the convection and microwave cure processes has been developed and is briefly outlined. The model is used to analyse the curing of a commercially available encapsulant material using both systems. Results obtained from numerical solutions are presented, confirming that the VFM system enables the cure process to be carried out far more rapidly than with the convection oven system. This capability stems from the fundamental heating processes involved, namely that microwave processing enables the heating rate to be varied independently of the material temperature. Variations in cure times, curing rates, maximum temperatures and residual stresses between the processes are fully discussed.
{"title":"Comparison of encapsulant curing with convection and microwave systems","authors":"T. Tilford, K. Sinclair, G. Goussetis, C. Bailey, M. Desmulliez, A. Parrott, A. Sangster","doi":"10.1109/IEMT.2008.5507869","DOIUrl":"https://doi.org/10.1109/IEMT.2008.5507869","url":null,"abstract":"Comparison of the performance of a conventional convection oven system with a dual-section microwave system for curing thermosetting polymer encapsulant materials has been performed numerically. A numerical model capable of analysing both the convection and microwave cure processes has been developed and is briefly outlined. The model is used to analyse the curing of a commercially available encapsulant material using both systems. Results obtained from numerical solutions are presented, confirming that the VFM system enables the cure process to be carried out far more rapidly than with the convection oven system. This capability stems from the fundamental heating processes involved, namely that microwave processing enables the heating rate to be varied independently of the material temperature. Variations in cure times, curing rates, maximum temperatures and residual stresses between the processes are fully discussed.","PeriodicalId":151085,"journal":{"name":"2008 33rd IEEE/CPMT International Electronics Manufacturing Technology Conference (IEMT)","volume":"84 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133693473","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2008-11-01DOI: 10.1109/IEMT.2008.5507887
A. Bahadorimehr, M. Hamidon, Y. Hezarjaribi
This paper presents a nonlinear model for a capacitive Microelectromechanical accelerometer (MEMA). System parameters of the accelerometer are developed using the effect of cubic term of the folded-flexure spring. To solving this equation we use FEA method. The neural network (NN) uses Levenberg-Marquardt (LM) method for training the system to have more accurate response. The designed NN can identify and predict the displacement of movable mass of accelerometer. The simulation results are very promising.
{"title":"Nonlinear modeling of a capacitive MEMS accelerometer using neural network","authors":"A. Bahadorimehr, M. Hamidon, Y. Hezarjaribi","doi":"10.1109/IEMT.2008.5507887","DOIUrl":"https://doi.org/10.1109/IEMT.2008.5507887","url":null,"abstract":"This paper presents a nonlinear model for a capacitive Microelectromechanical accelerometer (MEMA). System parameters of the accelerometer are developed using the effect of cubic term of the folded-flexure spring. To solving this equation we use FEA method. The neural network (NN) uses Levenberg-Marquardt (LM) method for training the system to have more accurate response. The designed NN can identify and predict the displacement of movable mass of accelerometer. The simulation results are very promising.","PeriodicalId":151085,"journal":{"name":"2008 33rd IEEE/CPMT International Electronics Manufacturing Technology Conference (IEMT)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130609819","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2008-11-01DOI: 10.1109/IEMT.2008.5507834
Young-Woo Kim, Jae-Pil Kim, Jae-Bum Kim, Minsung Kim, Sung-Mo Park, Sang-Bin Song, Yeongseog Lim
Thermal via holes must be designed to emit the high heat flux generated from high power light emitting diodes (HP LEDs) that are 1000 times smaller than conventional electronics devices such as central processing unit (CPU). Therefore, it is important to layout via holes in accordance with the kinds of the devices. In this paper, we compare the performance of the packages with the three classes of via holes by verifying thermal resistance by using MicRed T3Ster and FLIR IR Camera. It is demonstrated that the large via hole beneath high power light emitting diode is superior to many scattered via holes under condition of the similar amount of silver paste for via filling. Detailed thermal performance is analyzed using CFD (computational fluid dynamics) technology and then verified with thermal resistance and heat distribution in printed circuit board (PCB) where light emitting diode (LED) packaging without the encapsulating material is implemented and then, the evaluation and the compensation of the errors for the process factor of the simulation are simultaneously accomplished. Thermal resistance of the packages with HEP (heat emission pole) is 5 ~ 13.8 times smaller than the others. The calculation formula of thermal conductivity is improved into a new equivalent formula with the device size, package size and the overlap area. The optimized via hole decreases the manufacturing cost while it increases the efficiency of the heat emission.
{"title":"Optimization of ceramic packages including thermal via-hole for light emitting diode","authors":"Young-Woo Kim, Jae-Pil Kim, Jae-Bum Kim, Minsung Kim, Sung-Mo Park, Sang-Bin Song, Yeongseog Lim","doi":"10.1109/IEMT.2008.5507834","DOIUrl":"https://doi.org/10.1109/IEMT.2008.5507834","url":null,"abstract":"Thermal via holes must be designed to emit the high heat flux generated from high power light emitting diodes (HP LEDs) that are 1000 times smaller than conventional electronics devices such as central processing unit (CPU). Therefore, it is important to layout via holes in accordance with the kinds of the devices. In this paper, we compare the performance of the packages with the three classes of via holes by verifying thermal resistance by using MicRed T3Ster and FLIR IR Camera. It is demonstrated that the large via hole beneath high power light emitting diode is superior to many scattered via holes under condition of the similar amount of silver paste for via filling. Detailed thermal performance is analyzed using CFD (computational fluid dynamics) technology and then verified with thermal resistance and heat distribution in printed circuit board (PCB) where light emitting diode (LED) packaging without the encapsulating material is implemented and then, the evaluation and the compensation of the errors for the process factor of the simulation are simultaneously accomplished. Thermal resistance of the packages with HEP (heat emission pole) is 5 ~ 13.8 times smaller than the others. The calculation formula of thermal conductivity is improved into a new equivalent formula with the device size, package size and the overlap area. The optimized via hole decreases the manufacturing cost while it increases the efficiency of the heat emission.","PeriodicalId":151085,"journal":{"name":"2008 33rd IEEE/CPMT International Electronics Manufacturing Technology Conference (IEMT)","volume":"40 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116657241","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2008-11-01DOI: 10.1109/IEMT.2008.5507851
Manickavasagar Minor, J. Sjoberg, Jenson Lee, D. Shangguan
Flexible Printed Circuit (FPC) boards are being widely used for a number of applications to enable products in a three dimensional format thereby utilizing the “dead” space within the product envelop. During the past few years, the usage and complexity of FPC made of polyimide, polyester or teflon have grown substantially and are expected to continue to grow even more in the next coming years. In the past these FPC's have been connected to other FPC's or to a PCB with help of mainly connectors but the interest of replacing these connectors with a lower cost and smaller footprint connections with help of Anisotropic Conductive Film (ACF) is being widely explored. This paper will report the development of fine pitch ACF bonding down to 0,2mm and the mechanical and thermo-mechanical reliability of the ACF interconnects. The influence of difference process parameters and ACF materials on the ACF process yield will be discussed as well.
{"title":"Process development, repair and reliability study with Anisotropic Conductive Film bonding as a replacement for surface mount connectors and hotbar soldering","authors":"Manickavasagar Minor, J. Sjoberg, Jenson Lee, D. Shangguan","doi":"10.1109/IEMT.2008.5507851","DOIUrl":"https://doi.org/10.1109/IEMT.2008.5507851","url":null,"abstract":"Flexible Printed Circuit (FPC) boards are being widely used for a number of applications to enable products in a three dimensional format thereby utilizing the “dead” space within the product envelop. During the past few years, the usage and complexity of FPC made of polyimide, polyester or teflon have grown substantially and are expected to continue to grow even more in the next coming years. In the past these FPC's have been connected to other FPC's or to a PCB with help of mainly connectors but the interest of replacing these connectors with a lower cost and smaller footprint connections with help of Anisotropic Conductive Film (ACF) is being widely explored. This paper will report the development of fine pitch ACF bonding down to 0,2mm and the mechanical and thermo-mechanical reliability of the ACF interconnects. The influence of difference process parameters and ACF materials on the ACF process yield will be discussed as well.","PeriodicalId":151085,"journal":{"name":"2008 33rd IEEE/CPMT International Electronics Manufacturing Technology Conference (IEMT)","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128991735","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2008-11-01DOI: 10.1109/IEMT.2008.5507891
Wong Wai Chi, I. Azid
In this study, the performances of the micropump with active type diaphragm actuated by thermoelectric and piezoelectric have been compared. Finite element analysis (FEA) by ANSYS®8.1 had used to simulate and analyze the deflection of the diaphragm. The FEA model actuated by thermoelectric and piezoelectric is validated by the available data. The success of the model in predicting the displacement of the diaphragm provides further encouragement in using the model to compare the diaphragm deflection actuated by difference actuated method but with same diaphragm size and actuated power. The optimized design by using thermoelectric actuator has then been shown.
{"title":"Comparison of the performances of micropump with active type diaphragm actuated by several approaches","authors":"Wong Wai Chi, I. Azid","doi":"10.1109/IEMT.2008.5507891","DOIUrl":"https://doi.org/10.1109/IEMT.2008.5507891","url":null,"abstract":"In this study, the performances of the micropump with active type diaphragm actuated by thermoelectric and piezoelectric have been compared. Finite element analysis (FEA) by ANSYS®8.1 had used to simulate and analyze the deflection of the diaphragm. The FEA model actuated by thermoelectric and piezoelectric is validated by the available data. The success of the model in predicting the displacement of the diaphragm provides further encouragement in using the model to compare the diaphragm deflection actuated by difference actuated method but with same diaphragm size and actuated power. The optimized design by using thermoelectric actuator has then been shown.","PeriodicalId":151085,"journal":{"name":"2008 33rd IEEE/CPMT International Electronics Manufacturing Technology Conference (IEMT)","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129041333","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2008-11-01DOI: 10.1109/IEMT.2008.5507791
Y. Hezarjaribi, M. Hamidon, A. Bahadorimehr
In this paper, Poly-crystalline silicon carbide (poly-sic) Micro-electromechanical systems (MEMS) capacitive pressure sensor operating in harsh environment in touch mode is proposed, The principle of the paper is to design, obtain analytical solution and compare the results with the simulation for a circular diaphragm deflection before and after touch point. The sensor demonstrated a high temperature sensing capability up to 400°C, the device achieves a linear characteristic response and consists of a circular clamped-edges poly-sic diaphragm suspended over sealed cavity on a silicon carbide substrate. The sensor is operating in touch mode capacitive pressure sensor, The advantages of a touch mode are the robust structure that make the sensor to withstand harsh environment, near linear output, and large over-range protection, operating in wide range of pressure, higher sensitivity than the near linear operation in normal mode, The material is considered to be used for harsh environment is SiC (Silicon Carbide), Because of SiC owing excellent electrical stability, mechanical robustness, and chemical inertness properties and the application of pressure sensors in harsh environments are, such as automotive industries, aerospace, oil/logging equipments, nuclear station, and power station. We are simulating MEMS capacitive pressure sensor to optimize the design, improve the performance and reduce the time of fabricating process of the device. The proposed touch mode MEMS capacitive pressure sensor demonstrated diaphragm ranging from 150 μm to 360 μm in diameter, with the gap depth from 0.5 μm to 7.5 μm and the sensor exhibit a linear response with pressure from 0.05 Mpa to 10 Mpa.
{"title":"Pressure sensors based on MEMS, operating in harsh environments (touch-mode)","authors":"Y. Hezarjaribi, M. Hamidon, A. Bahadorimehr","doi":"10.1109/IEMT.2008.5507791","DOIUrl":"https://doi.org/10.1109/IEMT.2008.5507791","url":null,"abstract":"In this paper, Poly-crystalline silicon carbide (poly-sic) Micro-electromechanical systems (MEMS) capacitive pressure sensor operating in harsh environment in touch mode is proposed, The principle of the paper is to design, obtain analytical solution and compare the results with the simulation for a circular diaphragm deflection before and after touch point. The sensor demonstrated a high temperature sensing capability up to 400°C, the device achieves a linear characteristic response and consists of a circular clamped-edges poly-sic diaphragm suspended over sealed cavity on a silicon carbide substrate. The sensor is operating in touch mode capacitive pressure sensor, The advantages of a touch mode are the robust structure that make the sensor to withstand harsh environment, near linear output, and large over-range protection, operating in wide range of pressure, higher sensitivity than the near linear operation in normal mode, The material is considered to be used for harsh environment is SiC (Silicon Carbide), Because of SiC owing excellent electrical stability, mechanical robustness, and chemical inertness properties and the application of pressure sensors in harsh environments are, such as automotive industries, aerospace, oil/logging equipments, nuclear station, and power station. We are simulating MEMS capacitive pressure sensor to optimize the design, improve the performance and reduce the time of fabricating process of the device. The proposed touch mode MEMS capacitive pressure sensor demonstrated diaphragm ranging from 150 μm to 360 μm in diameter, with the gap depth from 0.5 μm to 7.5 μm and the sensor exhibit a linear response with pressure from 0.05 Mpa to 10 Mpa.","PeriodicalId":151085,"journal":{"name":"2008 33rd IEEE/CPMT International Electronics Manufacturing Technology Conference (IEMT)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114188726","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2008-11-01DOI: 10.1109/IEMT.2008.5507862
M. Picardal, G. Coronel
Process window for Electro-chemical Deflash (ED) and High Pressure Water Jet (HPWJ) should be very well defined to ensure complete removal of organic materials on the surface of the frame prior to Metal Finishing (MF). This will help in ensuring complete coverage and good adhesion of metal finish. This will likewise avoid potential package defects like chipping, crack and delamination. In establishing the optimum window for ON Semiconductor Philippines Inc. (OSPI). ED and HPWJ . benchmarking study was performed and results were discussed to the selected Original Engineering Material (OEM) for the design of the machine. The benchmarking activity helped to determine potential failures of the process, the controls needed to monitor the process and the resources to set-up the machine. The resulting design was characterized using the Machine Process Capability Study (MPCpS). This involves five stages such as: 1) Process characterization where each machine and process parts and functions are defined. 2) Metrology characterization where response measuring equipment's precision and accuracy are tested and ensured capable prior to proceeding into the next stage. 3) Machine and Process Capability determination where sets of experiments are performed to determine the capability from the affected process up to the last process step. 4) Optimization if the process is found not capable or Machine and Process cliff if found capable. In this stage, window where the process will fail is determined, and finally 5) Control to ensure that defined capable window is maintained during production. OSPI's well characterized Deflash process has eliminated problems like Missing Lead Finish (MLF) and Resin Bleed (RB). It has also reduced Foreign Material problem by 90% and Tape and Reel final gate problem by 42%. It has helped increase Trim and Form's productivity by 25% by eliminating tin flakes on non-functional areas of the frame. Most of all, since the implementation of this project, there was no observed occurrence of package related problems.
{"title":"Characterization of Electro-chemical Deflash and High Pressure Water Jet through MPCpS","authors":"M. Picardal, G. Coronel","doi":"10.1109/IEMT.2008.5507862","DOIUrl":"https://doi.org/10.1109/IEMT.2008.5507862","url":null,"abstract":"Process window for Electro-chemical Deflash (ED) and High Pressure Water Jet (HPWJ) should be very well defined to ensure complete removal of organic materials on the surface of the frame prior to Metal Finishing (MF). This will help in ensuring complete coverage and good adhesion of metal finish. This will likewise avoid potential package defects like chipping, crack and delamination. In establishing the optimum window for ON Semiconductor Philippines Inc. (OSPI). ED and HPWJ . benchmarking study was performed and results were discussed to the selected Original Engineering Material (OEM) for the design of the machine. The benchmarking activity helped to determine potential failures of the process, the controls needed to monitor the process and the resources to set-up the machine. The resulting design was characterized using the Machine Process Capability Study (MPCpS). This involves five stages such as: 1) Process characterization where each machine and process parts and functions are defined. 2) Metrology characterization where response measuring equipment's precision and accuracy are tested and ensured capable prior to proceeding into the next stage. 3) Machine and Process Capability determination where sets of experiments are performed to determine the capability from the affected process up to the last process step. 4) Optimization if the process is found not capable or Machine and Process cliff if found capable. In this stage, window where the process will fail is determined, and finally 5) Control to ensure that defined capable window is maintained during production. OSPI's well characterized Deflash process has eliminated problems like Missing Lead Finish (MLF) and Resin Bleed (RB). It has also reduced Foreign Material problem by 90% and Tape and Reel final gate problem by 42%. It has helped increase Trim and Form's productivity by 25% by eliminating tin flakes on non-functional areas of the frame. Most of all, since the implementation of this project, there was no observed occurrence of package related problems.","PeriodicalId":151085,"journal":{"name":"2008 33rd IEEE/CPMT International Electronics Manufacturing Technology Conference (IEMT)","volume":"26 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121882255","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2008-11-01DOI: 10.1109/IEMT.2008.5507860
Song HuaJun
This technical paper presents the ultra low loop height challenges faced in the development of miniaturized SOT-923 package. It is drawn from the package development experiences for Flat Lead packages of 0.8 mm × 0.6 mm × 0.4 mm (SOD-923) which was successfully developed and introduced commercially. This product is mainly used on hand-held applications where the size has become smaller. Therefore, loop height is needed to be controlled very low. In order to achieve such low loop height, several solutions have been considered: i) Bonding mode selection; ii) capillary selection for ultra low loop requirement; iii) development of special bonding parameters for ultra low loop control. iv) final product quality evaluation and reliability requirement which included wire pull test, ball shear test, wire peeling test and reliability test.
本文介绍了小型化SOT-923封装开发中面临的超低环高挑战。它借鉴了0.8 mm × 0.6 mm × 0.4 mm平板引线封装(SOD-923)的封装开发经验，并已成功开发并商业化。该产品主要用于尺寸变小的手持应用。因此，回路高度需要控制得很低。为了实现如此低的环路高度，考虑了几种解决方案:i) Bonding mode的选择;Ii)超低回路要求的毛细管选择;Iii)开发用于超低回路控制的特殊键合参数。最终产品质量评价和可靠性要求，包括拉丝试验、球剪试验、剥丝试验和可靠性试验。
{"title":"Ultra low loop development","authors":"Song HuaJun","doi":"10.1109/IEMT.2008.5507860","DOIUrl":"https://doi.org/10.1109/IEMT.2008.5507860","url":null,"abstract":"This technical paper presents the ultra low loop height challenges faced in the development of miniaturized SOT-923 package. It is drawn from the package development experiences for Flat Lead packages of 0.8 mm × 0.6 mm × 0.4 mm (SOD-923) which was successfully developed and introduced commercially. This product is mainly used on hand-held applications where the size has become smaller. Therefore, loop height is needed to be controlled very low. In order to achieve such low loop height, several solutions have been considered: i) Bonding mode selection; ii) capillary selection for ultra low loop requirement; iii) development of special bonding parameters for ultra low loop control. iv) final product quality evaluation and reliability requirement which included wire pull test, ball shear test, wire peeling test and reliability test.","PeriodicalId":151085,"journal":{"name":"2008 33rd IEEE/CPMT International Electronics Manufacturing Technology Conference (IEMT)","volume":"22 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130588707","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2008-11-01DOI: 10.1109/IEMT.2008.5507873
Huang Guojun, Luan Jing-en, X. Baraton
After encapsulation, thermo-mechanical deformation builds up within the electronic packages due to temperature coefficient of expansion mismatch between the respective materials within the package as it cools to room temperature. As the trends in semiconductor packages continue toward a decrease in overall package size and an increase in functionality and performance requirements, they bring challenges of processing, handling, and understanding smaller components and, in particular, thinner dies. One of the reliability problems, die crack, becomes more serious due to the larger die area compared with package size, thinner thickness and thermal mismatch between the respective materials within the package. Die strength can be adversely affected during various manufacturing processes, such as grinding and chipping. A realistic understanding of the significance of processing on die strength is gained through the study of the actual, processed component. This work try to find the simple test method for determination of die strength to improve the scatter and try to differentiate the factors that affect the variability of die strength, in order to find out the causes of the weakness of the die strength. The surface conditions (roughness) of the specimens are determined by atomic force microscopy (AFM) and correlated to failure strength. A practical example is presented here that die cracking analysis has been done for a chip array thin core BGA (CTBGA) during thermal cycling. The die stress is calculated based on the finite element analysis (FEA) of CTBGA and the FEA-predicted die stress is used to predict the die failure rate compared with the experiment results.
{"title":"Characterization of silicon die strength with application to die crack analysis","authors":"Huang Guojun, Luan Jing-en, X. Baraton","doi":"10.1109/IEMT.2008.5507873","DOIUrl":"https://doi.org/10.1109/IEMT.2008.5507873","url":null,"abstract":"After encapsulation, thermo-mechanical deformation builds up within the electronic packages due to temperature coefficient of expansion mismatch between the respective materials within the package as it cools to room temperature. As the trends in semiconductor packages continue toward a decrease in overall package size and an increase in functionality and performance requirements, they bring challenges of processing, handling, and understanding smaller components and, in particular, thinner dies. One of the reliability problems, die crack, becomes more serious due to the larger die area compared with package size, thinner thickness and thermal mismatch between the respective materials within the package. Die strength can be adversely affected during various manufacturing processes, such as grinding and chipping. A realistic understanding of the significance of processing on die strength is gained through the study of the actual, processed component. This work try to find the simple test method for determination of die strength to improve the scatter and try to differentiate the factors that affect the variability of die strength, in order to find out the causes of the weakness of the die strength. The surface conditions (roughness) of the specimens are determined by atomic force microscopy (AFM) and correlated to failure strength. A practical example is presented here that die cracking analysis has been done for a chip array thin core BGA (CTBGA) during thermal cycling. The die stress is calculated based on the finite element analysis (FEA) of CTBGA and the FEA-predicted die stress is used to predict the die failure rate compared with the experiment results.","PeriodicalId":151085,"journal":{"name":"2008 33rd IEEE/CPMT International Electronics Manufacturing Technology Conference (IEMT)","volume":"111 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124722607","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2008-11-01DOI: 10.1109/IEMT.2008.5507875
F. Che, J. Luan, D. Yap, K. Goh, X. Baraton
With the increasing requirement for lead-free solders, it is desired to know how different solder alloys affect on reliability of microelectronic assembly. Some fatigue life models for Sn-Ag-Cu (SAC) solder have been developed by researchers. The Ni-dopant lead free solder is increasingly used in electronic packages due to its good drop performance. Currently, it lacks the fatigue life model for Ni doped SAC solder. In this paper, thermal cycling test and finite element simulation were conducted for 5 FBGA (Fine pitch BGA) assemblies with Sn-Ag-Cu-Ni (SACN) lead free solder. The thermal fatigue life prediction model was developed for FBGA assemblies with SACN solder by combining experimental and simulation results. The good correlation between predicted and experimental lives was achieved. In addition, the effect of geometry and loading condition on solder joint predicted life was investigated based on the finite element simulation result and the developed life model.
{"title":"Thermal cycling fatigue model development for FBGA assembly with Sn-Ag-based lead-free solder","authors":"F. Che, J. Luan, D. Yap, K. Goh, X. Baraton","doi":"10.1109/IEMT.2008.5507875","DOIUrl":"https://doi.org/10.1109/IEMT.2008.5507875","url":null,"abstract":"With the increasing requirement for lead-free solders, it is desired to know how different solder alloys affect on reliability of microelectronic assembly. Some fatigue life models for Sn-Ag-Cu (SAC) solder have been developed by researchers. The Ni-dopant lead free solder is increasingly used in electronic packages due to its good drop performance. Currently, it lacks the fatigue life model for Ni doped SAC solder. In this paper, thermal cycling test and finite element simulation were conducted for 5 FBGA (Fine pitch BGA) assemblies with Sn-Ag-Cu-Ni (SACN) lead free solder. The thermal fatigue life prediction model was developed for FBGA assemblies with SACN solder by combining experimental and simulation results. The good correlation between predicted and experimental lives was achieved. In addition, the effect of geometry and loading condition on solder joint predicted life was investigated based on the finite element simulation result and the developed life model.","PeriodicalId":151085,"journal":{"name":"2008 33rd IEEE/CPMT International Electronics Manufacturing Technology Conference (IEMT)","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114948903","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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