Pub Date : 2023-03-19DOI: 10.1109/APEC43580.2023.10131448
Yao Wang, R. Kheirollahi, F. Lu, Hua Zhang
Silicon carbide (SiC) MOSFET has significantly facilitated high-power and high-frequency inverter design for wireless power transfer (WPT) systems. However, in the multi-kW multi-MHz area, the application of the SiC full-bridge inverter is still insufficient. This paper aims to explore the switching limit of SiC full-bridge inverter at multi-kW power levels and provides a methodology for MOSFET selection, inverter circuit design, and zero-voltage switching (ZVS) realization. Two sets of inverters are respectively implemented based on isolated gate driver UCC5390 and non-isolated IXRFD631 and tested at a switching frequency of 3MHz-4MHz and an input dc voltage of 350V~550V. The experimental results firstly reveal the potential and capability of a SiC full-bridge inverter in achieving kilowatts high power level at multi-MHz switching frequency with 4.39kW at 3MHz and 3.19kW at 4MHz, and a switching limit of 4MHz is proposed for the SiC full-bridge inverter with overall consideration of ZVS availability and inverter safety.
{"title":"Exploring Switching Limit of SiC Inverter for Multi-kW Multi-MHz Wireless Power Transfer System","authors":"Yao Wang, R. Kheirollahi, F. Lu, Hua Zhang","doi":"10.1109/APEC43580.2023.10131448","DOIUrl":"https://doi.org/10.1109/APEC43580.2023.10131448","url":null,"abstract":"Silicon carbide (SiC) MOSFET has significantly facilitated high-power and high-frequency inverter design for wireless power transfer (WPT) systems. However, in the multi-kW multi-MHz area, the application of the SiC full-bridge inverter is still insufficient. This paper aims to explore the switching limit of SiC full-bridge inverter at multi-kW power levels and provides a methodology for MOSFET selection, inverter circuit design, and zero-voltage switching (ZVS) realization. Two sets of inverters are respectively implemented based on isolated gate driver UCC5390 and non-isolated IXRFD631 and tested at a switching frequency of 3MHz-4MHz and an input dc voltage of 350V~550V. The experimental results firstly reveal the potential and capability of a SiC full-bridge inverter in achieving kilowatts high power level at multi-MHz switching frequency with 4.39kW at 3MHz and 3.19kW at 4MHz, and a switching limit of 4MHz is proposed for the SiC full-bridge inverter with overall consideration of ZVS availability and inverter safety.","PeriodicalId":151216,"journal":{"name":"2023 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2023-03-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131892373","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-03-19DOI: 10.1109/APEC43580.2023.10131318
Shantanu Gupta, S. Mazumder
In this paper, a novel steady-state modeling technique is introduced for resonant pulse width modulation (PWM) active-clamp (PAC)-Ćuk dc/dc converters. The PAC-Ćuk dc/dc converter is equipped with two clamping circuits which enable ZVS turn-on of all the switches resulting in high-efficiency operation of the converter. A resonant form of PAC-Ćuk dc/dc converter is introduced and studied using the modeling technique to develop the output power and series inductor current dependency on the control parameters. As the resonance introduces high nonlinearity in the analysis, the traditional steady-state modeling generates erroneous results. Hence, a closed-form LC resonant modeling technique developed in this paper is used to analyze the impact of resonance on the PAC-Ćuk dc/dc converter. The resonant model is developed using the superimposition and state-plane trajectory technique. The developed resonant modeling technique delivers an exact solution for a resonant LC link connected across two active voltage sources which applies to other resonant converters.
{"title":"Analysis of Resonant PWM Active-clamp Ćuk DC/DC Converter","authors":"Shantanu Gupta, S. Mazumder","doi":"10.1109/APEC43580.2023.10131318","DOIUrl":"https://doi.org/10.1109/APEC43580.2023.10131318","url":null,"abstract":"In this paper, a novel steady-state modeling technique is introduced for resonant pulse width modulation (PWM) active-clamp (PAC)-Ćuk dc/dc converters. The PAC-Ćuk dc/dc converter is equipped with two clamping circuits which enable ZVS turn-on of all the switches resulting in high-efficiency operation of the converter. A resonant form of PAC-Ćuk dc/dc converter is introduced and studied using the modeling technique to develop the output power and series inductor current dependency on the control parameters. As the resonance introduces high nonlinearity in the analysis, the traditional steady-state modeling generates erroneous results. Hence, a closed-form LC resonant modeling technique developed in this paper is used to analyze the impact of resonance on the PAC-Ćuk dc/dc converter. The resonant model is developed using the superimposition and state-plane trajectory technique. The developed resonant modeling technique delivers an exact solution for a resonant LC link connected across two active voltage sources which applies to other resonant converters.","PeriodicalId":151216,"journal":{"name":"2023 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2023-03-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131236177","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-03-19DOI: 10.1109/APEC43580.2023.10131131
Yanda Lyu, Bima Nugraha Sanusi, Z. Ouyang
As a popular topology in point of load (PoL) application, multiphase buck converter always faces a trade-off problem between faster load-transient response and smaller inductor ripple current, which is solved by the coupled inductor in a number of literatures. This paper is aimed at modeling and analysis for a four-legged integrated indirect coupled inductor applied in a four-phase buck converter for 5 V DC to PoL application. The quantitative analysis is conducted through an equivalent steady-state inductance model. Inductor operation is investigated under different duty cycle in the circuit simulation using parameters extracted from FEM simulation. The result is then verified using a highly compact converter prototype. Finally, efficiency performance of the prototype is tested for seeing the integrated inductor practical value in industry.
作为负载点(PoL)应用中的一种常用拓扑结构，多相降压变换器总是面临更快的负载瞬态响应和更小的电感纹波电流之间的权衡问题，在许多文献中采用耦合电感来解决这一问题。本文旨在对应用于5 V DC - PoL四相降压变换器的四足集成间接耦合电感进行建模和分析。通过等效稳态电感模型进行定量分析。利用有限元仿真中提取的参数，研究了电感器在不同占空比下的工作情况。然后使用高度紧凑的转换器原型验证了结果。最后，对样机的效率性能进行了测试，以检验集成电感在工业上的实用价值。
{"title":"Modeling and Analysis of Coupling Effect in Four Legged Core for Multi-phase Buck Converter","authors":"Yanda Lyu, Bima Nugraha Sanusi, Z. Ouyang","doi":"10.1109/APEC43580.2023.10131131","DOIUrl":"https://doi.org/10.1109/APEC43580.2023.10131131","url":null,"abstract":"As a popular topology in point of load (PoL) application, multiphase buck converter always faces a trade-off problem between faster load-transient response and smaller inductor ripple current, which is solved by the coupled inductor in a number of literatures. This paper is aimed at modeling and analysis for a four-legged integrated indirect coupled inductor applied in a four-phase buck converter for 5 V DC to PoL application. The quantitative analysis is conducted through an equivalent steady-state inductance model. Inductor operation is investigated under different duty cycle in the circuit simulation using parameters extracted from FEM simulation. The result is then verified using a highly compact converter prototype. Finally, efficiency performance of the prototype is tested for seeing the integrated inductor practical value in industry.","PeriodicalId":151216,"journal":{"name":"2023 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2023-03-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133066219","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-03-19DOI: 10.1109/APEC43580.2023.10131231
B. Bokmans, B. Vermulst, J. Schellekens
Digital Delta-Sigma modulators can be an interesting alternative to Pulse Width Modulation for generating switching signals of a power converter. Their noise-shaping behavior results in low output distortion for output frequencies well below the modulation frequency. To directly generate the switch control signals of a traditional DC-DC converter, a first-order modulator with a two-level quantizer is preferred as they are inherently stable for the entire output range. However, the noise attenuation of a first-order modulator is limited to 20dB per decade for frequencies below the modulation frequency. Additionally, they suffer from limit cycles due to the low modulator order and 2-level quantizer resolution. To overcome this problem, a fast feedback loop is proposed that acts on disturbances introduced by the quantizer and compensates low frequency noise. As a result, an improved Delta-Sigma modulator is obtained that remains stable for almost the entire output range but also provides improved noise attenuation like that of a second-order modulator. Moreover, the output noise signature is whitened resulting in less power being present at the limit cycle frequencies.
{"title":"Improved Delta-Sigma Modulator for Direct Switch Control of a DC-DC Converter","authors":"B. Bokmans, B. Vermulst, J. Schellekens","doi":"10.1109/APEC43580.2023.10131231","DOIUrl":"https://doi.org/10.1109/APEC43580.2023.10131231","url":null,"abstract":"Digital Delta-Sigma modulators can be an interesting alternative to Pulse Width Modulation for generating switching signals of a power converter. Their noise-shaping behavior results in low output distortion for output frequencies well below the modulation frequency. To directly generate the switch control signals of a traditional DC-DC converter, a first-order modulator with a two-level quantizer is preferred as they are inherently stable for the entire output range. However, the noise attenuation of a first-order modulator is limited to 20dB per decade for frequencies below the modulation frequency. Additionally, they suffer from limit cycles due to the low modulator order and 2-level quantizer resolution. To overcome this problem, a fast feedback loop is proposed that acts on disturbances introduced by the quantizer and compensates low frequency noise. As a result, an improved Delta-Sigma modulator is obtained that remains stable for almost the entire output range but also provides improved noise attenuation like that of a second-order modulator. Moreover, the output noise signature is whitened resulting in less power being present at the limit cycle frequencies.","PeriodicalId":151216,"journal":{"name":"2023 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2023-03-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123185557","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-03-19DOI: 10.1109/APEC43580.2023.10131159
Zheqing Li, Feng Jin, Yi-Hsun Hsieh, Qiang Li
A Solid-state transformer directly reduces medium voltage to low voltage (e.g. 400 V) with minimized power conversion stages. Insulation structure is the bottleneck of DC-DC module in SST from insulation effectiveness, manufacturing process, thermal management, and power density point of view. In this paper, a compact PCB-winding transformer structure is proposed to handle the medium voltage insulation by FR4 in PCB-winding. The primary side winding is built in PCB-winding and secondary side winding is still Litz wire for a lower loss. With semi-conductive shielding and stress grading layer design, the E-field can be restrained in the primary side PCB for a partial discharge free insulation. An arc section winding structure is proposed to reduce the high E-field inside the insulation layer to improve insulation performance. The layer-to-layer winding resistance and overall loss/footprint trade-off is analyzed for a low loss design. Finally, the design is demonstrated on an 800/400V, 15-kW, 200-kHz CLLC converter with 98.8% peak efficiency and 130W/in3 power density, whose transformer achieves partial discharge free up to 14.6kV.
{"title":"A High-Frequency PCB-Winding Transformer Design with Medium Voltage Insulation for Solid-State Transformer","authors":"Zheqing Li, Feng Jin, Yi-Hsun Hsieh, Qiang Li","doi":"10.1109/APEC43580.2023.10131159","DOIUrl":"https://doi.org/10.1109/APEC43580.2023.10131159","url":null,"abstract":"A Solid-state transformer directly reduces medium voltage to low voltage (e.g. 400 V) with minimized power conversion stages. Insulation structure is the bottleneck of DC-DC module in SST from insulation effectiveness, manufacturing process, thermal management, and power density point of view. In this paper, a compact PCB-winding transformer structure is proposed to handle the medium voltage insulation by FR4 in PCB-winding. The primary side winding is built in PCB-winding and secondary side winding is still Litz wire for a lower loss. With semi-conductive shielding and stress grading layer design, the E-field can be restrained in the primary side PCB for a partial discharge free insulation. An arc section winding structure is proposed to reduce the high E-field inside the insulation layer to improve insulation performance. The layer-to-layer winding resistance and overall loss/footprint trade-off is analyzed for a low loss design. Finally, the design is demonstrated on an 800/400V, 15-kW, 200-kHz CLLC converter with 98.8% peak efficiency and 130W/in3 power density, whose transformer achieves partial discharge free up to 14.6kV.","PeriodicalId":151216,"journal":{"name":"2023 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2023-03-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128815013","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-03-19DOI: 10.1109/APEC43580.2023.10131644
L. Gill, L. Rashkin, L. Yates, J. Neely, R. Kaplar
Transportation electrification is rapidly gaining momentum to reduce greenhouse gas emissions and carbon foot-prints. To help accelerate a swift transition to decarbonization, alternative modes of transportation, such as electric vehicles (EV) must provide superior performance and competitive advantages in regards to reliability (longevity), efficiency (fuel economy), and volumetric energy or power density (compact integration) in contrast to fossil fuel-powered transports. However, achieving optimum designs is challenging due to the multiple physical domain interactions between thermal, electrical, and mechanical systems within an EV drivetrain. Hence, this paper focuses on the multi-parametric design analysis of the EV traction inverter system to perform trade-off studies between two competing objectives: reliability and efficiency. A seamless performance evaluation process was developed between PLECS, a simulation platform for power electronic systems and the optimization computation of genetic algorithm based on NSGA-II in Python to achieve a reliable repetition of varied operating modes of the inverter to seek optimized parameters and non-dominant solutions. A realistic, high-fidelity, and multi-domain EV model based on the known physical parameters of Nissan Leaf was developed in PLECS along with a dynamic driving profile. The paper further discusses parametric design analysis and comparison based on different power module materials and operating conditions, such as EV battery voltage and power module switching frequency. The simulation results show that an optimized SiC solution can provide a higher efficiency design whereas higher reliability can be expected with the optimized IGBT-based designs.
{"title":"Multi-Objective Parametric Analysis of EV Traction Inverter between Reliability and Efficiency","authors":"L. Gill, L. Rashkin, L. Yates, J. Neely, R. Kaplar","doi":"10.1109/APEC43580.2023.10131644","DOIUrl":"https://doi.org/10.1109/APEC43580.2023.10131644","url":null,"abstract":"Transportation electrification is rapidly gaining momentum to reduce greenhouse gas emissions and carbon foot-prints. To help accelerate a swift transition to decarbonization, alternative modes of transportation, such as electric vehicles (EV) must provide superior performance and competitive advantages in regards to reliability (longevity), efficiency (fuel economy), and volumetric energy or power density (compact integration) in contrast to fossil fuel-powered transports. However, achieving optimum designs is challenging due to the multiple physical domain interactions between thermal, electrical, and mechanical systems within an EV drivetrain. Hence, this paper focuses on the multi-parametric design analysis of the EV traction inverter system to perform trade-off studies between two competing objectives: reliability and efficiency. A seamless performance evaluation process was developed between PLECS, a simulation platform for power electronic systems and the optimization computation of genetic algorithm based on NSGA-II in Python to achieve a reliable repetition of varied operating modes of the inverter to seek optimized parameters and non-dominant solutions. A realistic, high-fidelity, and multi-domain EV model based on the known physical parameters of Nissan Leaf was developed in PLECS along with a dynamic driving profile. The paper further discusses parametric design analysis and comparison based on different power module materials and operating conditions, such as EV battery voltage and power module switching frequency. The simulation results show that an optimized SiC solution can provide a higher efficiency design whereas higher reliability can be expected with the optimized IGBT-based designs.","PeriodicalId":151216,"journal":{"name":"2023 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2023-03-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128866150","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-03-19DOI: 10.1109/APEC43580.2023.10131308
Min Gao, Hebert Lopez Herrera, Jinyeong Moon
Magnetic energy harvesting (MEH) extracts energy from magnetic fields generated from AC current, providing power for environmental sensors, Internet of Things (IoTs), and monitoring nodes. The cascaded-magnetic-based electromagnetic energy harvesters, consisting of a clampable core and a high-permeability ungapped core, feature relatively higher density and predictability in energy harvesting. The clampable core only facilitates a non-intrusive mounting of the energy harvester onto the primary wire while the high-permeability core is the heart of the energy harvester to guarantee the maximum power extraction and usable output voltage. Therefore, reducing the clampable core size is critical to increase the power density without drastic power degradation. This article first presents the optimization conditions of the clampable core volume based on the harvested power level and other design requirements. FEM simulations using Ansys Maxwell and LTspice simulations are both executed to show the influence of the core parameters on the amount of harvested power and core saturation. This paper also presents an energy improvement method, controlling power transfer window via active switches, to improve the harvested power level. The boosted power is evaluated in this paper via experimental results.
{"title":"Optimization of Core Size and Harvested Power for Magnetic Energy Harvesters based on Cascaded Magnetics","authors":"Min Gao, Hebert Lopez Herrera, Jinyeong Moon","doi":"10.1109/APEC43580.2023.10131308","DOIUrl":"https://doi.org/10.1109/APEC43580.2023.10131308","url":null,"abstract":"Magnetic energy harvesting (MEH) extracts energy from magnetic fields generated from AC current, providing power for environmental sensors, Internet of Things (IoTs), and monitoring nodes. The cascaded-magnetic-based electromagnetic energy harvesters, consisting of a clampable core and a high-permeability ungapped core, feature relatively higher density and predictability in energy harvesting. The clampable core only facilitates a non-intrusive mounting of the energy harvester onto the primary wire while the high-permeability core is the heart of the energy harvester to guarantee the maximum power extraction and usable output voltage. Therefore, reducing the clampable core size is critical to increase the power density without drastic power degradation. This article first presents the optimization conditions of the clampable core volume based on the harvested power level and other design requirements. FEM simulations using Ansys Maxwell and LTspice simulations are both executed to show the influence of the core parameters on the amount of harvested power and core saturation. This paper also presents an energy improvement method, controlling power transfer window via active switches, to improve the harvested power level. The boosted power is evaluated in this paper via experimental results.","PeriodicalId":151216,"journal":{"name":"2023 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2023-03-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134637202","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-03-19DOI: 10.1109/APEC43580.2023.10131530
Animesh Kundu, P. Korta, L. V. Iyer, N. Kar
Semiconductor advancement towards high power density and high temperature operation call for compact design; however, this accelerates material degradation due to additional stress in high operating conditions, which leads to failure. The rate of failure of a power module (PM) is directly related to operating temperature, its' variation and distribution. As a result, temperature dependent offline reliability estimation with thermal network or finite element (FEA) based analysis has received much attention in the recent past. However, these conventional approaches only estimate degradation rating based on a constant mission profile, applied load, and initial condition of the PM, which can increase estimation error due to random load profile and aging of PM material substances. Therefore, a novel thermal network model has been developed considering the aging factor for online state-of-health (SOH) monitoring. Towards this objective, an advanced loss model is developed in a non-invasive method with semiconductors' change in electro-thermal properties with temperature. The resultant heat loss is used to track junction temperature using Cauer thermal model considering PM geometry and material properties. The model is improved with online thermal characterization in healthy and degraded conditions. Subsequently, the model has been updated with cross-coupling effect between semiconductors using FEA. The developed model is validated with an electric vehicle (EV) traction inverter module.
{"title":"Power Module Thermal Characterization Considering Aging Towards Online State-of-Health Monitoring","authors":"Animesh Kundu, P. Korta, L. V. Iyer, N. Kar","doi":"10.1109/APEC43580.2023.10131530","DOIUrl":"https://doi.org/10.1109/APEC43580.2023.10131530","url":null,"abstract":"Semiconductor advancement towards high power density and high temperature operation call for compact design; however, this accelerates material degradation due to additional stress in high operating conditions, which leads to failure. The rate of failure of a power module (PM) is directly related to operating temperature, its' variation and distribution. As a result, temperature dependent offline reliability estimation with thermal network or finite element (FEA) based analysis has received much attention in the recent past. However, these conventional approaches only estimate degradation rating based on a constant mission profile, applied load, and initial condition of the PM, which can increase estimation error due to random load profile and aging of PM material substances. Therefore, a novel thermal network model has been developed considering the aging factor for online state-of-health (SOH) monitoring. Towards this objective, an advanced loss model is developed in a non-invasive method with semiconductors' change in electro-thermal properties with temperature. The resultant heat loss is used to track junction temperature using Cauer thermal model considering PM geometry and material properties. The model is improved with online thermal characterization in healthy and degraded conditions. Subsequently, the model has been updated with cross-coupling effect between semiconductors using FEA. The developed model is validated with an electric vehicle (EV) traction inverter module.","PeriodicalId":151216,"journal":{"name":"2023 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2023-03-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127242617","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-03-19DOI: 10.1109/APEC43580.2023.10131553
D. Menzi, F. Krismer, T. Ohno, J. Huber, J. Kolar, J. Everts
Future three-phase ac-dc converter systems ideally allow for bidirectional power flow, provide high-frequency isolation, and feature buck-boost capability. Further, high efficiency and high compactness and the applicability of standard half-bridge and/or three-phase full-bridge (B6) semiconductor arrangements are crucial aspects. This Paper proposes a novel converter concept that employs B6-type circuits on the input and on the output side and a low-complexity Discontinuous Conduction Mode (DCM)-type or a Dual Active Bridge (DAB)-type modulation strategy, thereby enabling single-stage isolated three-phase ac-dc power conversion with sinusoidal grid currents and controlled dc output voltage. The converter operation is detailed on the switching-frequency and on the grid-frequency time scale and verified by means of circuit simulations. The converter control characteristic and the main power component stresses are discussed and design guidelines for a 6.6 kW prototype system with an expected efficiency $eta > 98%$ are presented. Finally, an outlook on future research related to the practical realization and advanced modulation of the topology is provided.
{"title":"Novel Bidirectional Single-Stage Isolated Three-Phase Buck-Boost PFC Rectifier System","authors":"D. Menzi, F. Krismer, T. Ohno, J. Huber, J. Kolar, J. Everts","doi":"10.1109/APEC43580.2023.10131553","DOIUrl":"https://doi.org/10.1109/APEC43580.2023.10131553","url":null,"abstract":"Future three-phase ac-dc converter systems ideally allow for bidirectional power flow, provide high-frequency isolation, and feature buck-boost capability. Further, high efficiency and high compactness and the applicability of standard half-bridge and/or three-phase full-bridge (B6) semiconductor arrangements are crucial aspects. This Paper proposes a novel converter concept that employs B6-type circuits on the input and on the output side and a low-complexity Discontinuous Conduction Mode (DCM)-type or a Dual Active Bridge (DAB)-type modulation strategy, thereby enabling single-stage isolated three-phase ac-dc power conversion with sinusoidal grid currents and controlled dc output voltage. The converter operation is detailed on the switching-frequency and on the grid-frequency time scale and verified by means of circuit simulations. The converter control characteristic and the main power component stresses are discussed and design guidelines for a 6.6 kW prototype system with an expected efficiency $eta > 98%$ are presented. Finally, an outlook on future research related to the practical realization and advanced modulation of the topology is provided.","PeriodicalId":151216,"journal":{"name":"2023 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2023-03-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133808135","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-03-19DOI: 10.1109/APEC43580.2023.10131562
W. Khan, Armin Ebrahimian, S. S., M. Abarzadeh, N. Weise
This digest presents a computationally efficient multi-objective direct model predictive control of grid-tied 3L-active neutral-point clamped converter (ANPC) with an output LCL filter. The ANPC topology is widely used as an interface for efficient power conversion in medium-high power applications. Direct MPC allows fast and decoupled control of state-variables through a user defined cost function. However, the state-variable predictions require iteration of 27 switching vectors which increases the computational burden, making the deployment of the controller infeasible to low-cost mass-marketed DSPs. The method presented in this study restricts the number of switching states being checked through a limitation criteria. The criteria reduces the number of states being checked from 27 to just 7 at maximum, making the computational burden identical to that of a six switch 2L-VSC. The presented approach is verified by deploying the controller on a TMS320F28379D DSP and the plant on PLECS RTBox 3. In addition, the presented method is compared against an existing state-of-the-art state vector limitation technique. The results show an improvement in grid current THD throughout the power range at the expense of marginal increase in switching frequency of the converter.
{"title":"Limited States Multi-Objective Direct Model Predictive Control of a Grid-Tied 3L-Active Neutral-Point Clamped Converter with an LCL Filter","authors":"W. Khan, Armin Ebrahimian, S. S., M. Abarzadeh, N. Weise","doi":"10.1109/APEC43580.2023.10131562","DOIUrl":"https://doi.org/10.1109/APEC43580.2023.10131562","url":null,"abstract":"This digest presents a computationally efficient multi-objective direct model predictive control of grid-tied 3L-active neutral-point clamped converter (ANPC) with an output LCL filter. The ANPC topology is widely used as an interface for efficient power conversion in medium-high power applications. Direct MPC allows fast and decoupled control of state-variables through a user defined cost function. However, the state-variable predictions require iteration of 27 switching vectors which increases the computational burden, making the deployment of the controller infeasible to low-cost mass-marketed DSPs. The method presented in this study restricts the number of switching states being checked through a limitation criteria. The criteria reduces the number of states being checked from 27 to just 7 at maximum, making the computational burden identical to that of a six switch 2L-VSC. The presented approach is verified by deploying the controller on a TMS320F28379D DSP and the plant on PLECS RTBox 3. In addition, the presented method is compared against an existing state-of-the-art state vector limitation technique. The results show an improvement in grid current THD throughout the power range at the expense of marginal increase in switching frequency of the converter.","PeriodicalId":151216,"journal":{"name":"2023 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2023-03-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115051285","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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