Pub Date : 2009-03-14DOI: 10.1109/MSPCT.2009.5164198
P. Beg, I. A. Khan, Muslim T. Ahmed
In this paper a Tunable four phase sinusoidal quadrature oscillator is realized using CMOS multi-output second generation current conveyors (MOCCIIs). The circuit uses only two CMOS MOCCII and provides four phase quadrature voltage outputs with equal magnitude at the oscillating frequency. The oscillator also exhibits independent frequency control. The proposed circuit is designed and verified using PSPICE simulation.
{"title":"Tunable four phase voltage mode quadrature oscillator using two CMOS MOCCIIs","authors":"P. Beg, I. A. Khan, Muslim T. Ahmed","doi":"10.1109/MSPCT.2009.5164198","DOIUrl":"https://doi.org/10.1109/MSPCT.2009.5164198","url":null,"abstract":"In this paper a Tunable four phase sinusoidal quadrature oscillator is realized using CMOS multi-output second generation current conveyors (MOCCIIs). The circuit uses only two CMOS MOCCII and provides four phase quadrature voltage outputs with equal magnitude at the oscillating frequency. The oscillator also exhibits independent frequency control. The proposed circuit is designed and verified using PSPICE simulation.","PeriodicalId":179541,"journal":{"name":"2009 International Multimedia, Signal Processing and Communication Technologies","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2009-03-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123092495","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2009-03-14DOI: 10.1109/MSPCT.2009.5164231
M. S. Ansari, Syed Atiqur Rahman
A novel current-mode neural circuit employing non-linear feedback to solve a system of simultaneous linear equations is presented. The circuit has an associated transcendental energy function that ensures fast convergence to the exact solution while enjoying a resistor-less implementation. The hardware complexity of the proposed scheme compares favourably with existing voltage-mode neural circuits for the same task. PSPICE simulation results are presented for a chosen set of equations and are found to be in agreement with the algebraic solution.
{"title":"A novel current-mode non-linear feedback neural circuit for solving linear equations","authors":"M. S. Ansari, Syed Atiqur Rahman","doi":"10.1109/MSPCT.2009.5164231","DOIUrl":"https://doi.org/10.1109/MSPCT.2009.5164231","url":null,"abstract":"A novel current-mode neural circuit employing non-linear feedback to solve a system of simultaneous linear equations is presented. The circuit has an associated transcendental energy function that ensures fast convergence to the exact solution while enjoying a resistor-less implementation. The hardware complexity of the proposed scheme compares favourably with existing voltage-mode neural circuits for the same task. PSPICE simulation results are presented for a chosen set of equations and are found to be in agreement with the algebraic solution.","PeriodicalId":179541,"journal":{"name":"2009 International Multimedia, Signal Processing and Communication Technologies","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2009-03-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121963684","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2009-03-14DOI: 10.1109/MSPCT.2009.5164163
R. Pandey, Maneesha Gupta
This paper proposes a novel Floating gate MOSFET (FGMOS) based voltage-controlled grounded resistor (VCGR). The FGMOS is used to cancel the nonlinearity term present in the drain current equation of MOSFET operating in ohmic region. The implementation of nth order tunable high-pass filter using the proposed VCGR is also suggested. The proposed VCGR is simple, compact, accurate, and with low power dissipation of 2.61µW. The circuits are simulated using SPICE for 0.5µm CMOS technology to demonstrate the effectiveness of the circuits.
{"title":"A novel voltage-controlled grounded resistor using FGMOS technique","authors":"R. Pandey, Maneesha Gupta","doi":"10.1109/MSPCT.2009.5164163","DOIUrl":"https://doi.org/10.1109/MSPCT.2009.5164163","url":null,"abstract":"This paper proposes a novel Floating gate MOSFET (FGMOS) based voltage-controlled grounded resistor (VCGR). The FGMOS is used to cancel the nonlinearity term present in the drain current equation of MOSFET operating in ohmic region. The implementation of nth order tunable high-pass filter using the proposed VCGR is also suggested. The proposed VCGR is simple, compact, accurate, and with low power dissipation of 2.61µW. The circuits are simulated using SPICE for 0.5µm CMOS technology to demonstrate the effectiveness of the circuits.","PeriodicalId":179541,"journal":{"name":"2009 International Multimedia, Signal Processing and Communication Technologies","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2009-03-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131512618","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2009-03-14DOI: 10.1109/MSPCT.2009.5164171
K. A. Kadir, M. Hasan
Carbon nanotube field effect transistors (CNFETs) are already competitive in some respects with state-of-art silicon transistors, and are promising candidates for future nano-electronic devices. The ability of CNFET for using high K-dielectric provides high insulator capacitance which improves the gate control and also lowers gate leakage. This paper proposes new energy efficient CNFETs based drivers operating in the ballistic mode, for the routing interconnects of FPGAs. HSPICE simulation based on BPTM (Berkeley predictive technology model) for 32nm channel length device at operating frequency of 500MHz shows that the scaled CNFETs drivers provides very good performance even at lower supply voltage for interconnect length of 1000um. The paper shows that the different schemes of CNFETs based optimized-drivers operating at VDD=0.3v are more energy efficient than the driver operating on VDD=0.9v
{"title":"Energy efficient high speed CNFET based interconnect drivers for FPGAS","authors":"K. A. Kadir, M. Hasan","doi":"10.1109/MSPCT.2009.5164171","DOIUrl":"https://doi.org/10.1109/MSPCT.2009.5164171","url":null,"abstract":"Carbon nanotube field effect transistors (CNFETs) are already competitive in some respects with state-of-art silicon transistors, and are promising candidates for future nano-electronic devices. The ability of CNFET for using high K-dielectric provides high insulator capacitance which improves the gate control and also lowers gate leakage. This paper proposes new energy efficient CNFETs based drivers operating in the ballistic mode, for the routing interconnects of FPGAs. HSPICE simulation based on BPTM (Berkeley predictive technology model) for 32nm channel length device at operating frequency of 500MHz shows that the scaled CNFETs drivers provides very good performance even at lower supply voltage for interconnect length of 1000um. The paper shows that the different schemes of CNFETs based optimized-drivers operating at VDD=0.3v are more energy efficient than the driver operating on VDD=0.9v","PeriodicalId":179541,"journal":{"name":"2009 International Multimedia, Signal Processing and Communication Technologies","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2009-03-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132198814","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2009-03-14DOI: 10.1109/MSPCT.2009.5164203
Ali A. Al - Zuky, Firas S. Mohammed, H. J. M. Al-Taa'y
The study of satellite image is one of the important subject in image processing and especially in the developer of communication, therefore, we introduce minimum correlation method to evaluate the quality of satellite image, so we test our method in three satellite channel Arabsat, Nilesat and Hotbird, this study depend on the automatic search for minimum correlation of (40×40) sliding box for three channels, this way give us obvious result to distinguish between the quality of any channel, and the result is the Hotbird the better from the others.
{"title":"Evaluate the quality of satellite image depending on the correlation","authors":"Ali A. Al - Zuky, Firas S. Mohammed, H. J. M. Al-Taa'y","doi":"10.1109/MSPCT.2009.5164203","DOIUrl":"https://doi.org/10.1109/MSPCT.2009.5164203","url":null,"abstract":"The study of satellite image is one of the important subject in image processing and especially in the developer of communication, therefore, we introduce minimum correlation method to evaluate the quality of satellite image, so we test our method in three satellite channel Arabsat, Nilesat and Hotbird, this study depend on the automatic search for minimum correlation of (40×40) sliding box for three channels, this way give us obvious result to distinguish between the quality of any channel, and the result is the Hotbird the better from the others.","PeriodicalId":179541,"journal":{"name":"2009 International Multimedia, Signal Processing and Communication Technologies","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2009-03-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131700152","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2009-03-14DOI: 10.1109/MSPCT.2009.5164206
J. Mohan, S. Maheshwari, Sajai Vir Singh, Durg Singh Chauhan
This paper presents a new Single Input Multiple Output (SIMO) versatile biquad Filter based on fully differential current conveyor (FDCCII). The filter uses grounded passive components suitable for monolithic implementation. The proposed circuit realizes all the standard filter functions in voltage and current form, that is, high-pass, band-pass, low-pass, notch, and all-pass filters simultaneously without changing the passive elements. PSPICE simulation results are given to verify the proposed circuit.
{"title":"High input impedance SIMO versatile biquad filter","authors":"J. Mohan, S. Maheshwari, Sajai Vir Singh, Durg Singh Chauhan","doi":"10.1109/MSPCT.2009.5164206","DOIUrl":"https://doi.org/10.1109/MSPCT.2009.5164206","url":null,"abstract":"This paper presents a new Single Input Multiple Output (SIMO) versatile biquad Filter based on fully differential current conveyor (FDCCII). The filter uses grounded passive components suitable for monolithic implementation. The proposed circuit realizes all the standard filter functions in voltage and current form, that is, high-pass, band-pass, low-pass, notch, and all-pass filters simultaneously without changing the passive elements. PSPICE simulation results are given to verify the proposed circuit.","PeriodicalId":179541,"journal":{"name":"2009 International Multimedia, Signal Processing and Communication Technologies","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2009-03-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114768300","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2009-03-14DOI: 10.1109/MSPCT.2009.5164176
Prarthan D. Mehta
The activities related to IRNSS (Indian Regional Navigational Satellite System) are at the peak at this time. It includes the integration of GPS, GNSS (Global Navigational Satellite System) and Galileo navigational systems. The single chip solution looks at integrating the RF/IF block with the digital signal processing block on a single chip. Such solutions invoke the possibilities of integrating GPS with the technologies like GPRS, GSM, etc [1, 2]. The goal of the experiment is to implement and authenticate the GPS system on the Texas Instrument DSK TMS320C6713. As a part of that in this paper an approach to implement and authenticate the GPS transmitter on the DSK is described. MATLAB is used to implement each blocks of GPS transmitter. First part of the paper describes the software implementation of the GPS transmitter, and the later part contains the description of the hardware implementation and the authentication of the same.
{"title":"A method for authentication of the GPS transmitter","authors":"Prarthan D. Mehta","doi":"10.1109/MSPCT.2009.5164176","DOIUrl":"https://doi.org/10.1109/MSPCT.2009.5164176","url":null,"abstract":"The activities related to IRNSS (Indian Regional Navigational Satellite System) are at the peak at this time. It includes the integration of GPS, GNSS (Global Navigational Satellite System) and Galileo navigational systems. The single chip solution looks at integrating the RF/IF block with the digital signal processing block on a single chip. Such solutions invoke the possibilities of integrating GPS with the technologies like GPRS, GSM, etc [1, 2]. The goal of the experiment is to implement and authenticate the GPS system on the Texas Instrument DSK TMS320C6713. As a part of that in this paper an approach to implement and authenticate the GPS transmitter on the DSK is described. MATLAB is used to implement each blocks of GPS transmitter. First part of the paper describes the software implementation of the GPS transmitter, and the later part contains the description of the hardware implementation and the authentication of the same.","PeriodicalId":179541,"journal":{"name":"2009 International Multimedia, Signal Processing and Communication Technologies","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2009-03-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125628857","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2009-03-14DOI: 10.1109/MSPCT.2009.5164226
Musheer Ahmad, Izharuddin
Global System for Mobile communication (GSM) uses A5/1 stream cipher to encrypt the information transmitted between subscribers mobile and the base station. Recent research studies show that A5/1 cipher has some limitations, due to which it is susceptible to various cryptographic attacks. It has weak clocking mechanism and output bit sequence of A5/1 has low value of linear complexity. In this paper, we present an enhanced scheme of A5/1 encryption algorithm, in which the clocking mechanism is improved and linear combining function of A5/1 is replaced with two cryptographically better nonlinear functions to strengthen the cipher. It has been observed that the enhanced scheme has much better and more irregular clocking. It is shown that the proposed scheme provides improvement in the value of linear complexity of output bit sequence generated. Both the designs are coded in VHDL and synthesized on FPGA device.
{"title":"Enhanced A5/1 cipher with improved linear complexity","authors":"Musheer Ahmad, Izharuddin","doi":"10.1109/MSPCT.2009.5164226","DOIUrl":"https://doi.org/10.1109/MSPCT.2009.5164226","url":null,"abstract":"Global System for Mobile communication (GSM) uses A5/1 stream cipher to encrypt the information transmitted between subscribers mobile and the base station. Recent research studies show that A5/1 cipher has some limitations, due to which it is susceptible to various cryptographic attacks. It has weak clocking mechanism and output bit sequence of A5/1 has low value of linear complexity. In this paper, we present an enhanced scheme of A5/1 encryption algorithm, in which the clocking mechanism is improved and linear combining function of A5/1 is replaced with two cryptographically better nonlinear functions to strengthen the cipher. It has been observed that the enhanced scheme has much better and more irregular clocking. It is shown that the proposed scheme provides improvement in the value of linear complexity of output bit sequence generated. Both the designs are coded in VHDL and synthesized on FPGA device.","PeriodicalId":179541,"journal":{"name":"2009 International Multimedia, Signal Processing and Communication Technologies","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2009-03-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121680471","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2009-03-14DOI: 10.1109/MSPCT.2009.5164217
S. Hasan, I. A. Khan
A novel and simple technique is presented to realize a five scroll chaos generator circuit using second generation current conveyors. A novel sinusoidal oscillator is first realized using second generation dual output current conveyors (DOCCIIs) and grounded passive components, which is then employed for the implementation of the five scroll chaos generator. The technique basically employs a CCII based differentiator and a frequency dependent negative resistance (FDNR) composite to introduce the non-linearity into the sinusoidal oscillator to modify it as a chaos generator. The proposed chaos generator exhibits a five scroll chaotic voltage output. It enjoys attractive features such as use of DOCCIIs and grounded passive components. Moreover, due to the presence of all grounded passive components, the circuit is very much suitable for monolithic implementation in contemporary IC technologies. The proposed chaos generator is designed and verified using PSpice simulation and the results thus obtained confirm the theory.
{"title":"Multi-scroll chaos generator using current conveyors","authors":"S. Hasan, I. A. Khan","doi":"10.1109/MSPCT.2009.5164217","DOIUrl":"https://doi.org/10.1109/MSPCT.2009.5164217","url":null,"abstract":"A novel and simple technique is presented to realize a five scroll chaos generator circuit using second generation current conveyors. A novel sinusoidal oscillator is first realized using second generation dual output current conveyors (DOCCIIs) and grounded passive components, which is then employed for the implementation of the five scroll chaos generator. The technique basically employs a CCII based differentiator and a frequency dependent negative resistance (FDNR) composite to introduce the non-linearity into the sinusoidal oscillator to modify it as a chaos generator. The proposed chaos generator exhibits a five scroll chaotic voltage output. It enjoys attractive features such as use of DOCCIIs and grounded passive components. Moreover, due to the presence of all grounded passive components, the circuit is very much suitable for monolithic implementation in contemporary IC technologies. The proposed chaos generator is designed and verified using PSpice simulation and the results thus obtained confirm the theory.","PeriodicalId":179541,"journal":{"name":"2009 International Multimedia, Signal Processing and Communication Technologies","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2009-03-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131842426","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2009-03-14DOI: 10.1109/MSPCT.2009.5164214
A. Imran, M. Qadeer, M. R. Khan
This paper intends to present some important theoretical and practical results that we faced during setting up a VoIP (Voice over Internet Protocol) server with the well known open source VoIP server Asterisk. For a fully functional voice exchange we require to set up a server based on Asterisk, connecting clients to the server with the help of soft/hard phones and then comes the configuration aspects of the soft phones with the server. Here in our implementation we have connected the clients to the server with the help of SIP protocols.
本文旨在介绍我们在使用知名的开源VoIP服务器Asterisk建立VoIP (Voice over Internet Protocol)服务器时所遇到的一些重要的理论和实践结果。为了实现功能齐全的语音交换，我们需要建立一个基于Asterisk的服务器，在软/硬电话的帮助下将客户端连接到服务器，然后使用服务器对软电话进行配置。在我们的实现中，我们使用SIP协议将客户端连接到服务器。
{"title":"Asterisk VoIP private branch exchange","authors":"A. Imran, M. Qadeer, M. R. Khan","doi":"10.1109/MSPCT.2009.5164214","DOIUrl":"https://doi.org/10.1109/MSPCT.2009.5164214","url":null,"abstract":"This paper intends to present some important theoretical and practical results that we faced during setting up a VoIP (Voice over Internet Protocol) server with the well known open source VoIP server Asterisk. For a fully functional voice exchange we require to set up a server based on Asterisk, connecting clients to the server with the help of soft/hard phones and then comes the configuration aspects of the soft phones with the server. Here in our implementation we have connected the clients to the server with the help of SIP protocols.","PeriodicalId":179541,"journal":{"name":"2009 International Multimedia, Signal Processing and Communication Technologies","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2009-03-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122287610","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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