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1998 IEEE International Reliability Physics Symposium Proceedings. 36th Annual (Cat. No.98CH36173)最新文献

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Cross-sectional atomic force microscopy of focused ion beam milled devices 聚焦离子束铣削装置的截面原子力显微镜
J. Ebel, C. Bozada, T. Schlesinger, C. Cerny, G. Desalvo, R. Dettmer, J. Gillespie, T. Jenkins, K. Nakano, C. Pettiford, T. Quach, J. Sewell, G. Via, R. Welch
We have developed and demonstrated new techniques for failure analysis based on focused ion beam (FIB) cross-sectioning and inspection by atomic force microscopy (AFM). Normally, inspection after FIB cross-sectioning is done by scanning electron microscopy (SEM). As features of interest shrink below limits detectable by SEM, often the next method chosen is transmission electron microscopy (TEM). However, sample preparation for site-specific TEM is difficult and time-consuming, even using newer methods based on FIB milling. AFM offers higher resolution imaging than SEM, and relaxes many of the sample preparation constraints of TEM. The AFM/FIB technique has been demonstrated on GaAs-AlGaAs and GaAs-InGaP heterojunction bipolar transistors (HBTs), including devices which have been electrically stressed to failure.
我们已经开发并演示了基于聚焦离子束(FIB)横截面和原子力显微镜(AFM)检测的失效分析新技术。通常,FIB横切后的检查是通过扫描电子显微镜(SEM)进行的。当感兴趣的特征缩小到扫描电镜检测范围以下时,通常选择的下一个方法是透射电子显微镜(TEM)。然而,即使使用基于FIB铣削的新方法,针对特定位置的TEM的样品制备也是困难和耗时的。AFM提供了比SEM更高的成像分辨率,并放宽了TEM的许多样品制备限制。AFM/FIB技术已经在GaAs-AlGaAs和GaAs-InGaP异质结双极晶体管(HBTs)上得到了验证,包括电应力失效的器件。
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引用次数: 3
REDR-based kinetics for line defects leading to sudden failures in 980 nm SL SQW InGaAs laser diodes 基于redr的980 nm SL SQW InGaAs激光二极管线缺陷突然失效动力学研究
A. Bonfiglio, M. Casu, M. Vanzi, F. Magistrali, M. Maini, G. Salmini
Recombination-enhanced-defect-reaction (REDR) (Kymerling, Solid State Electron. vol 21, pp. 1391-1401, 1978) has been recently proposed (Magistrali et al. 1997) as the driving mechanism for sudden failures in 980 nm SL SQW InGaAs pump laser diodes for active fiber optics. The proposal follows a set of observations on life-tested devices that coherently lead to link the ultimate catastrophic failure to the growth of line defects from outside to inside the active layer. The most intriguing feature of the detected failure mode remains its sudden occurrence during constant-current life-tests, which is the total loss of the laser emission within a few tens of hours, after several hundred hours of perfectly regular operation. No correlation has ever been found between the occurence of that phenomenon and any of the many initial measurements that have been performed. The paper aims to account for the observed kinetics, based on the simple model of a native ideal point defect located within a few diffusion lengths from the edge of the depleted region of a laser diode. Its effect on the laser current is quantified, as well as the energy released to the lattice per unit time because of recombination at the defect neighbourhoods. The key point is to correlate that energy with some growth direction and speed, which leads to a model for the degradation kinetics.
重组增强缺陷反应(REDR) (Kymerling,固态电子。最近(Magistrali et al. 1997)提出了用于有源光纤的980 nm SL SQW InGaAs泵浦激光二极管突然失效的驱动机制。该提案遵循了对经过寿命测试的设备的一系列观察,这些观察一致地将最终的灾难性故障与从外部到内部的线路缺陷的增长联系起来。检测到的故障模式最有趣的特征是它在恒流寿命测试期间突然发生,即经过数百小时的完全正常运行后,在几十小时内激光发射完全丧失。这种现象的发生与许多已经进行的初步测量之间没有任何关联。本文的目的是解释观察到的动力学,基于一个简单的模型,一个天然的理想点缺陷位于几个扩散长度从激光二极管的耗尽区边缘。它对激光电流的影响是量化的,以及每单位时间释放到晶格的能量,因为在缺陷邻域重组。关键是将能量与某些生长方向和速度联系起来,从而得到降解动力学模型。
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引用次数: 5
Degradation of InGaAs-InP heterojunction bipolar transistors under high energy electron irradiation 高能电子辐照下InGaAs-InP异质结双极晶体管的降解
A. Bandyopadhyay, S. Subramanian, S. Chandrasekhar, S. Goodnick
The DC characteristics of InGaAs-InP single heterojunction bipolar transistors (SHBTs) were studied for the first time under high energy (/spl sim/1 MeV) electron radiation with a cumulative dose up to 5.4/spl times/10/sup 15/ electrons/cm/sup 2/. The following degradation effects were observed for electron doses greater than 10/sup 15//cm/sup 2/: (1) decrease in collector current, (2) decrease in current gain by up to 50%, and (3) an increase in collector saturation voltage by 0.2-0.8 V depending on base current. The increase in collector saturation voltage is attributed to an increase in emitter contact resistance after irradiation. The degradation of collector current and current gain are thought to be due to increased recombination caused by radiation-induced defects in the base-emitter junction.
首次研究了InGaAs-InP单异质结双极晶体管(shbt)在累积剂量高达5.4/spl次/10/sup 15/电子/cm/sup 2/的高能(/spl sim/1 MeV)电子辐射下的直流特性。当电子剂量大于10/sup 15/ cm/sup 2/时,观察到以下降解效应:(1)集电极电流降低,(2)电流增益降低高达50%,(3)集电极饱和电压根据基极电流增加0.2-0.8 V。集电极饱和电压的增加是由于辐照后发射极接触电阻的增加。集电极电流和电流增益的退化被认为是由于基极-发射极结中辐射诱导缺陷引起的复合增加。
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引用次数: 0
Constant current charge-to-breakdown: Still a valid tool to study the reliability of MOS structures? 恒定电流充放电:仍是研究 MOS 结构可靠性的有效工具吗?
T. Nigam, R. Degraeve, G. Groeseneken, M. Heyns, H. Maes
It is shown that the conventional interpretation of constant current Q/sub BD/ to evaluate the influence of process variations on the reliability of MOS structures can lead to erroneous conclusions. For a fixed thickness, the comparison of Q/sub BD/-distributions of all processes that affect the breakdown statistics becomes even meaningless. For ultra-thin oxides, the impact of different processing conditions requires constant gate voltage instead of constant current density Q/sub BD/-tests.
结果表明,用恒流Q/sub / BD/的传统解释来评价工艺变化对MOS结构可靠性的影响可能会导致错误的结论。对于固定厚度,影响击穿统计的所有过程的Q/sub BD/-分布的比较甚至变得毫无意义。对于超薄氧化物,不同加工条件的影响需要恒定栅电压而不是恒定电流密度Q/sub BD/-测试。
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引用次数: 73
A study of ESD-induced latent damage in CMOS integrated circuits CMOS集成电路静电致潜在损伤的研究
Y. Huh, M.G. Lee, J. Lee, H. Jung, T. Li, D. Song, Y. Lee, J. Hwang, Y. Sung, S. Kang
ESD-induced latent damage in CMOS integrated circuits has been thoroughly investigated after cumulative low-level ESD stress. A study of the latent damage for transistors at the package level has been performed with various kinds of ESD stress modes. The impact of latent damage on circuit performance degradation was also evaluated using a 64 Mb DRAM chip as a DUT.
CMOS集成电路在累积低强度静电放电后的潜在损伤已经得到了深入的研究。在不同的ESD应力模式下,对封装级晶体管的潜在损伤进行了研究。使用64mb DRAM芯片作为DUT,还评估了潜在损坏对电路性能下降的影响。
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引用次数: 20
Assessing circuit-level hot-carrier reliability 评估电路级热载流子可靠性
W. Jiang, H. Le, J. Chung, T. Kopley, P. Marcoux, C. Dai
The major factors that cumulatively determine circuit-level hot-carrier reliability are defined and characterized in this paper. The inherent inverse relationship between lifetime-underestimation/criteria-overspecification and the amount of known device/circuit information is explored. Lifetime-underestimation/criteria-overspecification is shown to depend quite strongly on the particular "worst-case" approximations used.
定义了影响电路级热载流子可靠性的主要因素,并对其进行了定性分析。探讨了寿命-低估/标准-过度规范与已知器件/电路信息量之间的内在反比关系。寿命-低估/标准-过度规范被证明非常强烈地依赖于所使用的特定的“最坏情况”近似。
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引用次数: 21
Extended data retention process technology for highly reliable flash EEPROMs of 10/sup 6/ to 10/sup 7/ W/E cycles 扩展数据保留处理技术,用于10/sup 6/到10/sup 7/ W/E周期的高可靠性闪存eeprom
F. Arai, T. Maruyama, R. Shirota
Using 16 Mbit flash memories, we clarified the relationship between data retention and Si surface micro-defects just before the tunnel oxidation process. After 10/sup 5/ to 10/sup 6/ write/erase cycles, a small number of singular cells appear to have an anomalously large charge loss rate, when the Si surface defect density due to process damage exceeds 1.2/spl times/10/sup 20//cm/sup 3/. This anomalous charge loss phenomenon strongly depends on the electric field in the tunnel oxide, which is caused by the stored charge in the floating gate. Thus, an accelerated data retention test can be performed by means of the electric field in the tunnel oxide, by controlling the programmed V/sub t/ to be more than 2.4 V just before the retention test (here, neutral V/sub t/ is adjusted to 0 V). By using an accelerated test, it is clarified that controlling the number of surface micro-defects is important in order to obtain extended data retention characteristics. By reducing the surface micro-defects to less than 1.2/spl times/10/sup 20//cm/sup 3/, the data retention reliability after 10/sup 6/ to 10/sup 7/ write/erase cycles can be guaranteed for conventional 2-level flash memories, where programmed V/sub t/ is less than 2.4 V.
利用16mbit闪存,我们在隧道氧化过程之前澄清了数据保留与Si表面微缺陷之间的关系。经过10/sup 5/ ~ 10/sup 6/个写/擦除循环后,当由于工艺损伤导致的Si表面缺陷密度超过1.2/spl次/10/sup 20/ cm/sup 3/时,少量奇异电池出现了异常大的电荷损失率。这种异常电荷损失现象强烈依赖于隧道氧化物中的电场,而电场是由浮栅中储存的电荷引起的。因此,可以通过隧道氧化物中的电场来进行加速数据保留试验,方法是在保留试验前控制程序设定的V/sub - t/大于2.4 V(此处将中性V/sub - t/调整为0 V)。通过使用加速试验,可以明确控制表面微缺陷的数量对于获得扩展的数据保留特性是重要的。通过减少表面微缺陷到小于1.2/spl次/10/sup 20//cm/sup 3/,可以保证10/sup 6/到10/sup 7/写/擦除周期后的数据保留可靠性,传统的2级闪存,其中编程V/sub /小于2.4 V。
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引用次数: 35
Cu damascene interconnects with crystallographic texture control and its electromigration performance 铜大马士革互连与晶体织构控制及其电迁移性能
K. Abe, Yusuke Harada, H. Onoda
The effect of underlayer texture on Cu film properties and electromigration performance in Cu damascene interconnects have been studied. The Cu film orientation depends strongly on the underlayer texture. The Cu<111> orientation can be controlled by changing the preferred orientation of the TiN underlayer, which has the same cubic structure as the Cu. The Cu film deposited on a highly <111>-oriented TiN underlayer indicates a strong <111> orientation. The atomic arrangement between Cu(111) and TiN(111) planes has a rotational angle within /spl plusmn/10/spl deg/ around the <111> axis in spite of lattice mismatch of 14.7%. In the case of damascene interconnects, sidewalls in a trench affect Cu texture and the dependence of the underlayer texture on the Cu film orientation becomes small as line width decreases. EM performance, however, has been improved by the realization of Cu damascene interconnects with a strong <111> orientation.
研究了铜衬底织构对铜膜性能和电迁移性能的影响。Cu薄膜的取向很大程度上取决于底层的织构。通过改变与Cu具有相同立方结构的TiN衬底的优选取向,可以控制Cu的取向。镀在高取向TiN衬底上的Cu膜具有很强的取向性。Cu(111)和TiN(111)平面之间的原子排列在轴上的旋转角度在/spl + /10/spl°范围内,尽管晶格失配率为14.7%。在母线互连的情况下,沟槽内的侧壁会影响Cu织构,并且随着线宽的减小,底层织构对Cu膜取向的依赖性变小。然而,通过实现具有强取向的Cu damascene互连,提高了EM性能。
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引用次数: 6
Lifetime estimates and unique failure mechanisms of the Digital Micromirror Device (DMD) 数字微镜器件(DMD)寿命估计及独特失效机制
M. Douglass
The Digital Micromirror Device/sup TM/ (DMD/sup TM/) has made great strides in terms of both performance and reliability. Each device consists of more than 500,000 individually addressable micromirrors. Digital Light Processing/sup TM/ technology, based on the DMD, has been used in such diverse products as projection displays with film-like projected images and photographic-quality printers. Reliability testing of the DMD has demonstrated greater than 100,000 operating hours and more than 1 trillion mirror cycles. This paper discusses DMD reliability development activities, failure modes investigated (e.g. hinge fatigue, hinge memory, stuck mirrors, and environmental robustness), various acceleration techniques (e.g. temperature and duty cycle), corrective actions implemented, and the resulting evidence that the DMD is exceeding original reliability goals.
数字微镜设备/sup TM/ (DMD/sup TM/)在性能和可靠性方面都取得了巨大的进步。每个设备由超过50万个可单独寻址的微镜组成。以DMD为基础的数字光处理/sup TM/技术已应用于各种产品中,如具有胶片般的投影图像的投影显示器和照片质量的打印机。DMD的可靠性测试已经证明了超过10万小时的工作时间和超过1万亿次的镜像循环。本文讨论了DMD可靠性开发活动,所研究的失效模式(例如铰链疲劳,铰链记忆,卡镜和环境鲁棒性),各种加速技术(例如温度和占空比),实施的纠正措施,以及DMD超过原始可靠性目标的结果证据。
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引用次数: 203
期刊
1998 IEEE International Reliability Physics Symposium Proceedings. 36th Annual (Cat. No.98CH36173)
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