Pub Date : 2017-05-18DOI: 10.1109/APEC.2017.7930970
Jeremy J. O. Dalton, Jianjing Wang, H. Dymond, Dawei Liu, D. Pamunuwa, B. Stark, N. McNeill, S. Hollis
The application of active gate driving to 40 V GaN FETs has previously been shown to reduce ringing and EMI-generating spectral content in the switch-node voltage waveforms. This paper, for the first time, shows active gate driving applied to 650 V GaN FETs, and the shaping of device voltages and currents during switching transients. A custom integrated active gate driver is used, which can dynamically vary its output resistance from 0.12 to 64 Ω, with a 150 ps timing resolution. At 200 V DC link and 10 A load current, a significant degree of control over the active-switch drain current and switch-node voltage is demonstrated, for both buck and boost mode operation. The current overshoot and ringing in the power waveforms due to circuit parasitics are actively reduced and the voltage oscillations in the DC link are damped. The timing of resistance sequences is shown to be critical to the success of active shaping methods, thus justifying the unparalleled 150 ps resolution of the driver. Under continuous operation and at reduced ratings of 100 V and 2 A load current the significant control of the switch node voltage and voltage spectra is also demonstrated. The switching delay is reduced, and parts of the spectrum are reduced by up to 9 dB, equivalent to the effect of tripling the gate resistance but without any reduction in the overall switching speed.
在40 V GaN场效应管中应用有源栅极驱动已经被证明可以减少开关节点电压波形中的振铃和产生emi的频谱含量。本文首次展示了应用于650 V GaN场效应管的有源栅极驱动，以及开关瞬态时器件电压和电流的整形。使用自定义集成有源栅极驱动器，可以动态改变其输出电阻从0.12到64 Ω，具有150 ps的时序分辨率。在200v直流链路和10a负载电流下，对于降压和升压模式操作，对主动开关漏极电流和开关节点电压的显著程度的控制被证明。主动减小了电路寄生引起的功率波形中的电流超调和振铃现象，抑制了直流链路中的电压振荡。电阻序列的时序对主动整形方法的成功至关重要，因此证明了驱动器无与伦比的150 ps分辨率是合理的。在连续工作和降低额定100 V和2a负载电流下，还证明了开关节点电压和电压谱的重要控制。开关延迟降低，部分频谱减少高达9db，相当于栅极电阻增加三倍的效果，但总体开关速度没有任何降低。
{"title":"Shaping switching waveforms in a 650 V GaN FET bridge-leg using 6.7 GHz active gate drivers","authors":"Jeremy J. O. Dalton, Jianjing Wang, H. Dymond, Dawei Liu, D. Pamunuwa, B. Stark, N. McNeill, S. Hollis","doi":"10.1109/APEC.2017.7930970","DOIUrl":"https://doi.org/10.1109/APEC.2017.7930970","url":null,"abstract":"The application of active gate driving to 40 V GaN FETs has previously been shown to reduce ringing and EMI-generating spectral content in the switch-node voltage waveforms. This paper, for the first time, shows active gate driving applied to 650 V GaN FETs, and the shaping of device voltages and currents during switching transients. A custom integrated active gate driver is used, which can dynamically vary its output resistance from 0.12 to 64 Ω, with a 150 ps timing resolution. At 200 V DC link and 10 A load current, a significant degree of control over the active-switch drain current and switch-node voltage is demonstrated, for both buck and boost mode operation. The current overshoot and ringing in the power waveforms due to circuit parasitics are actively reduced and the voltage oscillations in the DC link are damped. The timing of resistance sequences is shown to be critical to the success of active shaping methods, thus justifying the unparalleled 150 ps resolution of the driver. Under continuous operation and at reduced ratings of 100 V and 2 A load current the significant control of the switch node voltage and voltage spectra is also demonstrated. The switching delay is reduced, and parts of the spectrum are reduced by up to 9 dB, equivalent to the effect of tripling the gate resistance but without any reduction in the overall switching speed.","PeriodicalId":201289,"journal":{"name":"2017 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-05-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129754196","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-05-18DOI: 10.1109/APEC.2017.7931048
C. Femandez, Z. Pavlović, S. Kulkami, P. McCloskey, C. O'Mathúna
In this work, a new set-up is presented to characterize the large signal electrical parameters of on-Silicon integrated coupled inductors for Power Supply on Chip. The proposed system is suitable to perform the measurements under different large-signal test conditions given by the dc bias current up to 2 A and ac current through one or both windings, with amplitudes ranging from 0 A to 0.5 A at frequencies up to 120 MHz. Since a key issue when measuring at high-frequencies is the error due to the attenuation and time skew between the channels, an additional test is performed to characterize the measurement system and compensate the voltage and current waveforms.
{"title":"High frequency, single/dual phases, large AC/DC signal power characterization for two phase on-silicon coupled inductors","authors":"C. Femandez, Z. Pavlović, S. Kulkami, P. McCloskey, C. O'Mathúna","doi":"10.1109/APEC.2017.7931048","DOIUrl":"https://doi.org/10.1109/APEC.2017.7931048","url":null,"abstract":"In this work, a new set-up is presented to characterize the large signal electrical parameters of on-Silicon integrated coupled inductors for Power Supply on Chip. The proposed system is suitable to perform the measurements under different large-signal test conditions given by the dc bias current up to 2 A and ac current through one or both windings, with amplitudes ranging from 0 A to 0.5 A at frequencies up to 120 MHz. Since a key issue when measuring at high-frequencies is the error due to the attenuation and time skew between the channels, an additional test is performed to characterize the measurement system and compensate the voltage and current waveforms.","PeriodicalId":201289,"journal":{"name":"2017 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-05-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131830512","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-05-17DOI: 10.1109/APEC.2017.7931176
Kai-Hui Chen, Tsomg-Juu Liang, Bin-Kun Huang
A new adaptive output voltage controller for fast battery charger method is proposed in this paper. The charging power demanded is increased with larger battery capacity to shorten the charging time. To overcome the longer charging time with the constant voltage charger, the charging power may vary from high power to low power for the fast battery charger to shorten the battery charging time. In this paper a new adaptive output voltage control circuit is proposed. And the conversion efficiency of flyback converter under various power conditions is analyzed. Then the output voltage of flyback converter is controlled with the output power level to maintain high efficiency power conversion to achieve fast battery charging and higher efficiency. Finally, a 30W experimental prototype with output voltage range 5V∼15V is designed to verify the feasibility of the proposed controller. The maximum efficiency reaches 84.5% and the ligh load efficiency at 0.5W is 71%.
{"title":"A new adaptive output voltage controller for fast battery charger","authors":"Kai-Hui Chen, Tsomg-Juu Liang, Bin-Kun Huang","doi":"10.1109/APEC.2017.7931176","DOIUrl":"https://doi.org/10.1109/APEC.2017.7931176","url":null,"abstract":"A new adaptive output voltage controller for fast battery charger method is proposed in this paper. The charging power demanded is increased with larger battery capacity to shorten the charging time. To overcome the longer charging time with the constant voltage charger, the charging power may vary from high power to low power for the fast battery charger to shorten the battery charging time. In this paper a new adaptive output voltage control circuit is proposed. And the conversion efficiency of flyback converter under various power conditions is analyzed. Then the output voltage of flyback converter is controlled with the output power level to maintain high efficiency power conversion to achieve fast battery charging and higher efficiency. Finally, a 30W experimental prototype with output voltage range 5V∼15V is designed to verify the feasibility of the proposed controller. The maximum efficiency reaches 84.5% and the ligh load efficiency at 0.5W is 71%.","PeriodicalId":201289,"journal":{"name":"2017 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"78 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-05-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128717621","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-05-17DOI: 10.1109/APEC.2017.7931073
M. Gaafar, G. M. Dousoky, E. Ahmed, M. Shoyama
This work investigates the using of high-pass filter (HPF) of the grid current to actively damp the resonance in grid-connected LCL filters. A new form for such HPF is deduced. Using this form, a systematic co-design procedures for the HPF along with the fundamental current regulator are presented to achieve pre-specified behavior. This behavior includes avoiding the non-minimum phase behavior along with achieving pre-specified requirements of fundamental loop gain and crossover frequency. Numerical example along with the experimental work are introduced at different resonant frequencies.
{"title":"Systematic design of grid-current-based active damping for grid-connected LCL filters","authors":"M. Gaafar, G. M. Dousoky, E. Ahmed, M. Shoyama","doi":"10.1109/APEC.2017.7931073","DOIUrl":"https://doi.org/10.1109/APEC.2017.7931073","url":null,"abstract":"This work investigates the using of high-pass filter (HPF) of the grid current to actively damp the resonance in grid-connected LCL filters. A new form for such HPF is deduced. Using this form, a systematic co-design procedures for the HPF along with the fundamental current regulator are presented to achieve pre-specified behavior. This behavior includes avoiding the non-minimum phase behavior along with achieving pre-specified requirements of fundamental loop gain and crossover frequency. Numerical example along with the experimental work are introduced at different resonant frequencies.","PeriodicalId":201289,"journal":{"name":"2017 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"205 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-05-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131886718","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-05-17DOI: 10.1109/APEC.2017.7931177
D. K. Li, Z. Gong, M. Rose, H. Bergveld, O. Trescases
This paper presents a novel approach to improve the dynamic response of inductive dc-dc converters in applications having repetitive load profiles. In many Internet-of-Things (IoT) applications, such as wireless sensor networks (WSN), the load current profile has a periodic nature, and is therefore predictable by the power management circuits. This unique nature is exploited by the proposed Preemptive Concurrent Controller (PCC) to achieve a dynamic response superior to the theoretical limits of time-optimal control. The preemptive controller ramps up the inductor current prior to the occurrence of a load step and reduces the required output capacitance. The non-inverting buck-boost converter is used in this work and operates with a freewheeling mode that avoids output voltage overshoot during the preemptive inductor current ramp. Two hysteric control loops operate concurrently to define the freewheeling interval. A simple digital calibration scheme is demonstrated to extract timing and amplitude features from a load current profile in order to optimize the timing of the preemptive current reference in the next cycle. Freewheeling is thus minimized to increase system efficiency. The PCC and associated load profile learning algorithm is experimentally verified and uses 10× less capacitance compared to the time-optimal control benchmark.
{"title":"Improved dynamics in DC-DC converters for IoT applications with repetitive load profiles using self-calibrated preemptive current control","authors":"D. K. Li, Z. Gong, M. Rose, H. Bergveld, O. Trescases","doi":"10.1109/APEC.2017.7931177","DOIUrl":"https://doi.org/10.1109/APEC.2017.7931177","url":null,"abstract":"This paper presents a novel approach to improve the dynamic response of inductive dc-dc converters in applications having repetitive load profiles. In many Internet-of-Things (IoT) applications, such as wireless sensor networks (WSN), the load current profile has a periodic nature, and is therefore predictable by the power management circuits. This unique nature is exploited by the proposed Preemptive Concurrent Controller (PCC) to achieve a dynamic response superior to the theoretical limits of time-optimal control. The preemptive controller ramps up the inductor current prior to the occurrence of a load step and reduces the required output capacitance. The non-inverting buck-boost converter is used in this work and operates with a freewheeling mode that avoids output voltage overshoot during the preemptive inductor current ramp. Two hysteric control loops operate concurrently to define the freewheeling interval. A simple digital calibration scheme is demonstrated to extract timing and amplitude features from a load current profile in order to optimize the timing of the preemptive current reference in the next cycle. Freewheeling is thus minimized to increase system efficiency. The PCC and associated load profile learning algorithm is experimentally verified and uses 10× less capacitance compared to the time-optimal control benchmark.","PeriodicalId":201289,"journal":{"name":"2017 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-05-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124653446","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-05-17DOI: 10.1109/APEC.2017.7931178
N. Baars, J. Everts, C. Wijnands, E. Lomonova
The modulation strategy proposed in this paper enables wide-range zero voltage switching (ZVS) operation of a three-level three-phase dual active bridge (DAB) dc-dc converter. The circuit topology is analyzed and piece-wise linear equations are derived for most appropriate switching modes. Based on the results of a numerical optimizer a modulation scheme is derived, utilizing analytic equations. Compared to optimal control variables, the proposed modulation scheme generates a higher transformer rms current for low power transfers, however, for high power levels it operates with a close-to-optimal transformer rms current. Simulations of the converter, obtained using the proposed modulation strategy, verify zero voltage switching (ZVS) operation and demonstrate an accurate power transfer for the full voltage range. Finally, experimental results, obtained from a high-power prototype, support the theoretical model and confirm correct operation of the proposed modulation strategy.
{"title":"Modulation strategy for wide-range ZVS operation of a three-level three-phase dual active bridge dc-dc converter","authors":"N. Baars, J. Everts, C. Wijnands, E. Lomonova","doi":"10.1109/APEC.2017.7931178","DOIUrl":"https://doi.org/10.1109/APEC.2017.7931178","url":null,"abstract":"The modulation strategy proposed in this paper enables wide-range zero voltage switching (ZVS) operation of a three-level three-phase dual active bridge (DAB) dc-dc converter. The circuit topology is analyzed and piece-wise linear equations are derived for most appropriate switching modes. Based on the results of a numerical optimizer a modulation scheme is derived, utilizing analytic equations. Compared to optimal control variables, the proposed modulation scheme generates a higher transformer rms current for low power transfers, however, for high power levels it operates with a close-to-optimal transformer rms current. Simulations of the converter, obtained using the proposed modulation strategy, verify zero voltage switching (ZVS) operation and demonstrate an accurate power transfer for the full voltage range. Finally, experimental results, obtained from a high-power prototype, support the theoretical model and confirm correct operation of the proposed modulation strategy.","PeriodicalId":201289,"journal":{"name":"2017 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"71 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-05-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129251891","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-05-17DOI: 10.1109/APEC.2017.7930907
Po-Yen Lin, T. Liang, Che-wei Chang, Kai-Hui Chen, Bin-Kun Huang
For many LED applications, the dimming control is required in saving the energy consumptions. However, the wide-range dimming cannot be achieved due to the minimum on-time and switching frequency at low dimming level. In this paper, a buck-type wide-range dimmable LED driver is designed and implemented. According to the different percentage of dimming, the buck converter can operate in QR mode, frequency limitation with the valley switching, frequency reduction mode, and burst mode with the primary-side control scheme. By changing the parameters of the PI controller, the LED current can still be estimated precisely in burst mode. Therefore, the ideally linear wide-range dimming can be achieved by the proposed primary-side control scheme. Finally, the buck-type LED driver with the universal input voltages 90–264 Vrms applied to 42 V/ 8 W LED lamps is implemented. The dimming range is from 100 % to 1 %. The line regulations at 100 % and 1 % dimming are both lower than 5 %. The power factor is higher than 0.96 and the total harmonic distortion is lower than 20 % in the universal input voltage range. The highest efficiency is 94.67%.
对于许多LED应用来说，为了节省能源消耗，需要调光控制。然而，由于在低调光水平下的最小导通时间和开关频率，无法实现大范围调光。本文设计并实现了一种buck型宽范围可调光LED驱动器。根据调光比例的不同，降压变换器可以工作在QR模式、谷开关限频模式、降频模式和一次侧控制模式下的突发模式。通过改变PI控制器的参数，在突发模式下仍然可以精确地估计LED电流。因此，提出的主侧控制方案可以实现理想的线性大范围调光。最后，实现了用于42 V/ 8 W LED灯的通用输入电压为90-264 Vrms的buck型LED驱动器。调光范围为100% ~ 1%。100%和1%调光时的线路规则都低于5%。在通用输入电压范围内，功率因数大于0.96，总谐波失真小于20%。最高效率为94.67%。
{"title":"Buck-type wide-range dimmable LED driver","authors":"Po-Yen Lin, T. Liang, Che-wei Chang, Kai-Hui Chen, Bin-Kun Huang","doi":"10.1109/APEC.2017.7930907","DOIUrl":"https://doi.org/10.1109/APEC.2017.7930907","url":null,"abstract":"For many LED applications, the dimming control is required in saving the energy consumptions. However, the wide-range dimming cannot be achieved due to the minimum on-time and switching frequency at low dimming level. In this paper, a buck-type wide-range dimmable LED driver is designed and implemented. According to the different percentage of dimming, the buck converter can operate in QR mode, frequency limitation with the valley switching, frequency reduction mode, and burst mode with the primary-side control scheme. By changing the parameters of the PI controller, the LED current can still be estimated precisely in burst mode. Therefore, the ideally linear wide-range dimming can be achieved by the proposed primary-side control scheme. Finally, the buck-type LED driver with the universal input voltages 90–264 Vrms applied to 42 V/ 8 W LED lamps is implemented. The dimming range is from 100 % to 1 %. The line regulations at 100 % and 1 % dimming are both lower than 5 %. The power factor is higher than 0.96 and the total harmonic distortion is lower than 20 % in the universal input voltage range. The highest efficiency is 94.67%.","PeriodicalId":201289,"journal":{"name":"2017 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"33 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-05-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129214378","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-03-27DOI: 10.1109/APEC.2017.7931015
Ilyas Dchar, Marion Zolkos, C. Buttay, H. Morel
In high voltage direct current (HVDC) converters, a series connection of semiconductor devices is often used to achieve the desired blocking voltage. In such configuration, an unequal voltage sharing may drive one or more devices into avalanche breakdown, eventually causing the failure of the entire group of devices. This paper presents the experimental evaluation of SiC MOSFETs from different manufacturers operated in avalanche. A setup was developed to test the devices under such condition. The reliability of SiC MOSFETs have been compared. To correlate the experimental results with the failure mechanism, the MOSFETs were decapsulated to identify the failure sites on the SiC dies. Examination results show that for some tested devices, the failure occurs at the metallization source of the die, and results in a short circuit between all three terminals of the MOSFETs. Furthermore, it has been found that the parasitic BJT latch up and the intrinsic temperature limit are the main failure mechanisms for these devices.
{"title":"Robustness of SiC MOSFET under avalanche conditions","authors":"Ilyas Dchar, Marion Zolkos, C. Buttay, H. Morel","doi":"10.1109/APEC.2017.7931015","DOIUrl":"https://doi.org/10.1109/APEC.2017.7931015","url":null,"abstract":"In high voltage direct current (HVDC) converters, a series connection of semiconductor devices is often used to achieve the desired blocking voltage. In such configuration, an unequal voltage sharing may drive one or more devices into avalanche breakdown, eventually causing the failure of the entire group of devices. This paper presents the experimental evaluation of SiC MOSFETs from different manufacturers operated in avalanche. A setup was developed to test the devices under such condition. The reliability of SiC MOSFETs have been compared. To correlate the experimental results with the failure mechanism, the MOSFETs were decapsulated to identify the failure sites on the SiC dies. Examination results show that for some tested devices, the failure occurs at the metallization source of the die, and results in a short circuit between all three terminals of the MOSFETs. Furthermore, it has been found that the parasitic BJT latch up and the intrinsic temperature limit are the main failure mechanisms for these devices.","PeriodicalId":201289,"journal":{"name":"2017 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-03-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127727385","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-03-26DOI: 10.1109/APEC.2017.7931127
Leif Amber, K. Haddad
This paper presents a hybrid technology approach serving as an entry point in the industry of SiC devices at high power levels. The proposal consists of paralleling SiC Schottky diodes with high speed IGBTs in a baseplate-less and solder free module to alleviate the high cost of wide band gap devices, improve performance of the converter and also enhance its reliability. An experimental inverter rated 100kW is built and measurements are made to highlight the benefits of the technique when compared to full Si devices packaged in a baseplate-less module.
{"title":"Hybrid Si IGBT-SiC Schottky diode modules for medium to high power applications","authors":"Leif Amber, K. Haddad","doi":"10.1109/APEC.2017.7931127","DOIUrl":"https://doi.org/10.1109/APEC.2017.7931127","url":null,"abstract":"This paper presents a hybrid technology approach serving as an entry point in the industry of SiC devices at high power levels. The proposal consists of paralleling SiC Schottky diodes with high speed IGBTs in a baseplate-less and solder free module to alleviate the high cost of wide band gap devices, improve performance of the converter and also enhance its reliability. An experimental inverter rated 100kW is built and measurements are made to highlight the benefits of the technique when compared to full Si devices packaged in a baseplate-less module.","PeriodicalId":201289,"journal":{"name":"2017 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-03-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121145343","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-03-26DOI: 10.1109/APEC.2017.7931164
Wei Gao, Qianhong Chen, Y. Geng, X. Ren, Siu-Chung Wong
For most of wireless charging applications, large tolerance to the misalignment is required to the compensation topologies. A primary series-parallel compensation has been proposed and recognized as a compensation with the improved misalignment behavior. In this paper, it is demonstrated that the primary series-parallel compensation is equivalent to the primary series-parallel compensation. The detailed performance analysis and the comparisons between primary series-parallel and primary series compensations are analyzed in this paper. Finally, contactless resonant converter with SP/P and S/P compensation is constructed to verify the validation of equivalency analysis. Experimental results also verify the equivalency of the two compensations in misalignment behavior.
{"title":"Equivalency analysis of primary series- and series-parallel-compensated contactless resonant converter","authors":"Wei Gao, Qianhong Chen, Y. Geng, X. Ren, Siu-Chung Wong","doi":"10.1109/APEC.2017.7931164","DOIUrl":"https://doi.org/10.1109/APEC.2017.7931164","url":null,"abstract":"For most of wireless charging applications, large tolerance to the misalignment is required to the compensation topologies. A primary series-parallel compensation has been proposed and recognized as a compensation with the improved misalignment behavior. In this paper, it is demonstrated that the primary series-parallel compensation is equivalent to the primary series-parallel compensation. The detailed performance analysis and the comparisons between primary series-parallel and primary series compensations are analyzed in this paper. Finally, contactless resonant converter with SP/P and S/P compensation is constructed to verify the validation of equivalency analysis. Experimental results also verify the equivalency of the two compensations in misalignment behavior.","PeriodicalId":201289,"journal":{"name":"2017 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"39 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-03-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116080300","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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