Pub Date : 2017-03-26DOI: 10.1109/APEC.2017.7931165
A. Kadavelugu, H. Suryanarayana, Liming Liu, Zach Pan, Christopher Belcastro, Esa-Kai Paatero
The accurate measurement of efficiency in wide band-gap semiconductor based converters, wherein efficiencies over 98% are achievable, is a challenge. In this work, a simple, open-loop, experimental dc-ac-dc back-to-back power conversion methodology is presented for the measurement of the combined losses of the power converter and passive filter. Additionally, only the power loss needs to be supplied by the source, although each converter sees active loading. The open-loop control mechanism for real and reactive power (power factor) control is explained, and also accuracy comparison with typical input and output power measurement method is provided. The simulation results of the proposed method are presented with experimental validation using a 1200 V SiC MOSFET based 4.6 kW — single phase (equivalent to 13.8 kW–3 phase) back-to-back conversion system.
在基于宽带隙半导体的转换器中，效率可以达到98%以上，精确测量效率是一个挑战。在这项工作中，提出了一种简单的开环实验性dc-ac-dc背靠背功率转换方法，用于测量功率转换器和无源滤波器的综合损耗。此外，只有功率损失需要由源提供，尽管每个转换器都看到主动负载。阐述了实功率和无功功率(功率因数)控制的开环控制机理，并与典型的输入输出功率测量方法进行了精度比较。采用基于1200v SiC MOSFET的4.6 kW -单相(相当于13.8 kW - 3相)背对背转换系统，给出了该方法的仿真结果并进行了实验验证。
{"title":"A simple and accurate efficiency measurement method for power converters","authors":"A. Kadavelugu, H. Suryanarayana, Liming Liu, Zach Pan, Christopher Belcastro, Esa-Kai Paatero","doi":"10.1109/APEC.2017.7931165","DOIUrl":"https://doi.org/10.1109/APEC.2017.7931165","url":null,"abstract":"The accurate measurement of efficiency in wide band-gap semiconductor based converters, wherein efficiencies over 98% are achievable, is a challenge. In this work, a simple, open-loop, experimental dc-ac-dc back-to-back power conversion methodology is presented for the measurement of the combined losses of the power converter and passive filter. Additionally, only the power loss needs to be supplied by the source, although each converter sees active loading. The open-loop control mechanism for real and reactive power (power factor) control is explained, and also accuracy comparison with typical input and output power measurement method is provided. The simulation results of the proposed method are presented with experimental validation using a 1200 V SiC MOSFET based 4.6 kW — single phase (equivalent to 13.8 kW–3 phase) back-to-back conversion system.","PeriodicalId":201289,"journal":{"name":"2017 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"39 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-03-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131257263","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-03-26DOI: 10.1109/APEC.2017.7930675
Markus Scherbaum, M. Reddig, R. Kennel, M. Schlenk
The number of power supplies connected to the public household power grid is constantly increasing. For a good mains voltage quality, the harmonic input currents are limited in standards. Many applications also require a lower output voltage with isolation. Today, this is mostly obtained via a multi-stage converter, consisting of a diode bridge rectifier, a boost PFC and a DC-DC converter with galvanic isolation. For higher efficiency, a bridgeless PFC-stage can be used, but it nevertheless requires a DC-DC converter for isolation. In order to further increase efficiency and decrease component count, a single-stage concept can be used. The Cuk “True Bridgeless PFC” rectifier system, for example, can perform all the requirements in a single stage. A simple application and realization of a converter topology is also quite important, especially in consumer electronics, where costs are crucial. In this paper, a new single stage topology with a different operation principle is presented, focusing on ease of use in hardware realization.
{"title":"An Isolated, bridgeless, quasi-resonant ZVS-switching, buck-boost single-stage AC-DC converter with power factor correction (PFC)","authors":"Markus Scherbaum, M. Reddig, R. Kennel, M. Schlenk","doi":"10.1109/APEC.2017.7930675","DOIUrl":"https://doi.org/10.1109/APEC.2017.7930675","url":null,"abstract":"The number of power supplies connected to the public household power grid is constantly increasing. For a good mains voltage quality, the harmonic input currents are limited in standards. Many applications also require a lower output voltage with isolation. Today, this is mostly obtained via a multi-stage converter, consisting of a diode bridge rectifier, a boost PFC and a DC-DC converter with galvanic isolation. For higher efficiency, a bridgeless PFC-stage can be used, but it nevertheless requires a DC-DC converter for isolation. In order to further increase efficiency and decrease component count, a single-stage concept can be used. The Cuk “True Bridgeless PFC” rectifier system, for example, can perform all the requirements in a single stage. A simple application and realization of a converter topology is also quite important, especially in consumer electronics, where costs are crucial. In this paper, a new single stage topology with a different operation principle is presented, focusing on ease of use in hardware realization.","PeriodicalId":201289,"journal":{"name":"2017 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"112 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-03-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133372972","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
The well-known active power-frequency and reactive power-voltage amplitude droop scheme is widely used in islanded microgrids to automatically share load power and regulate output voltage of parallel voltage-controlled inverters (VCIs) in microgrids. However, droop controlled VCIs tend to lose stability as droop slopes increasing. Meanwhile, parameter discrepancies extend synchronization time between VCIs which degrade system dynamic performance. In order to compensating above limitations of traditional method, this paper proposed a droop based hybrid control strategy by exploiting advantages from both voltage-controlled and current-controlled inverters. Capturing the detail of inner control loops, a small-signal state-space model is derived to analyze characteristics of the overall parallel system. Comparing to traditional method, eigenvalues of the hybrid control strategy indicate better stability and dynamic performance. In agreement with theoretical analysis, both simulation and experimental results are presented to validate the advantages of this proposed strategy.
{"title":"Modeling and analysis of droop based hybrid control strategy for parallel inverters in islanded microgrids","authors":"Shike Wang, Zeng Liu, Jinjun Liu, Baojin Liu, Xin Meng, Ronghui An","doi":"10.1109/APEC.2017.7931194","DOIUrl":"https://doi.org/10.1109/APEC.2017.7931194","url":null,"abstract":"The well-known active power-frequency and reactive power-voltage amplitude droop scheme is widely used in islanded microgrids to automatically share load power and regulate output voltage of parallel voltage-controlled inverters (VCIs) in microgrids. However, droop controlled VCIs tend to lose stability as droop slopes increasing. Meanwhile, parameter discrepancies extend synchronization time between VCIs which degrade system dynamic performance. In order to compensating above limitations of traditional method, this paper proposed a droop based hybrid control strategy by exploiting advantages from both voltage-controlled and current-controlled inverters. Capturing the detail of inner control loops, a small-signal state-space model is derived to analyze characteristics of the overall parallel system. Comparing to traditional method, eigenvalues of the hybrid control strategy indicate better stability and dynamic performance. In agreement with theoretical analysis, both simulation and experimental results are presented to validate the advantages of this proposed strategy.","PeriodicalId":201289,"journal":{"name":"2017 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"60 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-03-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133406522","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-03-26DOI: 10.1109/APEC.2017.7931153
A. Taylor, Juncheng Lu, Hua Bai, Alan Brown, Matt Mcammond
To filter the 120Hz output current ripple in our previously designed 7.2kW single-phase EV charger, this paper proposes to equip the charger with a buck-type active filter. 650V/60A enhancement mode GaN HEMTs provided by GaN Systems Inc are adopted to work at hard-switching mode. Experimental results indicated that four such switches could be paralleled to hard switch on/off ∼240A, which is the key for the buck-type active filter. A model-based proportional-resonant controller is adopted to smooth the output current. Such control will enhance the dynamic response of the active filter, compared to the conventional PI controller. The experimental output current ripple and power loss analysis are given.
{"title":"A model-based buck-type active filter using proportional-resonant controller and GaN HEMTs","authors":"A. Taylor, Juncheng Lu, Hua Bai, Alan Brown, Matt Mcammond","doi":"10.1109/APEC.2017.7931153","DOIUrl":"https://doi.org/10.1109/APEC.2017.7931153","url":null,"abstract":"To filter the 120Hz output current ripple in our previously designed 7.2kW single-phase EV charger, this paper proposes to equip the charger with a buck-type active filter. 650V/60A enhancement mode GaN HEMTs provided by GaN Systems Inc are adopted to work at hard-switching mode. Experimental results indicated that four such switches could be paralleled to hard switch on/off ∼240A, which is the key for the buck-type active filter. A model-based proportional-resonant controller is adopted to smooth the output current. Such control will enhance the dynamic response of the active filter, compared to the conventional PI controller. The experimental output current ripple and power loss analysis are given.","PeriodicalId":201289,"journal":{"name":"2017 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-03-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115008993","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-03-26DOI: 10.1109/APEC.2017.7931182
Yoon-Cheul Jeung, Dong-Choon Lee
In this paper, a double integral sliding mode control (DSMC) of bidirectional isolated dual active bridge (DAB) DC/DC converters is proposed for battery energy storage systems (BESS). A mathematical model for nonlinear control design is derived, which is based on the harmonic model of the DAB converter with the single phase-shift modulation (SPSM). The proposed control method can provide the zero steady-state error for the reference tracking. Moreover, the SMC can provide the fast responses without any overshoot or undershoot. The validity of the proposed control scheme has been verified by experimental results.
{"title":"Sliding mode control of bi-directional dual active bridge DC/DC converters for battery energy storage systems","authors":"Yoon-Cheul Jeung, Dong-Choon Lee","doi":"10.1109/APEC.2017.7931182","DOIUrl":"https://doi.org/10.1109/APEC.2017.7931182","url":null,"abstract":"In this paper, a double integral sliding mode control (DSMC) of bidirectional isolated dual active bridge (DAB) DC/DC converters is proposed for battery energy storage systems (BESS). A mathematical model for nonlinear control design is derived, which is based on the harmonic model of the DAB converter with the single phase-shift modulation (SPSM). The proposed control method can provide the zero steady-state error for the reference tracking. Moreover, the SMC can provide the fast responses without any overshoot or undershoot. The validity of the proposed control scheme has been verified by experimental results.","PeriodicalId":201289,"journal":{"name":"2017 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-03-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115408452","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-03-26DOI: 10.1109/APEC.2017.7931042
Bumkil Lee, Minkyu Song, D. Ma
Phase current imbalance could cause hazardous hot spots and severe heat distribution issues in integrated multiphase converters. Targeting at one most significant cause of phase current imbalance — inductor DC resistance (DCR) mismatch, this paper presents an online self-calibration technique that detects the DCR mismatch and calibrates the phase average inductor currents automatically. The circuits associated with the technique add ignorable power and silicon cost to the system, but balance phase currents effectively and precisely. The technique is verified in a four phase current-mode hysteretic controlled buck converter that is designed in a 0.35μm CMOS process. The converter delivers 9.6W peak power with a maximum chip power density of 5W/mm2 and a peak efficiency of 87.2% at 10MHz. At a nominal load of 4A and with ±20% industrial standard L and DCR mismatches, the proposed technique reduces the maximum phase current imbalance from 460mA to 25mA and improved the efficiency by about 1%.
{"title":"On-chip inductor DCR self-calibration technique for high frequency integrated multiphase switching converters","authors":"Bumkil Lee, Minkyu Song, D. Ma","doi":"10.1109/APEC.2017.7931042","DOIUrl":"https://doi.org/10.1109/APEC.2017.7931042","url":null,"abstract":"Phase current imbalance could cause hazardous hot spots and severe heat distribution issues in integrated multiphase converters. Targeting at one most significant cause of phase current imbalance — inductor DC resistance (DCR) mismatch, this paper presents an online self-calibration technique that detects the DCR mismatch and calibrates the phase average inductor currents automatically. The circuits associated with the technique add ignorable power and silicon cost to the system, but balance phase currents effectively and precisely. The technique is verified in a four phase current-mode hysteretic controlled buck converter that is designed in a 0.35μm CMOS process. The converter delivers 9.6W peak power with a maximum chip power density of 5W/mm2 and a peak efficiency of 87.2% at 10MHz. At a nominal load of 4A and with ±20% industrial standard L and DCR mismatches, the proposed technique reduces the maximum phase current imbalance from 460mA to 25mA and improved the efficiency by about 1%.","PeriodicalId":201289,"journal":{"name":"2017 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-03-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115440834","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-03-26DOI: 10.1109/APEC.2017.7931017
U. Choi, F. Blaabjerg, Ke Ma
In this paper, the lifetime prediction of power device modules based on the linear damage accumulation in conjunction with real mission profile assessment is studied. Four tests are performed under two superimposed power cycling conditions using an advanced power cycling test setup with 600 V, 30 A, 3-phase molded IGBT modules. The superimposed power cycling conditions are made based on a new lifetime model in respect to junction temperature swing duration, which has been developed based on 39 power cycling test results. The experimental results validate the lifetime prediction of the IGBT modules based on the linear damage accumulation by comparing it with the predicted lifetime from the lifetime model.
{"title":"Lifetime prediction of IGBT modules based on linear damage accumulation","authors":"U. Choi, F. Blaabjerg, Ke Ma","doi":"10.1109/APEC.2017.7931017","DOIUrl":"https://doi.org/10.1109/APEC.2017.7931017","url":null,"abstract":"In this paper, the lifetime prediction of power device modules based on the linear damage accumulation in conjunction with real mission profile assessment is studied. Four tests are performed under two superimposed power cycling conditions using an advanced power cycling test setup with 600 V, 30 A, 3-phase molded IGBT modules. The superimposed power cycling conditions are made based on a new lifetime model in respect to junction temperature swing duration, which has been developed based on 39 power cycling test results. The experimental results validate the lifetime prediction of the IGBT modules based on the linear damage accumulation by comparing it with the predicted lifetime from the lifetime model.","PeriodicalId":201289,"journal":{"name":"2017 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"56 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-03-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123495787","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-03-26DOI: 10.1109/APEC.2017.7930966
Ansel Barchowsky, J. P. Kozak, Michael R. Hontz, W. Stanchina, G. Reed, Z.-H. Mao, R. Khanna
This paper presents an analytical framework, supplemented with experimental validation, for optimizing the value of the external gate resistance employed in power conversion circuits using EPC enhancement-mode GaN transistors. A second order analytical model of the GaN device is utilized to determine a function that relates the external gate resistance to the peak gate voltage during turn-on. The results obtained from the analytical model were experimentally validated in a double pulse-test. The derived model allows for optimal selection of gate resistances such that GaN HFETs can be switched as rapidly as possible while keeping them in their safe operating region.
{"title":"Analytical and experimental optimization of external gate resistance for safe rapid turn on of normally off GaN HFETs","authors":"Ansel Barchowsky, J. P. Kozak, Michael R. Hontz, W. Stanchina, G. Reed, Z.-H. Mao, R. Khanna","doi":"10.1109/APEC.2017.7930966","DOIUrl":"https://doi.org/10.1109/APEC.2017.7930966","url":null,"abstract":"This paper presents an analytical framework, supplemented with experimental validation, for optimizing the value of the external gate resistance employed in power conversion circuits using EPC enhancement-mode GaN transistors. A second order analytical model of the GaN device is utilized to determine a function that relates the external gate resistance to the peak gate voltage during turn-on. The results obtained from the analytical model were experimentally validated in a double pulse-test. The derived model allows for optimal selection of gate resistances such that GaN HFETs can be switched as rapidly as possible while keeping them in their safe operating region.","PeriodicalId":201289,"journal":{"name":"2017 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-03-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122571082","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-03-26DOI: 10.1109/APEC.2017.7931221
Janosch Marquait, Falk Kyburz, C. Mathis, K. Schenk
The design method and optimization of a 22 kW inductive charging system (ICS) for a ground clearance range of 100 mm to 250 mm, a lateral misalignment of ±75 mm in driving direction and ±150 mm transverse to it, is described. The influence on the inductance values as well as the coupling coefficient of the coupler geometry is analyzed using state of the art finite element analysis (FEA) simulation. Additionally, mathematical analysis shows the behavior of the system for different misalignment situations and component tolerances. A fully functional prototype verifies the behavior of the FEA simulation results, the mathematical models and the electrical simulations and demonstrates a DC to DC efficiency of up to 95%.
{"title":"FEA assisted design and optimization for a highly efficient 22 kW inductive charging system for electric vehicles with large air gap and output voltage variation","authors":"Janosch Marquait, Falk Kyburz, C. Mathis, K. Schenk","doi":"10.1109/APEC.2017.7931221","DOIUrl":"https://doi.org/10.1109/APEC.2017.7931221","url":null,"abstract":"The design method and optimization of a 22 kW inductive charging system (ICS) for a ground clearance range of 100 mm to 250 mm, a lateral misalignment of ±75 mm in driving direction and ±150 mm transverse to it, is described. The influence on the inductance values as well as the coupling coefficient of the coupler geometry is analyzed using state of the art finite element analysis (FEA) simulation. Additionally, mathematical analysis shows the behavior of the system for different misalignment situations and component tolerances. A fully functional prototype verifies the behavior of the FEA simulation results, the mathematical models and the electrical simulations and demonstrates a DC to DC efficiency of up to 95%.","PeriodicalId":201289,"journal":{"name":"2017 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-03-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126043448","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-03-26DOI: 10.1109/APEC.2017.7930608
Yang Chen, Hongliang Wang, Yanfei Liu
This paper proposes a 1-MHz single stage LLC converter with improved hybrid full bridge / voltage doubler rectifier for laptop power adapter. Using single stage LLC instead of the two stage configuration is expected to reduce both the size and loss of the existing commercial products. For universal AC input, the hybrid full bridge / voltage doubler rectifier is desired. At 220 V AC input condition, the rectifier operates in full bridge mode, while at 110 V AC input, it operates as voltage doubler rectifier. With this mode switcher, the LLC converter resonant tank design only takes consideration of 220 V AC input case, such that the required operational input voltage range is reduced, and the efficiency of the LLC converter could be optimized. In this paper, two configurations of the improved hybrid full bridge / voltage doubler rectifiers are proposed with reduced cost and improved efficiency. Besides, for the LLC stage, a large magnetizing inductor could be used to significantly reduce the circulating current. To verify the effectiveness of the proposed hybrid full bridge / voltage doubler rectifier and the design of LLC converter, analysis will be carefully explained towards the rectifier and the LLC parameter design in this digest. A 65W prototype is built to demonstrate the feasibility.
{"title":"Improved hybrid rectifier for 1-MHz LLC-based universal AC-DC adapter","authors":"Yang Chen, Hongliang Wang, Yanfei Liu","doi":"10.1109/APEC.2017.7930608","DOIUrl":"https://doi.org/10.1109/APEC.2017.7930608","url":null,"abstract":"This paper proposes a 1-MHz single stage LLC converter with improved hybrid full bridge / voltage doubler rectifier for laptop power adapter. Using single stage LLC instead of the two stage configuration is expected to reduce both the size and loss of the existing commercial products. For universal AC input, the hybrid full bridge / voltage doubler rectifier is desired. At 220 V AC input condition, the rectifier operates in full bridge mode, while at 110 V AC input, it operates as voltage doubler rectifier. With this mode switcher, the LLC converter resonant tank design only takes consideration of 220 V AC input case, such that the required operational input voltage range is reduced, and the efficiency of the LLC converter could be optimized. In this paper, two configurations of the improved hybrid full bridge / voltage doubler rectifiers are proposed with reduced cost and improved efficiency. Besides, for the LLC stage, a large magnetizing inductor could be used to significantly reduce the circulating current. To verify the effectiveness of the proposed hybrid full bridge / voltage doubler rectifier and the design of LLC converter, analysis will be carefully explained towards the rectifier and the LLC parameter design in this digest. A 65W prototype is built to demonstrate the feasibility.","PeriodicalId":201289,"journal":{"name":"2017 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"2018 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-03-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114764403","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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