Pub Date : 2010-11-11DOI: 10.1109/BEC.2010.5630916
A. T. Giannitsis, M. Min
Microfluidic lab-on-chips are miniaturized biosensors that integrate fluidic, electronics, thermal elements or optical apparatuses for analysing electrolytic or biochemical samples. Supplementary to their analysing capabilities, the microfluidic lab-on-chips can process, control, separate or sort fluidic samples by means of hydrodynamic manipulation, thermal gradients, electrical or optical actuation. The significance of the lab-on-chips lies on the potential of automating laboratory procedures which highly reduce the time of the laboratory tests. We review numerous fabrication methods and procedures that we have experienced by designing such devices.
{"title":"Fabrication methods for microfluidic lab-on-chips","authors":"A. T. Giannitsis, M. Min","doi":"10.1109/BEC.2010.5630916","DOIUrl":"https://doi.org/10.1109/BEC.2010.5630916","url":null,"abstract":"Microfluidic lab-on-chips are miniaturized biosensors that integrate fluidic, electronics, thermal elements or optical apparatuses for analysing electrolytic or biochemical samples. Supplementary to their analysing capabilities, the microfluidic lab-on-chips can process, control, separate or sort fluidic samples by means of hydrodynamic manipulation, thermal gradients, electrical or optical actuation. The significance of the lab-on-chips lies on the potential of automating laboratory procedures which highly reduce the time of the laboratory tests. We review numerous fabrication methods and procedures that we have experienced by designing such devices.","PeriodicalId":228594,"journal":{"name":"2010 12th Biennial Baltic Electronics Conference","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-11-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130686704","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-11-11DOI: 10.1109/BEC.2010.5631539
T. Rang
The history of the Baltic Electronics Conference BEC series is presented. What kind of hindrances and hurdles the idea brought to the organizers and how we reached the level, where we are today. Some futuristic visions are presented as well.
{"title":"Baltic Electronics Conference (BEC) series: Long and winding road","authors":"T. Rang","doi":"10.1109/BEC.2010.5631539","DOIUrl":"https://doi.org/10.1109/BEC.2010.5631539","url":null,"abstract":"The history of the Baltic Electronics Conference BEC series is presented. What kind of hindrances and hurdles the idea brought to the organizers and how we reached the level, where we are today. Some futuristic visions are presented as well.","PeriodicalId":228594,"journal":{"name":"2010 12th Biennial Baltic Electronics Conference","volume":"97 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-11-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115340293","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-11-11DOI: 10.1109/BEC.2010.5631500
J. Moon, I. Tuokko, A. Suominen, A. Tuominen, D. Oh, B. K. Park, H. Kim
We report the hydrogen sensing properties of a sensor using TiO2 nanotube arrays. The TiO2 nanotube arrays were fabricated by anodization on titanium foil, in an electrolyte containing 0.5 wt% hydrofluoric acid mixed with water, the electric potential being 15V. TiO2 nanotube arrays were annealed at 600 Celsius for 1 h. The sensors were equipped with platinum electrodes. These two were connected with a metal wire using silver paste. The measurements of the sensor's electrical resistance were performed in NTP. The hydrogen sensor using TiO2 nanotube arrays shows a linear sensitivity with various hydrogen concentrations. After repeating exposure to hydrogen at room temperature, the sensor's resistance indicated a stable recovery to its initial resistance. The reproducibility of this exam is reliable.
{"title":"Hydrogen sensing performance of TiO2 nanotubes at room temperature","authors":"J. Moon, I. Tuokko, A. Suominen, A. Tuominen, D. Oh, B. K. Park, H. Kim","doi":"10.1109/BEC.2010.5631500","DOIUrl":"https://doi.org/10.1109/BEC.2010.5631500","url":null,"abstract":"We report the hydrogen sensing properties of a sensor using TiO2 nanotube arrays. The TiO2 nanotube arrays were fabricated by anodization on titanium foil, in an electrolyte containing 0.5 wt% hydrofluoric acid mixed with water, the electric potential being 15V. TiO2 nanotube arrays were annealed at 600 Celsius for 1 h. The sensors were equipped with platinum electrodes. These two were connected with a metal wire using silver paste. The measurements of the sensor's electrical resistance were performed in NTP. The hydrogen sensor using TiO2 nanotube arrays shows a linear sensitivity with various hydrogen concentrations. After repeating exposure to hydrogen at room temperature, the sensor's resistance indicated a stable recovery to its initial resistance. The reproducibility of this exam is reliable.","PeriodicalId":228594,"journal":{"name":"2010 12th Biennial Baltic Electronics Conference","volume":"229 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-11-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114967535","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-11-11DOI: 10.1109/BEC.2010.5629731
D. Mihhailov, V. Sklyarov, I. Skliarova, A. Sudnitson
The paper describes sequential and parallel methods of recursive data sorting that are applied to binary trees. Hardware circuits implementing these methods are based on the model of a hierarchical finite state machine, which provides support for recursion in hardware. It is shown that the considered technique allows the known optimization methods for conventional state machines to be applied directly. The described circuits have been implemented in commercial FPGAs and tested in numerous examples. Analysis and comparison of alternative and competitive techniques is also done in the paper.
{"title":"Optimization of FPGA-based circuits for recursive data sorting","authors":"D. Mihhailov, V. Sklyarov, I. Skliarova, A. Sudnitson","doi":"10.1109/BEC.2010.5629731","DOIUrl":"https://doi.org/10.1109/BEC.2010.5629731","url":null,"abstract":"The paper describes sequential and parallel methods of recursive data sorting that are applied to binary trees. Hardware circuits implementing these methods are based on the model of a hierarchical finite state machine, which provides support for recursion in hardware. It is shown that the considered technique allows the known optimization methods for conventional state machines to be applied directly. The described circuits have been implemented in commercial FPGAs and tested in numerous examples. Analysis and comparison of alternative and competitive techniques is also done in the paper.","PeriodicalId":228594,"journal":{"name":"2010 12th Biennial Baltic Electronics Conference","volume":"60 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-11-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121948178","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-11-11DOI: 10.1109/BEC.2010.5631150
G. Balodis, A. Ruško, V. Novikovs
For reduction of the impact of electromagnetic field on parameters of electronic equipment, shielding in many different shapes and qualities is used. The quality of the shielding is dependent on size, shape and amount of openings in the body of the shield. In electromagnetic immunity and emission tests it is very difficult to predict the shielding efficiency from theory of refraction, reflection and diffraction due to the very complicated shape and material mix in the design configuration of multilayer PCB, supports, covers and screens. For this reason in order to build up and make calculations of scattering matrix parameters as the estimation of the shielding efficiency in the given frequency range we propose to use the drawn 3D electromagnetic model.
{"title":"Modified estimation of shielding efficiency for hole","authors":"G. Balodis, A. Ruško, V. Novikovs","doi":"10.1109/BEC.2010.5631150","DOIUrl":"https://doi.org/10.1109/BEC.2010.5631150","url":null,"abstract":"For reduction of the impact of electromagnetic field on parameters of electronic equipment, shielding in many different shapes and qualities is used. The quality of the shielding is dependent on size, shape and amount of openings in the body of the shield. In electromagnetic immunity and emission tests it is very difficult to predict the shielding efficiency from theory of refraction, reflection and diffraction due to the very complicated shape and material mix in the design configuration of multilayer PCB, supports, covers and screens. For this reason in order to build up and make calculations of scattering matrix parameters as the estimation of the shielding efficiency in the given frequency range we propose to use the drawn 3D electromagnetic model.","PeriodicalId":228594,"journal":{"name":"2010 12th Biennial Baltic Electronics Conference","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-11-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129318930","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-11-11DOI: 10.1109/BEC.2010.5631639
Kenno Parm, S. Nõmm, J. Vain
This research evaluates how informative are the feature (coordinates, velocities and accelerations) captured by 3D motion tracking system for segmentation of human hand movements. Six gestures and their transitions have been studied. To measure the informativeness of the features the bidding automaton was constructed that compares the human-defined segmentation points (“techer” reference data set) to the changes of the real feature values in neighborhood of those gesture transition/switching points. Based on the comparison certain weights, describing correlation between changes of certain feature and teacher defined switching, were assigned to each feature at each switching point.
{"title":"Application of bidding automata for measuring the informativeness of hand motion characteristic features","authors":"Kenno Parm, S. Nõmm, J. Vain","doi":"10.1109/BEC.2010.5631639","DOIUrl":"https://doi.org/10.1109/BEC.2010.5631639","url":null,"abstract":"This research evaluates how informative are the feature (coordinates, velocities and accelerations) captured by 3D motion tracking system for segmentation of human hand movements. Six gestures and their transitions have been studied. To measure the informativeness of the features the bidding automaton was constructed that compares the human-defined segmentation points (“techer” reference data set) to the changes of the real feature values in neighborhood of those gesture transition/switching points. Based on the comparison certain weights, describing correlation between changes of certain feature and teacher defined switching, were assigned to each feature at each switching point.","PeriodicalId":228594,"journal":{"name":"2010 12th Biennial Baltic Electronics Conference","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-11-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130527116","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-11-11DOI: 10.1109/BEC.2010.5630017
J. Zakis, D. Vinnikov, I. Roasto
This paper analyzes the PWM control method for a new type of step-up DC/DC converters with galvanic isolation - the quasi-Z-source inverter (qZSI) based DC/DC converter. The PWM control method for qZSI with soft-switching capability is proposed and experimentally proved. The operation principles of discussed converter are explained. The experimental verification and analysis of top and bottom IGBTs of inverter bridge has been made. A prototype has been built in the laboratory and experiments are presented to analyse the soft-switching capability in loss reduction.
{"title":"Soft-switching capability analysis of a qZSI-based DC/DC converter","authors":"J. Zakis, D. Vinnikov, I. Roasto","doi":"10.1109/BEC.2010.5630017","DOIUrl":"https://doi.org/10.1109/BEC.2010.5630017","url":null,"abstract":"This paper analyzes the PWM control method for a new type of step-up DC/DC converters with galvanic isolation - the quasi-Z-source inverter (qZSI) based DC/DC converter. The PWM control method for qZSI with soft-switching capability is proposed and experimentally proved. The operation principles of discussed converter are explained. The experimental verification and analysis of top and bottom IGBTs of inverter bridge has been made. A prototype has been built in the laboratory and experiments are presented to analyse the soft-switching capability in loss reduction.","PeriodicalId":228594,"journal":{"name":"2010 12th Biennial Baltic Electronics Conference","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-11-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125354652","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-11-11DOI: 10.1109/BEC.2010.5630653
A. Blinov, T. Jalakas, D. Vinnikov, J. Laugis
This paper studies the switching properties of different IGBTs with blocking voltage of 6.5 kV operating under hard-switching conditions. The reference topology used in analysis is a half-bridge inverter with power rating of 300 kVA. Since the development of high-voltage IGBT based converters is often a tradeoff between compactness, complexity, efficiency and cost the different state of the art 6.5 kV IGBTs with collector currents of 200 A, 400 A, 600 A and 750 A were compared under the desired operation conditions. The most technically and economical feasible solution is proposed. Some generalizations and practical considerations are provided.
{"title":"Analysis of switching properties of different high voltage IGBTs operating under hard-switching conditions","authors":"A. Blinov, T. Jalakas, D. Vinnikov, J. Laugis","doi":"10.1109/BEC.2010.5630653","DOIUrl":"https://doi.org/10.1109/BEC.2010.5630653","url":null,"abstract":"This paper studies the switching properties of different IGBTs with blocking voltage of 6.5 kV operating under hard-switching conditions. The reference topology used in analysis is a half-bridge inverter with power rating of 300 kVA. Since the development of high-voltage IGBT based converters is often a tradeoff between compactness, complexity, efficiency and cost the different state of the art 6.5 kV IGBTs with collector currents of 200 A, 400 A, 600 A and 750 A were compared under the desired operation conditions. The most technically and economical feasible solution is proposed. Some generalizations and practical considerations are provided.","PeriodicalId":228594,"journal":{"name":"2010 12th Biennial Baltic Electronics Conference","volume":"72 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-11-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126236543","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-11-11DOI: 10.1109/BEC.2010.5631515
M. Fouda, M. B. Abdelhalim, H. Amer
In practice, sequential circuits happen to be the most common type of logic circuits. Switching in sequential circuits is the hardest to estimate due to the complex higher order dependencies in the switching profile, induced by the spatio-temporal components of the circuit and mainly caused by the state feedbacks that are present. These state feedbacks do not exist in combinational circuits. In this paper, a new methodology is developed to calculate the value of the average power consumption of sequential CMOS circuits. The methodology is accurate while other methodologies produce approximate results. It is based on the concept of Logic Pictures. To verify the correctness, the methodology was applied to four ISCAS89 benchmark circuits. The obtained results were identical to those produced by Monte Carlo simulations.
{"title":"Power consumption of sequential CMOS circuits using Logic Pictures","authors":"M. Fouda, M. B. Abdelhalim, H. Amer","doi":"10.1109/BEC.2010.5631515","DOIUrl":"https://doi.org/10.1109/BEC.2010.5631515","url":null,"abstract":"In practice, sequential circuits happen to be the most common type of logic circuits. Switching in sequential circuits is the hardest to estimate due to the complex higher order dependencies in the switching profile, induced by the spatio-temporal components of the circuit and mainly caused by the state feedbacks that are present. These state feedbacks do not exist in combinational circuits. In this paper, a new methodology is developed to calculate the value of the average power consumption of sequential CMOS circuits. The methodology is accurate while other methodologies produce approximate results. It is based on the concept of Logic Pictures. To verify the correctness, the methodology was applied to four ISCAS89 benchmark circuits. The obtained results were identical to those produced by Monte Carlo simulations.","PeriodicalId":228594,"journal":{"name":"2010 12th Biennial Baltic Electronics Conference","volume":"22 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-11-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126345656","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-11-11DOI: 10.1109/BEC.2010.5631735
M. Kaaramees, J. Vain, K. Raiend
We describe a method and algorithm for model-based construction of an on-line reactive planning tester (RPT) for black-box testing of embedded systems specified by non-deterministic extended finite state machine (EFSM) models. The key idea of RPT lies in off-line learning of the System Under Test (SUT) model to prepare the data for efficient on-line reactive planning. A test purpose is attributed to the transitions of the SUT model by a set of Boolean conditions called traps. The result of the off-line analysis is a set of constraints used in on-line testing for guiding the SUT towards taking the moves represented by trap-labeled transitions in SUT model and generating required data for inputs. We demonstrate the results on a simple example and discuss the practical experiences of using the proposed method.
{"title":"Model-based synthesis of reactive planning on-line testers for non-deterministic embedded systems","authors":"M. Kaaramees, J. Vain, K. Raiend","doi":"10.1109/BEC.2010.5631735","DOIUrl":"https://doi.org/10.1109/BEC.2010.5631735","url":null,"abstract":"We describe a method and algorithm for model-based construction of an on-line reactive planning tester (RPT) for black-box testing of embedded systems specified by non-deterministic extended finite state machine (EFSM) models. The key idea of RPT lies in off-line learning of the System Under Test (SUT) model to prepare the data for efficient on-line reactive planning. A test purpose is attributed to the transitions of the SUT model by a set of Boolean conditions called traps. The result of the off-line analysis is a set of constraints used in on-line testing for guiding the SUT towards taking the moves represented by trap-labeled transitions in SUT model and generating required data for inputs. We demonstrate the results on a simple example and discuss the practical experiences of using the proposed method.","PeriodicalId":228594,"journal":{"name":"2010 12th Biennial Baltic Electronics Conference","volume":"35 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-11-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133195517","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
京公网安备 11010802042870号
京ICP备2023020795号-1
扫码关注我们
求助内容：
应助结果提醒方式：