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2010 12th Biennial Baltic Electronics Conference最新文献

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Graphical interface for debugging RTL Networks-on-Chip 调试RTL片上网络的图形界面
Pub Date : 2010-11-11 DOI: 10.1109/BEC.2010.5630292
L. Moller, H. Jesus, F. Moraes, L. Indrusiak, T. Hollstein, M. Glesner
One problem of Multiprocessor Systems-on-Chip (MPSoCs) based on Networks-on-Chip (NoCs) is tracing the dozens of parallel communications that are transferred in the system. The goals of tracing communications are usually either debugging or monitoring the NoC for design space exploration. On Register Transfer Level (RTL) NoCs the tracing is frequently verified by waveforms, which provides limited useful information about the global status of the NoC. The goal of this work is to improve the tracing capabilities of RTL NoCs and provide a global picture of what is happening in the NoC. This is accomplished by using a Java tool to represent graphically relevant events of the NoC. The input of this tool is a list of relevant events generated by the RTL simulator during the simulation of an MPSoC. The HERMES NoC is used as test case for the tool.
基于片上网络(noc)的多处理器片上系统(mpsoc)的一个问题是跟踪系统中传输的数十个并行通信。跟踪通信的目标通常是调试或监视NoC以进行设计空间探索。在寄存器传输级(RTL) NoC上,跟踪通常由波形验证,这提供了关于NoC全局状态的有限有用信息。这项工作的目标是提高RTL NoC的跟踪能力,并提供NoC中正在发生的事情的全局图像。这是通过使用Java工具以图形方式表示NoC的相关事件来实现的。该工具的输入是由RTL模拟器在MPSoC仿真期间生成的相关事件列表。HERMES NoC被用作该工具的测试用例。
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引用次数: 6
Effective EFSM generation for HW/SW-design verification 有效的EFSM生成的硬件/ sw设计验证
Pub Date : 2010-11-11 DOI: 10.1109/BEC.2010.5631006
Michele Bertasi, G. Di Guglielmo, F. Fummi, G. Pravadelli
The paper presents an automatic procedure for generating a particular kind of extended finite state machine, which allows a more uniform exploration of the state space of a design under verification. The proposed approach avoids the transition-incompatibility problem which typically arises in actual HW/SW-system descriptions. A EFSM-based ATPG, which exploits such a model, is able to more uniformly analyze the state space of the system with respect to using a generic EFSM.
本文提出了一种自动生成特定类型扩展有限状态机的程序,它允许对验证设计的状态空间进行更统一的探索。所提出的方法避免了在实际的硬件/软件系统描述中通常出现的转换不兼容问题。利用这种模型的基于EFSM的ATPG能够相对于使用通用EFSM更统一地分析系统的状态空间。
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引用次数: 0
Single-lockin detection of AC magnetic fields by fluxgate sensor 磁通门传感器的交流磁场单锁检测
Pub Date : 2010-10-01 DOI: 10.1109/BEC.2010.5631591
M. Janošek, S. Dado
We present a simple narrowband method to detect the amplitude of alternating magnetic fields by a fluxgate sensor using a single lock-in amplifier, improving the common method of using two phase sensitive demodulators (lock-in amplifiers). We eliminated the need for two phase-sensitivite demodulators by processing the reference signals of lock-in amplifier and of the fluxgate excitation unit. This setup can be used as a high-resolution, narrowband spectral analyzer of magnetic fields or as a system for measuring the AC response of magnetic markers. Two methods were introduced and tested; we achieved 2 kHz detecting noise spectral density of 80 pT/√Hz in the laboratory environment. The method is directly usable for any fluxgate sensor or magnetometer, where the reference signals are available. Using a slow feedback compensating-loop further improves the dynamic range of the instrument.
我们提出了一种简单的窄带方法,通过一个磁通门传感器使用单个锁相放大器来检测交变磁场的幅度,改进了使用两个相敏解调器(锁相放大器)的常用方法。我们通过处理锁相放大器和磁通门激励单元的参考信号,消除了对两个相敏解调器的需要。该装置可以用作高分辨率窄带磁场频谱分析仪,也可以用作测量磁性标记物交流响应的系统。介绍并测试了两种方法;我们在实验室环境下实现了2 kHz检测噪声谱密度为80 pT/√Hz。该方法可直接用于任何有参考信号的磁通门传感器或磁力计。采用慢反馈补偿回路进一步提高了仪器的动态范围。
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引用次数: 1
期刊
2010 12th Biennial Baltic Electronics Conference
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