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2012 IEEE International Solid-State Circuits Conference最新文献

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A versatile multi-modality serial link 一个通用的多模态串行链路
Pub Date : 2012-04-03 DOI: 10.1109/ISSCC.2012.6177034
Yusuke Tanaka, Yasufumi Hino, Y. Okada, Takahiro Takeda, Sho Ohashi, H. Yamagishi, K. Kawasaki, A. Hajimiri
Serial data links are often designed targeting a specific transmission medium. High-speed links using different predetermined transmission media have been demonstrated in the past [1-3]. This, however, restricts user's ability to use an integrated link interface with other transmission media once the chip is fabricated. For example, traditional transceivers for copper interconnects typically transmit baseband data, which is incompatible with a free-space wireless channel that is bandpass in nature and often uses RF carriers. A multi-modality transceiver block compatible with different transmission media is highly desirable as it offers great versatility by allowing the exact same interface circuitry to be used with different transmission media. Such a versatile interface can relax the board and system design requirements and enable the reuse of the same transceiver core with different media, reducing the time and cost overhead of re-designing and re-manufacturing.
串行数据链路通常是针对特定的传输介质而设计的。使用不同预定传输介质的高速链路在过去已经被证明[1-3]。然而,一旦芯片被制造出来,这就限制了用户使用集成链接接口与其他传输介质的能力。例如,用于铜互连的传统收发器通常传输基带数据,这与本质上是带通的自由空间无线信道不兼容,并且通常使用RF载波。与不同传输介质兼容的多模态收发器块是非常理想的,因为它允许将完全相同的接口电路用于不同的传输介质,从而提供了很大的通用性。这样的多功能接口可以放松电路板和系统的设计要求,并且可以在不同的介质上重复使用相同的收发器核心,从而减少重新设计和再制造的时间和成本开销。
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引用次数: 38
A global-shutter CMOS image sensor with readout speed of 1Tpixel/s burst and 780Mpixel/s continuous 全局快门CMOS图像传感器,读取速度为突发1Tpixel/s,连续780Mpixel/s
Pub Date : 2012-04-03 DOI: 10.1109/ISSCC.2012.6177046
Yasuhisa Tochigi, Katsuhiko Hanzawa, Yuri Kato, R. Kuroda, H. Mutoh, Ryuta Hirose, H. Tominaga, K. Takubo, Y. Kondo, S. Sugawa
This paper presents a 400H×256V pixel CMOS image sensor including 128 on-chip memory/pixel with 1Tpixel/s in burst operation without cooling and 780Mpixel/s in continuous operation. To improve the read-out speed from the chip, a noise-reduction circuit in pixel and relay buffers is introduced.
本文提出了一种400H×256V像素CMOS图像传感器,其片上存储器为128个/像素,无冷却突发运行速度为1Tpixel/s,连续运行速度为780Mpixel/s。为了提高芯片的读出速度,在像素和继电器缓冲器中引入了降噪电路。
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引用次数: 53
A 530mV 10-lane SIMD processor with variation resiliency in 45nm SOI 45nm SOI中具有可变弹性的530mV 10通道SIMD处理器
Pub Date : 2012-04-03 DOI: 10.1109/ISSCC.2012.6177105
R. Pawlowski, Evgeni Krimer, Joseph Crop, J. Postman, N. M. Madani, M. Erez, P. Chiang
Near-threshold computing exhibits improved energy efficiency compared to nominal super-threshold operation [1, 2]. Two critical bottlenecks prevent mainstream adoption of low-VDD operation: degraded logic delay resulting in significantly lower throughput than at super-threshold, and excessive, unpredictable delay variation caused by increased sensitivity to process and dynamic variations.
与名义上的超阈值运算相比,近阈值运算显示出更高的能源效率[1,2]。两个关键瓶颈阻碍了低vdd操作的主流采用:降低的逻辑延迟导致吞吐量明显低于超阈值,以及由于对过程和动态变化的敏感性增加而导致的过度不可预测的延迟变化。
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引用次数: 31
Take the expressway to go greener 走高速公路更环保
Pub Date : 2012-04-03 DOI: 10.1109/ISSCC.2012.6176866
Y. Yano
Microelectronics has evolved to save power. In fact, semiconductor technology has been in the lead in the reduction of power consumption, by facilitating energy monitoring, and the controlling and managing of energy consumption. The key product in this advance has been a less-commonly-known semiconductor device called the microcontroller. That the MCU uses very little power was demonstrated for the first time by Renesas in 2006, by operating a low-power MCU from the electricity generated by 4 lemons! Subseqently, in 2011, we succeeded in operating our latest low-power MCU for 3 hours and 45 minutes using one lemon as a power source. Yet, in the future, MCUs must evolve further to save power, in widespread applications including the "energy harvesting" environment.
微电子的发展是为了节省电力。事实上,半导体技术通过促进能源监测、控制和管理能源消耗,在降低功耗方面一直处于领先地位。这一进步的关键产品是一种不太为人所知的半导体器件,称为微控制器。瑞萨电子在2006年首次展示了MCU使用非常少的功率,通过运行4个柠檬产生的电力的低功耗MCU !随后,在2011年,我们成功地使用一个柠檬作为电源运行了我们最新的低功耗MCU 3小时45分钟。然而,在未来,mcu必须进一步发展以节省电力,在包括“能量收集”环境在内的广泛应用中。
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引用次数: 19
A 280mV-to-1.1V 256b reconfigurable SIMD vector permutation engine with 2-dimensional shuffle in 22nm CMOS 基于22nm CMOS的280mv -1.1 v 256b可重构SIMD矢量置换引擎
Pub Date : 2012-04-03 DOI: 10.1109/ISSCC.2012.6176966
S. Hsu, A. Agarwal, M. Anders, S. Mathew, Himanshu Kaul, F. Sheikh, R. Krishnamurthy
Energy-efficient SIMD permutation operations are key for maximizing high-performance microprocessor vector datapath utilization in multimedia, graphics, and signal processing workloads [1-3]. A wide SIMD vector permutation engine is required to achieve high-throughput data rearrangement operations on large data sets, with scaled supply voltages to deliver high energy efficiency. An ultra-low-voltage reconfigurable 4-way to 32-way SIMD vector permutation engine consisting of a 32-entry × 256b 3-read/1-write ported register file with a 256b byte-wise any-to-any permute crossbar for 2-dimensional shuffle is fabricated in 22nm CMOS. The register file integrates a vertical shuffle across multiple entries into read/write operations, and includes clockless static reads with shared P/N dual-ended transmission gate (DETG) writes, improving register file VMIN by 250mV across PVT variations with a wide dynamic operating range of 280mV-1.1V. The permute crossbar implements an interleaved folded byte-wise multiplexer layout forming an any-to-any fully-connected tree to perform a horizontal shuffle with permute accumulate circuits, and includes vector flip-flops, stacked min-delay buffers, shared gates to average min-sized transistor variation, and ultra-low-voltage split-output (ULVS) level shifters improving logic VMIN by 150mV, while enabling peak energy efficiency of 585GOPS/W measured at 260mV, 50°C. The permutation engine occupies a dense layout of 0.048mm2 (Fig. 10.1.7) while achieving: (i) nominal register file performance of 1.8GHz, 106mW measured at 0.9V, 50°C; (ii) robust register file functionality measured down to 280mV (subthreshold) with peak energy efficiency of 154GOPS/W; (iii) scalable permute crossbar performance of 2.9GHz, 69mW measured at 1.1V, 50°C with deep sub-threshold operation at 240mV, 10MHz consuming 19μW; and (iv) a 64b 4×4 matrix transpose algorithm with 53% energy savings and 42% improved peak throughput of 263Gbps measured at 1.8GHz, 0.9V.
节能SIMD排列操作是在多媒体、图形和信号处理工作负载中最大化高性能微处理器矢量数据路径利用率的关键[1-3]。为了在大型数据集上实现高吞吐量的数据重排操作,需要一个宽SIMD矢量排列引擎,并具有可缩放的电源电压以提供高能效。采用22nm CMOS工艺制备了一种超低电压可重构的4路到32路SIMD矢量置换引擎,该引擎由一个32入口× 256b 3读1写端口寄存器文件和一个256b字节任意对任意置换交叉条组成,用于二维置换。该寄存器文件集成了跨多个条目的垂直shuffle到读/写操作中,并包括无时钟静态读取和共享P/N双端传输门(DETG)写入,通过PVT变化将寄存器文件VMIN提高了250mV,动态工作范围为280mV-1.1V。该置换交叉棒实现了交错折叠字节多路复用器布局,形成任意到任意全连接树,通过置换累积电路执行水平置换,包括矢量触发器、堆叠最小延迟缓冲器、平均最小尺寸晶体管变化的共享门,以及将逻辑VMIN提高150mV的超低电压分频输出(ULVS)电平移位器,同时在260mV、50°C下实现585GOPS/W的峰值能量效率。排列引擎占据0.048mm2的密集布局(图10.1.7),同时实现:(i)在0.9V, 50°C下测量的标称寄存器文件性能为1.8GHz, 106mW;(ii)稳健的寄存器文件功能,低至280mV(亚阈值),峰值能量效率为154GOPS/W;(iii)在1.1V、50°C、240mV、10MHz、功耗19μW的深度亚阈值工作条件下,测量2.9GHz、69mW的可扩展permute crossbar性能;(iv)一种64b 4×4矩阵转置算法,在1.8GHz, 0.9V下的峰值吞吐量为263Gbps,节能53%,提高42%。
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引用次数: 46
A 5.58nW 32.768kHz DLL-assisted XO for real-time clocks in wireless sensing applications 5.58nW 32.768kHz dll辅助XO,用于无线传感应用中的实时时钟
Pub Date : 2012-04-03 DOI: 10.1109/ISSCC.2012.6177043
Dongmin Yoon, D. Sylvester, D. Blaauw
There is a growing interest in ultra-low-power wireless microsystems [1]. Synchronization between different nodes in a wireless sensor network plays an important role in the overall node energy budget due to the high power demand of wireless communication. One synchronization approach is to employ a realtime clock (RTC) on each node, with nodes awakening periodically to communicate and re-synchronize. With recent work on ultra-low-power microsystems demonstrating average power consumption of several nW [2], there is a need for ultra-low-power timers that can synchronize communication events and serve as frequency references for radios.
人们对超低功耗无线微系统越来越感兴趣。由于无线通信的高功率需求,无线传感器网络中不同节点之间的同步在节点整体能量预算中起着重要的作用。一种同步方法是在每个节点上使用实时时钟(RTC),节点定期唤醒以进行通信和重新同步。由于最近在超低功耗微系统上的研究表明平均功耗为几nW[2],因此需要超低功耗计时器来同步通信事件并作为无线电的频率参考。
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引用次数: 43
Technologies that could change the world — You decide! 可以改变世界的技术——你来决定!
Pub Date : 2012-04-03 DOI: 10.1109/ISSCC.2012.6177110
J. Hurwitz, J. Savoj
Sometimes a new technology or technique comes along that is just plain different to the incumbent solutions or conventional approaches. They can often take a while to make their mark, as the conventional state of the art keeps moving, or there is resistance to change because of the exotic nature of the solution being offered, or the crossover condition in the market for the technology to be justified has not yet been reached. This session looks at a number of ideas that are currently asking us to re-assess the way things are done. The five talks in this session cover the following topics: MEMS; thermal diffusivity sensor; VCO-based quantizer; continuous time DSP; and analog synthesis.
有时,新技术或技术的出现与现有的解决方案或传统方法完全不同。它们通常需要一段时间才能取得成功,因为传统的技术水平在不断发展,或者由于所提供的解决方案具有异国情调的性质而对变革产生抵制,或者市场上的交叉条件尚未达到证明技术是合理的。本次会议将探讨目前要求我们重新评估做事方式的一些想法。本次会议的五场讲座涵盖以下主题:MEMS;热扩散传感器;VCO-based量化器;连续时间DSP;模拟合成。
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引用次数: 2
A 259.6μW nonlinear HRV-EEG chaos processor with body channel communication interface for mental health monitoring 一种259.6μW非线性HRV-EEG混沌处理器,带有身体通道通信接口,用于心理健康监测
Pub Date : 2012-04-03 DOI: 10.1109/ISSCC.2012.6177020
Taehwan Roh, Sunjoo Hong, Hyunwoo Cho, H. Yoo
In this paper, we present a wearable mental health measurement system incorporating the nonlinear analysis of physiological rhythm including HRV and EEG signals together for high accuracy. The proposed system is implemented in a 31g headband that measures scalp signals and performs nonlinear-chaotic analysis to measure the stress levels. Using a 1.2V 40mAhr coin-battery (11.7χ5.35mm21.7g), the proposed system is able to operate for more than 7 days.
本文提出了一种可穿戴式心理健康测量系统,该系统将心率和脑电图信号的非线性生理节律分析结合在一起,具有较高的测量精度。所提出的系统被实现在一个31g的头带中,测量头皮信号并执行非线性混沌分析来测量应力水平。使用1.2V 40mAhr纽扣电池(11.7χ5.35mm21.7g),所提出的系统能够运行超过7天。
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引用次数: 14
ASIC for a resonant wireless pressure-sensing system for harsh environments achieving ±2% error between −40 and 150°C using Q-based temperature compensation 用于恶劣环境的谐振无线压力传感系统的ASIC,使用基于q的温度补偿,在- 40至150°C之间实现±2%的误差
Pub Date : 2012-04-03 DOI: 10.1109/ISSCC.2012.6176975
M. Rocznik, F. Henrici, Remigius Has
Pressure sensors used in automotive applications are subject to increasingly harsh environments such as acid containing gases in vehicle exhausts or exhaust gas recirculation. State-of-the-art gel protection for sensing elements and their electronics is reaching its limit. A circuit's exposed aluminum bond pads are especially vulnerable to corrosion and failure. In response to these issues, we report an approach to eliminate bond pads and bonds between the sensor and IC altogether.
用于汽车应用的压力传感器受到越来越恶劣的环境的影响,例如车辆废气中含有酸性气体或废气再循环。用于传感元件及其电子器件的最先进的凝胶保护已达到极限。电路裸露的铝键垫特别容易受到腐蚀和损坏。针对这些问题,我们报告了一种完全消除传感器和IC之间键合垫和键合的方法。
{"title":"ASIC for a resonant wireless pressure-sensing system for harsh environments achieving ±2% error between −40 and 150°C using Q-based temperature compensation","authors":"M. Rocznik, F. Henrici, Remigius Has","doi":"10.1109/ISSCC.2012.6176975","DOIUrl":"https://doi.org/10.1109/ISSCC.2012.6176975","url":null,"abstract":"Pressure sensors used in automotive applications are subject to increasingly harsh environments such as acid containing gases in vehicle exhausts or exhaust gas recirculation. State-of-the-art gel protection for sensing elements and their electronics is reaching its limit. A circuit's exposed aluminum bond pads are especially vulnerable to corrosion and failure. In response to these issues, we report an approach to eliminate bond pads and bonds between the sensor and IC altogether.","PeriodicalId":255282,"journal":{"name":"2012 IEEE International Solid-State Circuits Conference","volume":"30 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-04-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123654042","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 14
A 28Gb/s source-series terminated TX in 32nm CMOS SOI 32nm CMOS SOI中的28Gb/s源系列端接TX
Pub Date : 2012-04-03 DOI: 10.1109/ISSCC.2012.6177035
C. Menolfi, J. Hertle, T. Toifl, T. Morf, Daniele Gardellini, M. Braendli, P. Buchmann, M. Kossel
Upcoming standards such as OIF CEI-25LR and CEI-28SR demand transmitter circuits above 20Gb/s [1]-[3] with stringent jitter requirements. The SST driver topology, which has been previously demonstrated at lower data rates [4], is an attractive solution as it enables multiple termination options and low power consumption. In addition, its single-ended topology facilitates an architecture in which the delay mismatch between true and complementary output can be adjusted, as is desirable for data transmission over long cables. In this contribution, the architecture and design of the key components of a half-rate 28Gb/s SST TX are presented.
即将推出的标准,如OIF CEI-25LR和CEI-28SR,要求发射器电路超过20Gb/s[1]-[3],并具有严格的抖动要求。先前已在较低数据速率下证明的SST驱动拓扑[4]是一种有吸引力的解决方案,因为它支持多种终端选项和低功耗。此外,它的单端拓扑结构有助于调整真输出和互补输出之间的延迟不匹配,这对于通过长电缆传输数据是理想的。在这篇贡献中,介绍了半速率28Gb/s SST TX的体系结构和关键组件的设计。
{"title":"A 28Gb/s source-series terminated TX in 32nm CMOS SOI","authors":"C. Menolfi, J. Hertle, T. Toifl, T. Morf, Daniele Gardellini, M. Braendli, P. Buchmann, M. Kossel","doi":"10.1109/ISSCC.2012.6177035","DOIUrl":"https://doi.org/10.1109/ISSCC.2012.6177035","url":null,"abstract":"Upcoming standards such as OIF CEI-25LR and CEI-28SR demand transmitter circuits above 20Gb/s [1]-[3] with stringent jitter requirements. The SST driver topology, which has been previously demonstrated at lower data rates [4], is an attractive solution as it enables multiple termination options and low power consumption. In addition, its single-ended topology facilitates an architecture in which the delay mismatch between true and complementary output can be adjusted, as is desirable for data transmission over long cables. In this contribution, the architecture and design of the key components of a half-rate 28Gb/s SST TX are presented.","PeriodicalId":255282,"journal":{"name":"2012 IEEE International Solid-State Circuits Conference","volume":"33 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-04-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124771083","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 28
期刊
2012 IEEE International Solid-State Circuits Conference
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