Pub Date : 1999-03-14DOI: 10.1109/APEC.1999.749719
Bonho Bae, Sang-Hoon Kim, S. Sul
This paper proposes a new overmodulation strategy to give a better voltage utilization by tracking the voltage vector along the hexagon sides of traction motor drives. This strategy enables the inverter to control both the magnitude and angle of current. Therefore, vector control using this strategy can lead to better output torque dynamics compared to the conventional slip frequency control with six-step voltage, which is widely used in traction drives. In this strategy, the d-axis output voltage of a current controller to control the flux is conserved and the q-axis output voltage to control the torque is controlled to place the voltage vector on the hexagon boundary in case of overmodulation. The limited q-axis voltage is used for anti-windup of q-axis current controller. This paper also presents a new field weakening scheme which incorporates the proposed overmodulation strategy. In this scheme, the flux level is selected by both required current limit and the available maximum voltage along hexagon sides. The validity of the proposed overall scheme is confirmed by computer simulation and experiments with a prototype setup.
{"title":"A new overmodulation strategy for traction drive","authors":"Bonho Bae, Sang-Hoon Kim, S. Sul","doi":"10.1109/APEC.1999.749719","DOIUrl":"https://doi.org/10.1109/APEC.1999.749719","url":null,"abstract":"This paper proposes a new overmodulation strategy to give a better voltage utilization by tracking the voltage vector along the hexagon sides of traction motor drives. This strategy enables the inverter to control both the magnitude and angle of current. Therefore, vector control using this strategy can lead to better output torque dynamics compared to the conventional slip frequency control with six-step voltage, which is widely used in traction drives. In this strategy, the d-axis output voltage of a current controller to control the flux is conserved and the q-axis output voltage to control the torque is controlled to place the voltage vector on the hexagon boundary in case of overmodulation. The limited q-axis voltage is used for anti-windup of q-axis current controller. This paper also presents a new field weakening scheme which incorporates the proposed overmodulation strategy. In this scheme, the flux level is selected by both required current limit and the available maximum voltage along hexagon sides. The validity of the proposed overall scheme is confirmed by computer simulation and experiments with a prototype setup.","PeriodicalId":287192,"journal":{"name":"APEC '99. Fourteenth Annual Applied Power Electronics Conference and Exposition. 1999 Conference Proceedings (Cat. No.99CH36285)","volume":"43 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-03-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133870976","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1999-03-14DOI: 10.1109/APEC.1999.749509
A. Yildiz, B. Çakır, N. Inanç, N. Abut
In this study, a fast simulation technique is proposed for the analysis of power electronic circuits. After switching, these circuits behave like a linear circuit. Therefore, linear circuit analysis methods can be used. In the simulation, capacitors and inductors are replaced by voltage and current sources respectively, whose values are determined by their current and voltages in the previous step. The method is based on solving a system of algebraically modified nodal equations at each integration step. The technique requires only DC analysis. The writing or solving of time-differential equations or Laplace transform inverses are not required. Thus, the simulation is fast and the simulation time is essentially the same as for a linear, time-invariant circuit of the same complexity. A simulation algorithm is given and an example is included.
{"title":"A fast simulation technique for the power electronic converters","authors":"A. Yildiz, B. Çakır, N. Inanç, N. Abut","doi":"10.1109/APEC.1999.749509","DOIUrl":"https://doi.org/10.1109/APEC.1999.749509","url":null,"abstract":"In this study, a fast simulation technique is proposed for the analysis of power electronic circuits. After switching, these circuits behave like a linear circuit. Therefore, linear circuit analysis methods can be used. In the simulation, capacitors and inductors are replaced by voltage and current sources respectively, whose values are determined by their current and voltages in the previous step. The method is based on solving a system of algebraically modified nodal equations at each integration step. The technique requires only DC analysis. The writing or solving of time-differential equations or Laplace transform inverses are not required. Thus, the simulation is fast and the simulation time is essentially the same as for a linear, time-invariant circuit of the same complexity. A simulation algorithm is given and an example is included.","PeriodicalId":287192,"journal":{"name":"APEC '99. Fourteenth Annual Applied Power Electronics Conference and Exposition. 1999 Conference Proceedings (Cat. No.99CH36285)","volume":"59 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-03-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123821910","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1999-03-14DOI: 10.1109/APEC.1999.749495
Qun Zhao, F. Lee, F. Tsai
Characterization of bulk capacitor voltage stress in a single-switch, input harmonic current corrected flyback converter is presented. A design procedure for optimizing such a converter design by limiting the bulk capacitor voltage stress, maintaining high efficiency while complying with IEC 1000-3-2 class D input harmonic current requirements is introduced. A 60 W universal input, 5 V at 12 A power supply designed following the procedure was built, and the theoretical prediction of bulk capacitor voltage as well as the predicted input harmonic contents are verified experimentally.
{"title":"Design optimization of an off-line input harmonic current corrected flyback converter","authors":"Qun Zhao, F. Lee, F. Tsai","doi":"10.1109/APEC.1999.749495","DOIUrl":"https://doi.org/10.1109/APEC.1999.749495","url":null,"abstract":"Characterization of bulk capacitor voltage stress in a single-switch, input harmonic current corrected flyback converter is presented. A design procedure for optimizing such a converter design by limiting the bulk capacitor voltage stress, maintaining high efficiency while complying with IEC 1000-3-2 class D input harmonic current requirements is introduced. A 60 W universal input, 5 V at 12 A power supply designed following the procedure was built, and the theoretical prediction of bulk capacitor voltage as well as the predicted input harmonic contents are verified experimentally.","PeriodicalId":287192,"journal":{"name":"APEC '99. Fourteenth Annual Applied Power Electronics Conference and Exposition. 1999 Conference Proceedings (Cat. No.99CH36285)","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-03-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122272384","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1999-03-14DOI: 10.1109/APEC.1999.749697
A. Fernández, J. Sebastián, P. Villegas, M. Hernando, S. Ollero
A recently proposed active input current shaper (AICS) is used to turn a conventional buck converter into a single stage AC-to-DC power converter that complies with IEC 1000-3-2 regulations with high efficiency, fast transient response and low cost. This topology is used in this paper to design an online battery charger with no galvanic isolation. This solution is a very simple one and only implies slight changes to the conventional topology. Besides, efficiency is high and the size increase is small, all of which are obtained at a very low cost.
{"title":"AC-to-DC buck converter with active input current shaper","authors":"A. Fernández, J. Sebastián, P. Villegas, M. Hernando, S. Ollero","doi":"10.1109/APEC.1999.749697","DOIUrl":"https://doi.org/10.1109/APEC.1999.749697","url":null,"abstract":"A recently proposed active input current shaper (AICS) is used to turn a conventional buck converter into a single stage AC-to-DC power converter that complies with IEC 1000-3-2 regulations with high efficiency, fast transient response and low cost. This topology is used in this paper to design an online battery charger with no galvanic isolation. This solution is a very simple one and only implies slight changes to the conventional topology. Besides, efficiency is high and the size increase is small, all of which are obtained at a very low cost.","PeriodicalId":287192,"journal":{"name":"APEC '99. Fourteenth Annual Applied Power Electronics Conference and Exposition. 1999 Conference Proceedings (Cat. No.99CH36285)","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-03-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124657022","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1999-03-14DOI: 10.1109/APEC.1999.749732
Rae-Young Kim, Yo-han Lee, D. Hyun
Multi-level inverters have been attracting increasing attention in recent years and have been selected in several high voltage and high power applications. Especially, for high power variable speed applications, the diode clamped configuration multi-level inverter has been widely used. However, the diode clamped configuration inverter has the inherent problem that the potential of the link capacitor fluctuates. This paper describes a carrier-based SVM (space vector modulation) method to effectively suppress the DC link potential fluctuation for the diode clamped four-level inverter. The current to flow from/into each link capacitor is analyzed and the operation limit is obtained when a conventional carrier-based SVM method is used. To overcome the operation limit, a modified carrier-based SVM method is proposed. Various simulation results by means of Matlab/Simulink are presented to verify the proposed carrier-based SVM method.
{"title":"A new link potential control scheme for four-level inverter with passive rectifier","authors":"Rae-Young Kim, Yo-han Lee, D. Hyun","doi":"10.1109/APEC.1999.749732","DOIUrl":"https://doi.org/10.1109/APEC.1999.749732","url":null,"abstract":"Multi-level inverters have been attracting increasing attention in recent years and have been selected in several high voltage and high power applications. Especially, for high power variable speed applications, the diode clamped configuration multi-level inverter has been widely used. However, the diode clamped configuration inverter has the inherent problem that the potential of the link capacitor fluctuates. This paper describes a carrier-based SVM (space vector modulation) method to effectively suppress the DC link potential fluctuation for the diode clamped four-level inverter. The current to flow from/into each link capacitor is analyzed and the operation limit is obtained when a conventional carrier-based SVM method is used. To overcome the operation limit, a modified carrier-based SVM method is proposed. Various simulation results by means of Matlab/Simulink are presented to verify the proposed carrier-based SVM method.","PeriodicalId":287192,"journal":{"name":"APEC '99. Fourteenth Annual Applied Power Electronics Conference and Exposition. 1999 Conference Proceedings (Cat. No.99CH36285)","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-03-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125317225","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1999-03-14DOI: 10.1109/APEC.1999.750468
Seung-Hee Ryu, Dong-Yun Lee, S. Yoo, D. Hyun
This paper presents new zero-voltage/zero-current-switching (ZVZCS) PWM DC-DC converters. The proposed soft-switching technique achieves ZVS and ZCS simultaneously at both turn-on and turn-off of the main switch and diode by using only one auxiliary switch. Also, this technique is suitable for not only minority but also majority carrier semiconductor devices. The auxiliary circuit of the proposed topologies is placed out the main power path, therefore, there are no voltage/current stresses on the main switch and diode. The operating principle of the proposed topologies is illustrated by a detailed study with a boost converter as an example. Theoretical analysis, simulation and experimental results are presented to explain the proposed schemes.
{"title":"Novel ZVZCS PWM DC-DC converters using one auxiliary switch","authors":"Seung-Hee Ryu, Dong-Yun Lee, S. Yoo, D. Hyun","doi":"10.1109/APEC.1999.750468","DOIUrl":"https://doi.org/10.1109/APEC.1999.750468","url":null,"abstract":"This paper presents new zero-voltage/zero-current-switching (ZVZCS) PWM DC-DC converters. The proposed soft-switching technique achieves ZVS and ZCS simultaneously at both turn-on and turn-off of the main switch and diode by using only one auxiliary switch. Also, this technique is suitable for not only minority but also majority carrier semiconductor devices. The auxiliary circuit of the proposed topologies is placed out the main power path, therefore, there are no voltage/current stresses on the main switch and diode. The operating principle of the proposed topologies is illustrated by a detailed study with a boost converter as an example. Theoretical analysis, simulation and experimental results are presented to explain the proposed schemes.","PeriodicalId":287192,"journal":{"name":"APEC '99. Fourteenth Annual Applied Power Electronics Conference and Exposition. 1999 Conference Proceedings (Cat. No.99CH36285)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-03-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130328040","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1999-03-14DOI: 10.1109/APEC.1999.750504
R. Morrison, M. Egan
This paper presents a power factor-corrected AC/DC power converter derived from the integration of a nonisolated buck-boost AC/DC converter with an isolated dual active bridge DC/DC converter. It has high line voltage surge immunity. A novel modulation strategy has been developed which optimises the ratings required of the power devices.
{"title":"A new rugged integrated AC/DC converter with optimised input current","authors":"R. Morrison, M. Egan","doi":"10.1109/APEC.1999.750504","DOIUrl":"https://doi.org/10.1109/APEC.1999.750504","url":null,"abstract":"This paper presents a power factor-corrected AC/DC power converter derived from the integration of a nonisolated buck-boost AC/DC converter with an isolated dual active bridge DC/DC converter. It has high line voltage surge immunity. A novel modulation strategy has been developed which optimises the ratings required of the power devices.","PeriodicalId":287192,"journal":{"name":"APEC '99. Fourteenth Annual Applied Power Electronics Conference and Exposition. 1999 Conference Proceedings (Cat. No.99CH36285)","volume":"62 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-03-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129212686","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1999-03-14DOI: 10.1109/APEC.1999.749711
A. C. Clothier, B. Mecrow
By far the most common inverter topology used with switched reluctance machines is the asymmetric half bridge (AHB). While many other topologies have been proposed, only this inverter allows full independent control of the unipolar currents desired in each phase. This paper explores the use of inverters based on the three phase bridge topology and demonstrates their suitability for both the short pitched winding and fully pitched winding switched reluctance machine. Both machine and power electronic efficiencies are compared so that the benefits in terms of pure technical performance and cost can be assessed. Current sensing arrangements are also examined and results from a prototype drive demonstrate the effect that the number and position of sensors have on the ability to control the current to the desired value. The impact on the cost of the power electronics is assessed and a comparison is made with the induction motor drive in terms of peak VA, RMS and mean device current.
{"title":"Inverter topologies and current sensing methods for short pitched and fully pitched winding SR motors","authors":"A. C. Clothier, B. Mecrow","doi":"10.1109/APEC.1999.749711","DOIUrl":"https://doi.org/10.1109/APEC.1999.749711","url":null,"abstract":"By far the most common inverter topology used with switched reluctance machines is the asymmetric half bridge (AHB). While many other topologies have been proposed, only this inverter allows full independent control of the unipolar currents desired in each phase. This paper explores the use of inverters based on the three phase bridge topology and demonstrates their suitability for both the short pitched winding and fully pitched winding switched reluctance machine. Both machine and power electronic efficiencies are compared so that the benefits in terms of pure technical performance and cost can be assessed. Current sensing arrangements are also examined and results from a prototype drive demonstrate the effect that the number and position of sensors have on the ability to control the current to the desired value. The impact on the cost of the power electronics is assessed and a comparison is made with the induction motor drive in terms of peak VA, RMS and mean device current.","PeriodicalId":287192,"journal":{"name":"APEC '99. Fourteenth Annual Applied Power Electronics Conference and Exposition. 1999 Conference Proceedings (Cat. No.99CH36285)","volume":"39 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-03-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122996693","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1999-03-14DOI: 10.1109/APEC.1999.749741
Yan Zhu
A new soft switched active snubber circuit is proposed to achieve zero-voltage and zero-current switching for all the switching devices in PWM DC-DC converters. The unique location of the snubber capacitor and inductor ensures low current/voltage stresses and commutation losses. With a saturable reactor, the conduction loss of the auxiliary switch could be further minimized. A boost converter adopting this technique is presented as an example, to illuminate its operation principles and derive the design procedures. Simulation and hardware implementation have been made to validate its performance. Some other basic PWM DC-DC topologies using the proposed snubber have also been given.
{"title":"Soft switched PWM converters with low commutation loss using an active snubber","authors":"Yan Zhu","doi":"10.1109/APEC.1999.749741","DOIUrl":"https://doi.org/10.1109/APEC.1999.749741","url":null,"abstract":"A new soft switched active snubber circuit is proposed to achieve zero-voltage and zero-current switching for all the switching devices in PWM DC-DC converters. The unique location of the snubber capacitor and inductor ensures low current/voltage stresses and commutation losses. With a saturable reactor, the conduction loss of the auxiliary switch could be further minimized. A boost converter adopting this technique is presented as an example, to illuminate its operation principles and derive the design procedures. Simulation and hardware implementation have been made to validate its performance. Some other basic PWM DC-DC topologies using the proposed snubber have also been given.","PeriodicalId":287192,"journal":{"name":"APEC '99. Fourteenth Annual Applied Power Electronics Conference and Exposition. 1999 Conference Proceedings (Cat. No.99CH36285)","volume":"56 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-03-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115657026","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1999-03-14DOI: 10.1109/APEC.1999.750438
R. Rynkiewicz
Effective amp hour (Ah) discharge capacity is an exponential function of discharge rate (current). Discharge and charge reversibly oxidize/reduce the active materials of the electrodes. Charging also produces water electrolysis. Terminal voltage shows hysteresis between charge and discharge. Tests of a previously reported voltage equalizing system showed the battery sensitivity to circuit impedance.
{"title":"Discharge and charge modeling of lead acid batteries","authors":"R. Rynkiewicz","doi":"10.1109/APEC.1999.750438","DOIUrl":"https://doi.org/10.1109/APEC.1999.750438","url":null,"abstract":"Effective amp hour (Ah) discharge capacity is an exponential function of discharge rate (current). Discharge and charge reversibly oxidize/reduce the active materials of the electrodes. Charging also produces water electrolysis. Terminal voltage shows hysteresis between charge and discharge. Tests of a previously reported voltage equalizing system showed the battery sensitivity to circuit impedance.","PeriodicalId":287192,"journal":{"name":"APEC '99. Fourteenth Annual Applied Power Electronics Conference and Exposition. 1999 Conference Proceedings (Cat. No.99CH36285)","volume":"171 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-03-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128624762","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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