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GaAs IC Symposium. IEEE Gallium Arsenide Integrated Circuit Symposium. 20th Annual. Technical Digest 1998 (Cat. No.98CH36260)最新文献

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A 5.8 GHz transmitter MMIC for electronic toll collection system 用于电子收费系统的5.8 GHz发射机MMIC
Zhongmin Wen, T. Katayanagi, Y. Arai, H. Fujishiro, S. Seki
The results on the design and the measurement of a 5.8 GHz GaAs transmitter MMIC for electronic toll collection (ETC) system on-board equipment are presented. The MMIC of single chip and single supply without any external element is assembled into a 16-pin SSOP package. A novel drain-controlling modulation circuit is invented as a modulator to provide linear modulation. The measured adjacent channel power (ACP) is lower than -47 dBc. The on/off ratio of modulation is above 40 dB at 5.8 GHz under a random data modulation of 1.024 Mbps with Manchester coding.
介绍了一种用于车载电子收费系统的5.8 GHz GaAs发射机MMIC的设计和测量结果。单芯片和单电源的MMIC不需要任何外部元件,组装成一个16针的SSOP封装。发明了一种新型漏极控制调制电路作为调制器,提供线性调制。实测邻接通道功率(ACP)小于- 47dbc。在曼彻斯特编码下,在1.024 Mbps的随机数据调制下,在5.8 GHz下调制的开/关比大于40 dB。
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引用次数: 6
The effect of MESFET structures on frequency dispersion of drain conductance and its impact on mark density effect of high speed logic ICs MESFET结构对漏极电导频散的影响及其对高速逻辑集成电路标记密度效应的影响
S. Nakajima, M. Yanagisawa, T. Sakurada
This paper describes the effect of MESFET structures on frequency dispersion of drain conductance (g/sub d/). The frequency dispersion of g/sub d/ is found to be affected by gate length, buried p-layer concentration, n/sup +/ sheet resistance, and active layer thickness. Finally, we show that the device with small frequency dispersion of g/sub d/ can suppress the mark density effect of logic ICs.
本文描述了MESFET结构对漏极电导频散(g/sub / d/)的影响。g/sub / d/的频散受栅极长度、埋p层浓度、n/sup +/片电阻和有源层厚度的影响。最后,我们证明了频率色散为g/sub / d/的器件可以抑制逻辑ic的标记密度效应。
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引用次数: 0
HBT small-signal model extraction using a genetic algorithm 基于遗传算法的HBT小信号模型提取
R. Menozzi, M. Borgarino, J. Tasselli, A. Marty
This work shows that physically meaningful wideband, multi-bias small-signal modeling of HBTs can be efficiently and accurately achieved using a genetic algorithm (GA). The physical significance of the equivalent circuit parameters extracted by the GA is checked using a direct extraction technique (DET). For each point we obtained a good agreement between the parameters extracted by the DET and by the GA, which demonstrates the ability of the GA to efficiently extract a physically significant small-signal model.
这项工作表明,使用遗传算法(GA)可以有效和准确地实现物理上有意义的宽带,多偏置小信号建模。利用直接提取技术(DET)对遗传算法提取的等效电路参数的物理意义进行了检验。对于每个点,我们获得了DET和遗传算法提取的参数之间的良好一致性,这表明遗传算法能够有效地提取物理上显著的小信号模型。
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引用次数: 5
Migration from an AlGaAs to an InGaP emitter HBT IC process for improved reliability 从AlGaAs迁移到InGaP发射极HBT IC工艺,以提高可靠性
T. Low, C. Hutchinson, P. Canfield, T. Shirley, R. Yeats, J.S.C. Chang, G. Essilfie, M. Culver, W.C. Whiteley, D. D'Avanzo, N. Pan, J. Elliot, C. Lutz
A reliable high performance InGaP emitter HBT process has been developed for RF and microwave instruments. The InGaP process achieves Ft and Fmax values of 65 GHz and 75 GHz, respectively, with BVeeo=8.4 V and beta=132. The MTTF values of >5/spl times/10/sup 5/ hours at maximum operating conditions (Tj=150/spl deg/C, Jc=0.6 mA/um/sup 2/) are an order of magnitude larger than values measured on both internal and commercially available AlGaAs emitter HBT circuits. The dominant failure mode was beta drift, consistent with other published reports for other InGaP HBTs, but the Ea of 0.68 eV is much smaller than published values, which suggests that an additional high activation energy mechanism was introduced at the high temperatures used in the published reliability tests.
为射频和微波仪器开发了一种可靠的高性能InGaP发射极HBT工艺。InGaP工艺的Ft和Fmax分别达到65 GHz和75 GHz, BVeeo=8.4 V, beta=132。在最大工作条件下(Tj=150/spl°/C, Jc=0.6 mA/um/sup 2/) >5/spl times/10/sup 5/小时的MTTF值比在内部和市售的AlGaAs发射极HBT电路上测量的值大一个数量级。主要失效模式为β漂移,与其他已发表的报告一致,但0.68 eV的Ea远小于已发表的值,这表明在已发表的可靠性测试中使用的高温下引入了额外的高活化能机制。
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引用次数: 54
A low power 52.9 GHz static divider implemented in a manufacturable 180 GHz AlInAs/InGaAs HBT IC technology 在可制造的180 GHz AlInAs/InGaAs HBT IC技术上实现的低功耗52.9 GHz静态分频器
M. Sokolich, D. Docter, Y. Brown, A. Kramer, J. Jensen, W. Stanchina, S. Thomas, C. Fields, D. A. Ahmari, M. Lui, R. Martinez, J. Duvall
We have demonstrated a 52.9 GHz static 1/8 divider in an AlInAs/InGaAs HBT technology. To our knowledge this is the fastest static divider reported in any semiconductor technology. The divider was realized in a high yield optical lithography triple mesa HBT process. At maximum speed, power consumption was 40 mW/flip-flop. A second 1/8 divider, designed for lower power but using the same size transistors, consumed 8.6 mW/flip-flop at 35 GHz. Sensitivity was excellent with the high-speed version operating from DC to 48 GHz with less than 0 dBm input power. Uniformity and reproducibility were also demonstrated; all functional dividers operated above 45 GHz on-wafer and the extrapolated yield of dividers indicates that the process is capable of supporting 500-1000 transistor designs. Circuit performance was relatively insensitive to the details of the device epitaxial structure indicating a highly robust and manufacturable process.
我们在AlInAs/InGaAs HBT技术中展示了52.9 GHz静态1/8分频器。据我们所知,这是任何半导体技术中最快的静态分频器。在高成品率的光学光刻三台面HBT工艺中实现了分频器。在最大速度下,功耗为40兆瓦/触发器。第二个1/8分频器,设计用于更低的功率,但使用相同尺寸的晶体管,在35 GHz时消耗8.6 mW/触发器。高速版本的灵敏度非常出色,工作范围从直流到48 GHz,输入功率小于0 dBm。均匀性和重复性也得到了证明;所有功能分频器都在45 GHz以上的晶圆上工作,外推的分频器良率表明该工艺能够支持500-1000个晶体管设计。电路性能对器件外延结构的细节相对不敏感,表明其具有高度鲁棒性和可制造性。
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引用次数: 35
40-Gbit/s TDM transmission technologies based on high-speed ICs 基于高速ic的40gbit /s TDM传输技术
Y. Miyamoto, M. Yoneyama, T. Otsuji, K. Yonenaga, N. Shimizu
This paper presents the recent progress of 40-Gbit/s time division multiplexing (TDM) transmission technologies based on 0.1-/spl mu/m InP HEMT ICs and new optical devices operating at 40 Gbit/s and beyond. System experiments demonstrate that the 40-Gbit/s TDM system is very attractive for upgrading transmission capacity into the Tbit/s range.
本文介绍了基于0.1-/spl μ m InP HEMT集成电路的40 Gbit/s时分复用(TDM)传输技术的最新进展,以及工作在40 Gbit/s及以上的新型光器件。系统实验表明,40 gbit /s时分复用系统对于将传输容量提升到Tbit/s范围具有很大的吸引力。
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引用次数: 7
A 5.8 GHz, 3.0 V single-supply power MMIC for electronic toll collection system 用于电子收费系统的5.8 GHz, 3.0 V单电源MMIC
T. Kunihisa, S. Yamamoto, M. Nishijima, T. Yokoyama, M. Nishitsuji, K. Nishii, O. Ishikawa
A power MMIC operating with a single-supply (3.0 V) has been developed for 5.8 GHz Japanese electronic toll collection system (ETC). The present MMIC was provided with two FETs, matching circuits (input, intermediate and output matching circuits), and two drain bias circuits. High dielectric constant material SrTiO/sub 3/ (STO) is used for by-pass and coupling capacitors. Very small die size of 0.77 mm/sup 2/ has been realized by using the STO capacitors. High 1 dB output power compression point (P/sub 1dB/) of 13 dBm, high gain of 21.4 dB and low dissipation current of 41.3 mA have been achieved under 3.0 V single-supply condition.
为5.8 GHz日本电子收费系统(ETC)开发了一种单电源(3.0 V)电源MMIC。目前的MMIC具有两个场效应管、匹配电路(输入、中间和输出匹配电路)和两个漏极偏置电路。高介电常数材料SrTiO/sub 3/ (STO)用于旁通和耦合电容器。通过使用STO电容器,实现了0.77 mm/sup /的非常小的模具尺寸。在3.0 V单电源条件下,实现了13 dBm的高1dB输出功率压缩点(P/sub 1dB/)、21.4 dB的高增益和41.3 mA的低损耗电流。
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引用次数: 5
Roadmapping RFIC test 路图RFIC测试
E. Strid
The Semiconductor Industry Association (SIA), The Institute for Interconnecting and Packaging Electronic Circuits (IPC), and the National Electronics Manufacturing Initiative (NEMI) have expanded US industry-wide consensus efforts to chart out the futures of everything from semiconductor lithography to factory automation technologies, including the first draft of a roadmap for RF components in the 1996 NEMI work. This paper reviews recent RF industry practice in the areas of RFIC on-wafer and package testing, and predicts future trends in RFIC production testing. The testing and packaging issues for GaAs IC's are substantially the same as for Si IC's operating in the same frequency range and function. So while it is unlikely that there will be any inherent differential packaging or test advantages of GaAs over Si, it is similarly imperative to stay on or ahead of the industry roadmap to be competitive with the latest packaging and test technologies.
半导体工业协会(SIA),互连和封装电子电路研究所(IPC)和国家电子制造倡议(NEMI)已经扩大了美国全行业的共识努力,以描绘从半导体光刻到工厂自动化技术的一切未来,包括1996年NEMI工作中射频组件路线图的第一稿。本文回顾了射频工业在RFIC晶圆和封装测试领域的最新实践,并预测了RFIC生产测试的未来趋势。GaAs集成电路的测试和封装问题与Si集成电路在相同频率范围和功能下的测试和封装问题基本相同。因此,虽然GaAs与Si相比不太可能存在任何内在的差异封装或测试优势,但同样有必要保持或领先于行业路线图,以与最新的封装和测试技术竞争。
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引用次数: 5
A 6.45 GHz active bandpass filter using HBT negative resistance elements 采用HBT负阻元件的6.45 GHz有源带通滤波器
K. Kobayashi, L. Tran, D. Umemoto, A. Oki, D. Streit
This paper reports on a 4th order HBT active bandpass filter based on a conservative 2-/spl mu/m GaAs HBT technology which possesses f/sub T/'s and f/sub max/'s of 24 GHz and 50 GHz, respectively. The MMIC operates at a center frequency of 6.45 GHz with a +0.25 dB insertion gain and a 1100 MHz -3 dB bandwidth. A lower-out-of-band rejection of -45 to SO dB is also obtained. The measured NF and input IP3 are 15.1 dB and -7.9 dBm, respectively. The corresponding P/sub 1db/ is -5 dBm. The compact 4th order bandpass filter MMIC is only 1.6/spl times/1.2 mm/sup 2/ and consumes 208 mW of dc power. This work represents the first fully RF (NF, IP3, P/sub 1dB/) characterized HBT MMIC active filter results so far reported. We believe that the HBT active filter MMIC design demonstrates compact size and feasible RF performance suitable for monolithically integrated DDFS, ADC anti-alias, and harmonic filter applications.
本文报道了一种基于2-/spl mu/m GaAs HBT保守技术的四阶HBT有源带通滤波器,该滤波器的f/sub T/ s和f/sub max/ s分别为24 GHz和50 GHz。MMIC工作在6.45 GHz的中心频率,插入增益为+0.25 dB,带宽为1100 MHz -3 dB。还获得了-45到SO dB的较低带外抑制。实测的NF和输入IP3分别为15.1 dB和-7.9 dBm。对应的P/sub 1db/为- 5dbm。紧凑的四阶带通滤波器MMIC仅为1.6/spl倍/1.2 mm/sup 2/,消耗208 mW直流功率。这项工作代表了迄今为止报道的第一个完全RF (NF, IP3, P/sub 1dB/)表征的HBT MMIC有源滤波器结果。我们相信HBT有源滤波器MMIC设计具有紧凑的尺寸和可行的射频性能,适合单片集成DDFS, ADC抗混叠和谐波滤波器应用。
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引用次数: 0
Manufacturing large diameter GaAs substrates for epitaxial devices by VB method 用VB法制造外延器件用大直径砷化镓衬底
R. Nakai, Y. Hagi, S. Kawarabayashi, N. Toyoda, M. Kiyama, S. Sawada, N. Kuwata, S. Nakajima
The vertical boat (VB) method has advantages in the growth of substrates for epitaxial devices. Low residual strain and low dislocation four inch GaAs crystals are manufactured with good reproducibility. Low residual strain reduces slip line occurrence and low dislocation density enables growth of low defects in epitaxial layers. FETs fabricated on carbon doped high resistivity VB substrates show high breakdown voltage. Vth was stable at higher drain voltages. Six inch GaAs crystals are also grown by VB and show adequate characteristics.
垂直船(VB)法在外延器件衬底生长方面具有优势。制备了低残余应变和低位错的四英寸砷化镓晶体,具有良好的再现性。低的残余应变减少了滑移线的发生,低的位错密度使外延层中的低缺陷生长。在掺杂碳的高电阻率VB衬底上制备的fet具有高击穿电压。Vth在较高的漏极电压下稳定。用VB也生长出了6英寸的砷化镓晶体,并显示出足够的特性。
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引用次数: 1
期刊
GaAs IC Symposium. IEEE Gallium Arsenide Integrated Circuit Symposium. 20th Annual. Technical Digest 1998 (Cat. No.98CH36260)
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