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NAECON 2014 - IEEE National Aerospace and Electronics Conference最新文献

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Small size planar widebandwidth antennas 小尺寸平面宽带天线
Pub Date : 2014-06-24 DOI: 10.1109/NAECON.2014.7045816
A. Ferendeci
A new geometrical configuration of a widebandwidth thin slotted antenna with a ground plane is introduced that can be conformally placed on any arbitrary surface. Special geometries are chosen to reduce the corresponding surface area of the antenna for low frequency applications. The parameters associated with antenna, its response as a function of frequency and its possible application areas are presented.
介绍了一种新的带接地面的宽带薄槽天线几何结构,该天线可以保形放置在任意表面上。选择特殊的几何形状来减少低频应用中天线的相应表面积。介绍了天线的相关参数、天线响应随频率的变化规律及其可能的应用领域。
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引用次数: 0
Phase-change material for reconfigurability in THz band 太赫兹波段可重构的相变材料
Pub Date : 2014-06-24 DOI: 10.1109/NAECON.2014.7045827
V. Sanphuang, N. Ghalichechian, N. Nahar, J. Volakis
We propose phase-change materials (PCMs) to demonstrate the reconfigurablility of THz filter. Here vanadium dioxide (VO2) is studied since it shows insulator-to-metal transition properties at temperature of 70 °C. A broadband ON/OFF filter using frequency selective surfaces (FSS) integrated with VO2 is designed to improve selectivity of THz sensing devices. Simulation and measurement results show an excellent agreement in frequency range of 0.1 - 1 THz. Transmission is centered around 0.55 THz below 70 °C and is cut off when the filter is heated above 70 °C. Therefore, ON/OFF switching in filters is achieved by employing VO2.
我们提出相变材料(PCMs)来证明太赫兹滤波器的可重构性。本文研究了二氧化钒(VO2),因为它在70°C的温度下表现出绝缘体到金属的转变特性。为了提高太赫兹传感器件的选择性,设计了一种使用频率选择表面(FSS)与VO2集成的宽带开/关滤波器。仿真和测量结果表明,在0.1 ~ 1太赫兹的频率范围内,两者具有很好的一致性。在70°C以下,传输以0.55 THz为中心,在70°C以上加热时,传输被切断。因此,滤波器的开/关开关是通过使用VO2来实现的。
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引用次数: 1
Resistivity comparison of graphene oxide and graphene oxide-silver nanocomposite paper 氧化石墨烯与氧化石墨烯-银纳米复合纸的电阻率比较
Pub Date : 2014-06-24 DOI: 10.1109/NAECON.2014.7045836
C. Devlin, R. Ewing, E. Guliants
Most carbon nanomaterials are touted for their unusual conductive or semiconductive properties. In this paper, we compare the many-layered graphene oxide (GO) and GO-silver nanocomposite “papers” to elucidate their unusual resistive properties. We have observed significant nonlinearities in resistivity, its dependence on temperature, and current-induced effects on the resistivity of these materials.
大多数碳纳米材料因其不寻常的导电或半导体特性而受到吹捧。在本文中,我们比较了多层氧化石墨烯(GO)和氧化石墨烯-银纳米复合“纸”,以阐明它们不同寻常的电阻性能。我们已经观察到电阻率的显著非线性,它对温度的依赖,以及电流对这些材料电阻率的影响。
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引用次数: 1
Sensitivity simulation of compressed sensing based EW receiver using orthogonal matching pursuit algorithm 基于正交匹配追踪算法的压缩感知电子战接收机灵敏度仿真
Pub Date : 2014-06-24 DOI: 10.1109/NAECON.2014.7045784
L. Liou, D. Lin, Ethan Lin, C. Chen
The wideband coverage of the traditional FFT-based electronic warfare (EW) receiver is limited by the sampling frequency of the analog-to-digital converter (ADC). Compressed sensing (CS) based wideband EW digital receiver has been proposed and under development to process wideband sparse signals with reduced sampling rate. In this study, we calculate the sensitivity of a CS based EW receiver. Two modulation schemes of CS are used. One is pseudorandom chip (PRC) and the other is non-uniform sampling (NUS) modulation. The orthogonal matching pursuit (OMP) algorithm is used to process CS data. The insufficient nature of the sparcity of the signal adversely affects the signal detection probability for both PRC and NUS modulation schemes. Methods to remedy this problem in both modulation schemes are proposed. The improvement in the signal detection and thus the sensitivity performance of the CS based receiver are presented.
传统的基于fft的电子战接收机的宽带覆盖受到模数转换器(ADC)采样频率的限制。基于压缩感知(CS)的宽带电子战数字接收机已被提出并正在开发中,以降低采样率来处理宽带稀疏信号。在本研究中,我们计算了基于CS的电子战接收机的灵敏度。采用了两种CS调制方案。一种是伪随机芯片(PRC),另一种是非均匀采样(NUS)调制。采用正交匹配追踪(OMP)算法对CS数据进行处理。信号稀疏性的不足对PRC和NUS调制方案的信号检测概率都有不利影响。提出了在两种调制方案中解决这一问题的方法。介绍了基于CS的接收机在信号检测和灵敏度性能方面的改进。
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引用次数: 0
Early lifetime failure detection in FPGAs using delay faults 基于延迟故障的fpga早期寿命失效检测
Pub Date : 2014-06-24 DOI: 10.1109/NAECON.2014.7045842
K. Vittala, M. Niamat, S. Vemuru
The reduction in the transistor and interconnect dimensions have a severe impact on the reliable performance of the Field Programmable Gate Array (FPGA) circuits. The process variation effects in nanometer scale technologies result in transient errors or permanent failures that cause undesired behavior of the circuit. In this work, we analyze a method for fault identification to mitigate the impact of lifetime failures such as Electro-migration (EM) and Hot Carrier Effect (HCE) in interconnect of the FPGA. This method is based on the signal delays in routing resources that include switch blocks and interconnect wires.
晶体管和互连尺寸的减小严重影响了现场可编程门阵列(FPGA)电路的可靠性能。纳米尺度技术中的工艺变化效应会导致电路的瞬态误差或永久失效,从而导致电路的不良行为。在这项工作中,我们分析了一种故障识别方法,以减轻FPGA互连中电迁移(EM)和热载流子效应(HCE)等寿命失效的影响。这种方法是基于路由资源的信号延迟,包括交换块和互连线。
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引用次数: 2
Surface plasmon enhanced rare earth fluorescence for increased imaging efficiency 表面等离子体增强稀土荧光,提高成像效率
Pub Date : 2014-06-24 DOI: 10.1109/NAECON.2014.7045776
J. Vella, V. Vasilyev, J. Goldsmith, N. Limberopoulos, J. Derov
Ions of rare earth metals are widely known for their versatile ultraviolet, visible, near infrared and middle infrared fluorescence; they can be excited by wavelengths ranging from the ultraviolet to near infrared. The preparation and optimization of infrared fluorescent ceramics will be discussed, as well as their thin film incorporation into plasmonic systems for fluorescent imaging with enhanced efficiency.
稀土金属离子以其多用途的紫外、可见光、近红外和中红外荧光而闻名;它们可以被从紫外线到近红外线的波长激发。讨论了红外荧光陶瓷的制备和优化,以及将其薄膜掺入等离子体系统中以提高荧光成像效率。
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引用次数: 0
Low-power and high speed CPL-CSA adder 低功耗、高速cplc - csa加法器
Pub Date : 2014-06-24 DOI: 10.1109/NAECON.2014.7045834
N. Boppana, S. Ren, Henry Chen
High speed, low power, area efficient adders continue to play a key role in hardware implementations of digital signal processing applications. Adders based on Complimentary Pass Transistor Logic (CPL) are power and area efficient, but are slower compared to Square Root Carry Select (SQRT-CS) based adders. This paper proposes a unique custom adder design in 250-nm CMOS technology, which is based on a combination of CPL and CS logic to obtain a fast and power/area efficient adder design. A 16 bit CPL/CS adder is presented which is faster compared to the standard SQRT-CS adder while significantly reducing the power and area.
高速、低功耗、高效率的加法器在数字信号处理应用的硬件实现中继续发挥着关键作用。基于互补通晶体管逻辑(CPL)的加法器具有功耗和面积效率,但与基于平方根进位选择(SQRT-CS)的加法器相比,速度较慢。本文提出了一种独特的基于250纳米CMOS技术的定制加法器设计,该加法器基于CPL和CS逻辑的结合,以获得快速且功率/面积高效的加法器设计。提出了一种16位CPL/CS加法器,与标准SQRT-CS加法器相比,它的速度更快,同时显著降低了功耗和面积。
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引用次数: 2
Study and simulation of microstructured photonic crystal optical fiber 微结构光子晶体光纤的研究与仿真
Pub Date : 2014-06-24 DOI: 10.1109/NAECON.2014.7045773
Ahmed Al-Muraeb, H. Abdel-Aty-Zohdy
Photonic Crystal Fibers (PCF) have interesting features such as high non-linearity, four-wave mixing, and polarization-maintaining. These features offer new improvements and solutions for optoelectronic elements such as multi-channel filters, PCF lasers, PCF amplifiers, and tunable (multi-wavelength) fiber lasers. This work presents study and simulation using MATLAB® for a microstructured optical fiber based on defected square Photonic Crystal Lattice (PCL) with fixed value of longitudinal component of propagation constant, deploying Plane Wave Expansion (PWE) method. The PCL parameters considered are: structure period a = 1 μm; element radius = 0.2 μm; background material relative permittivity = 2.1316; element relative permittivity = 1; number of plane waves = 3; number of mesh nodes per unit cell = 30 (in each x & y directions); unit cell size of strictly periodic (defectless) structure = 30 × 30 nodes; unit cell size of the defected structure = 5 × unit cell size of strictly periodic structure; defect location is at center. The paper results include modes field distribution, and effects of: permittivity difference change, number of plane waves, and propagation constant. The results and the associated effects are highlighted and discussed.
光子晶体光纤(PCF)具有高非线性、四波混频和保偏等特点。这些特性为光电元件(如多通道滤波器、PCF激光器、PCF放大器和可调谐(多波长)光纤激光器)提供了新的改进和解决方案。本文采用平面波展开(PWE)方法,研究并模拟了一种基于传播常数纵向分量固定值的有缺陷方形光子晶格(PCL)微结构光纤。考虑的PCL参数为:结构周期a = 1 μm;元件半径= 0.2 μm;背景材料相对介电常数= 2.1316;元件相对介电常数= 1;平面波数= 3;每个单元格的网格节点数= 30(每个x & y方向);严格周期(缺陷)结构的单元胞尺寸= 30 × 30个节点;缺陷结构的胞元尺寸= 5 ×严格周期结构的胞元尺寸;缺陷位置在中心。计算结果包括模场分布、介电常数差变化、平面波数和传播常数的影响。结果和相关的影响是突出和讨论。
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引用次数: 1
An image matching method based on the analysis of grey correlation degree and feature points 一种基于灰度关联度和特征点分析的图像匹配方法
Pub Date : 2014-06-24 DOI: 10.1109/NAECON.2014.7045795
Zishuo Ding, Shuo Qian, Yulin Li, Zhaohui Li
Multimedia information processing is a new technology developing rapidly recent years, among which the Image Matching Technology has wide range of applications in various fields, such as face recognition and building recognition, image database retrieval, etc. This paper focus on the accuracy of image matching using SIFT (Scale Invariant Feature Transform) algorithm to extract feature points from images. And then the feature points are used to find out the matching points between two images by calculating the correlation degree based on the Analysis of Grey Correlation Degree. Compared with the original algorithm, in the case that the matching time is almost the same, the algorithm in this paper has higher matching accuracy and robustness, proved by experiments, can adapt to the requirements of image recognition in various conditions and can eliminate the influence of stretching, rotation and illumination change.
多媒体信息处理是近年来迅速发展起来的一门新技术,其中图像匹配技术在人脸识别、建筑物识别、图像数据库检索等各个领域有着广泛的应用。本文主要研究了利用SIFT (Scale Invariant Feature Transform)算法从图像中提取特征点的图像匹配精度问题。然后在灰度关联度分析的基础上,利用特征点计算关联度,找出两幅图像之间的匹配点。与原算法相比,在匹配时间几乎相同的情况下,本文算法具有更高的匹配精度和鲁棒性,实验证明,该算法能够适应各种条件下图像识别的要求,能够消除拉伸、旋转和光照变化的影响。
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引用次数: 4
Optimized FPGA based implementation of particle filter for tracking applications 基于FPGA的粒子滤波跟踪应用的优化实现
Pub Date : 2014-06-24 DOI: 10.1109/NAECON.2014.7045808
Amin Jarrah, M. Jamali, Seyyed Soheil Sadat Hosseini
Particle filter has been proven to be a very effective method for identifying targets in non-linear and non-Gaussian environment. However, particle filter is computationally intensive. So, particle filter has been implemented on FPGA by exploiting parallel and pipelining approaches to reduce the computational burden. Our optimized FPGA implementation improves up to twelve times speed up. Also more speed ups are achieved with increasing number of particles.
粒子滤波已被证明是一种在非线性和非高斯环境下非常有效的目标识别方法。然而,粒子滤波的计算量很大。因此,利用并行和流水线方法在FPGA上实现粒子滤波,以减少计算量。我们优化的FPGA实现将速度提高了12倍。此外,随着粒子数量的增加,速度也会提高。
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引用次数: 11
期刊
NAECON 2014 - IEEE National Aerospace and Electronics Conference
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