Pub Date : 1900-01-01DOI: 10.1109/RFIT.2005.1598914
Gu Jun, Li Yong, S. Bo
This paper presents the design and analysis of an ultra high-speed bipolar comparator based on master-slave architecture. The comparator can be used for very high speed data converters design. Master-slave structure is used to improve metastability behavior and reduce minimum differential input voltage. Implemented in a 0.35-/spl mu/m SiGe BiCMOS process, the comparator consumes approximately 70 mW with sampling speed of 16 GHz and resolvable minimum input voltage of 8 mV peak-to-peak.
{"title":"Design and analysis of a high-speed comparator","authors":"Gu Jun, Li Yong, S. Bo","doi":"10.1109/RFIT.2005.1598914","DOIUrl":"https://doi.org/10.1109/RFIT.2005.1598914","url":null,"abstract":"This paper presents the design and analysis of an ultra high-speed bipolar comparator based on master-slave architecture. The comparator can be used for very high speed data converters design. Master-slave structure is used to improve metastability behavior and reduce minimum differential input voltage. Implemented in a 0.35-/spl mu/m SiGe BiCMOS process, the comparator consumes approximately 70 mW with sampling speed of 16 GHz and resolvable minimum input voltage of 8 mV peak-to-peak.","PeriodicalId":337918,"journal":{"name":"2005 IEEE International Wkshp on Radio-Frequency Integration Technology: Integrated Circuits for Wideband Comm & Wireless Sensor Networks","volume":"58 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116978159","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1900-01-01DOI: 10.1109/RFIT.2005.1598886
Sung-Huang Lee, Chi-Yu Lai, H. Chiou
A filter-based, single-sideband mixer is proposed for realization of fast switching local oscillation signal generator for MB-OFDM UWB application. This mixer utilizes switched-filtering tank as the load to provide the required sideband suppression requirement of output signals. The circuit is designed by using standard CMOS process technology. The mixer provides a sideband rejection capability more than 30 dB. The required power consumption is 17.5 mW with buffers and 7.43 mW without buffers at the supply voltage of 1.8 V. The total chip area of core circuits is 0.68/spl times/0.78 mm/sup 2/.
{"title":"A filter-based, SSB mixer for UWB application","authors":"Sung-Huang Lee, Chi-Yu Lai, H. Chiou","doi":"10.1109/RFIT.2005.1598886","DOIUrl":"https://doi.org/10.1109/RFIT.2005.1598886","url":null,"abstract":"A filter-based, single-sideband mixer is proposed for realization of fast switching local oscillation signal generator for MB-OFDM UWB application. This mixer utilizes switched-filtering tank as the load to provide the required sideband suppression requirement of output signals. The circuit is designed by using standard CMOS process technology. The mixer provides a sideband rejection capability more than 30 dB. The required power consumption is 17.5 mW with buffers and 7.43 mW without buffers at the supply voltage of 1.8 V. The total chip area of core circuits is 0.68/spl times/0.78 mm/sup 2/.","PeriodicalId":337918,"journal":{"name":"2005 IEEE International Wkshp on Radio-Frequency Integration Technology: Integrated Circuits for Wideband Comm & Wireless Sensor Networks","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124652104","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1900-01-01DOI: 10.1109/RFIT.2005.1598906
K. Deng, Ming-Da Tsai, Chin-Shen Lin, Kun-You Lin, Huei Wang, S.H. Wang, W. Lien, G.J. Chem
A Ku-band monolithic low-noise amplifier is presented in this paper. This LNA fabricated in commercial 0.18-/spl mu/m CMOS technology is a two-stage common-source design instead of cascode configuration for lower noise performance. This CMOS LNA demonstrates a gain of better than 10 dB and a NF of better than 3.2 dB from 14 to 15 GHz. The measured output P/sub 1dB/ is about 5.2 dBm and input IP3 is 1.6 dBm. The chip size including all testing pads is 0.88 /spl times/ 0.77 mm/sup 2/.
{"title":"A Ku-band CMOS low-noise amplifier","authors":"K. Deng, Ming-Da Tsai, Chin-Shen Lin, Kun-You Lin, Huei Wang, S.H. Wang, W. Lien, G.J. Chem","doi":"10.1109/RFIT.2005.1598906","DOIUrl":"https://doi.org/10.1109/RFIT.2005.1598906","url":null,"abstract":"A Ku-band monolithic low-noise amplifier is presented in this paper. This LNA fabricated in commercial 0.18-/spl mu/m CMOS technology is a two-stage common-source design instead of cascode configuration for lower noise performance. This CMOS LNA demonstrates a gain of better than 10 dB and a NF of better than 3.2 dB from 14 to 15 GHz. The measured output P/sub 1dB/ is about 5.2 dBm and input IP3 is 1.6 dBm. The chip size including all testing pads is 0.88 /spl times/ 0.77 mm/sup 2/.","PeriodicalId":337918,"journal":{"name":"2005 IEEE International Wkshp on Radio-Frequency Integration Technology: Integrated Circuits for Wideband Comm & Wireless Sensor Networks","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134062144","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1900-01-01DOI: 10.1109/RFIT.2005.1598869
K. Mori, K. Murakami, C. Kageyama, K. Nakajima, E. Taniguchi, Y. Sekine, K. Tsutsumi, N. Suematsu
A 0.8-5.2 GHz broad-band quadrature mixer for SDR (software designed radio) direct conversion receivers has been developed using 0.35 /spl mu/m SiGe BiCMOS process. The quadrature mixer employs a high speed static frequency divider for a 90 deg LO power divider and broad-band SiGe HBT unit mixers. High speed operation of the static frequency divider is realized by adding 2-stage emitter follower to its output section. The fabricated quadrature mixer achieves an EVM of 3.1%rms for W-CDMA signals at 0.8 GHz and an EVM of 2.1%rms for W-LAN (IEEE 802.11a) signals at 5.2 GHz, respectively. It also has constant conversion gain over the wide base-band frequency range up to 500 MHz at RF frequency of 0.8 GHz.
{"title":"0.8-5.2 GHz band SiGe MMIC quadrature mixer for SDR direct conversion receivers","authors":"K. Mori, K. Murakami, C. Kageyama, K. Nakajima, E. Taniguchi, Y. Sekine, K. Tsutsumi, N. Suematsu","doi":"10.1109/RFIT.2005.1598869","DOIUrl":"https://doi.org/10.1109/RFIT.2005.1598869","url":null,"abstract":"A 0.8-5.2 GHz broad-band quadrature mixer for SDR (software designed radio) direct conversion receivers has been developed using 0.35 /spl mu/m SiGe BiCMOS process. The quadrature mixer employs a high speed static frequency divider for a 90 deg LO power divider and broad-band SiGe HBT unit mixers. High speed operation of the static frequency divider is realized by adding 2-stage emitter follower to its output section. The fabricated quadrature mixer achieves an EVM of 3.1%rms for W-CDMA signals at 0.8 GHz and an EVM of 2.1%rms for W-LAN (IEEE 802.11a) signals at 5.2 GHz, respectively. It also has constant conversion gain over the wide base-band frequency range up to 500 MHz at RF frequency of 0.8 GHz.","PeriodicalId":337918,"journal":{"name":"2005 IEEE International Wkshp on Radio-Frequency Integration Technology: Integrated Circuits for Wideband Comm & Wireless Sensor Networks","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129338971","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1900-01-01DOI: 10.1109/RFIT.2005.1598909
S. Huang, Y. Lee
A novel small-size dual-plane electromagnetic band-gap (EBG) microstrip lowpass filter with a U-shaped microstrip line geometry is proposed in this paper. With this unique geometry of the microstrip line and the dual-plane arrangement of EBG structures, the proposed structure achieves a flat and deep stopband up to 10 GHz with high selectivity within a small circuit area. Its ripple level in the passband is well tailored by employing the Chebyshev distribution to taper the dimension of EBG cells in the ground plane. This novel filter design is implemented using standard fabrication process. The measured results are in good agreement with the simulated results displaying an excellent filtering functionality of the proposed lowpass filter. The proposed structure provides a new approach to design a high performance compact microstrip lowpass filter for microwave circuits. It provides additional flexibility to the circuit layout design due to the U-shaped microstrip line geometry.
{"title":"A small-size dual-plane EBG microstrip lowpass filter with a U-shaped microstrip line geometry","authors":"S. Huang, Y. Lee","doi":"10.1109/RFIT.2005.1598909","DOIUrl":"https://doi.org/10.1109/RFIT.2005.1598909","url":null,"abstract":"A novel small-size dual-plane electromagnetic band-gap (EBG) microstrip lowpass filter with a U-shaped microstrip line geometry is proposed in this paper. With this unique geometry of the microstrip line and the dual-plane arrangement of EBG structures, the proposed structure achieves a flat and deep stopband up to 10 GHz with high selectivity within a small circuit area. Its ripple level in the passband is well tailored by employing the Chebyshev distribution to taper the dimension of EBG cells in the ground plane. This novel filter design is implemented using standard fabrication process. The measured results are in good agreement with the simulated results displaying an excellent filtering functionality of the proposed lowpass filter. The proposed structure provides a new approach to design a high performance compact microstrip lowpass filter for microwave circuits. It provides additional flexibility to the circuit layout design due to the U-shaped microstrip line geometry.","PeriodicalId":337918,"journal":{"name":"2005 IEEE International Wkshp on Radio-Frequency Integration Technology: Integrated Circuits for Wideband Comm & Wireless Sensor Networks","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122242326","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1900-01-01DOI: 10.1109/RFIT.2005.1598892
K. Maruhashi, M. Ito, S. Kishimoto, K. Ohata
This paper presents 60-GHz-band module technology for gigabit wireless systems. All millimeter-wave components described here are flip-chip mountable devices, providing highly repeatable interconnects even for such a high-frequency range. For multi-chip modules, multi-layer LTCC substrates with cavity structures are employed, where MMICs, filters and dielectric resonator oscillators are mounted. Once the module fabrication is completed, only DC feeding and baseband I/O should be cared to connect with printed wiring boards. For 60-GHz-band ASK modules, modulation/demodulation with a speed more than 1 Gb/s and an output power of 10 mW are achieved. The modules are implemented in several applications. The uncompressed high-definition video transmission systems are highlighted.
{"title":"60-GHz-band LTCC module technology for wireless gigabit transceiver applications","authors":"K. Maruhashi, M. Ito, S. Kishimoto, K. Ohata","doi":"10.1109/RFIT.2005.1598892","DOIUrl":"https://doi.org/10.1109/RFIT.2005.1598892","url":null,"abstract":"This paper presents 60-GHz-band module technology for gigabit wireless systems. All millimeter-wave components described here are flip-chip mountable devices, providing highly repeatable interconnects even for such a high-frequency range. For multi-chip modules, multi-layer LTCC substrates with cavity structures are employed, where MMICs, filters and dielectric resonator oscillators are mounted. Once the module fabrication is completed, only DC feeding and baseband I/O should be cared to connect with printed wiring boards. For 60-GHz-band ASK modules, modulation/demodulation with a speed more than 1 Gb/s and an output power of 10 mW are achieved. The modules are implemented in several applications. The uncompressed high-definition video transmission systems are highlighted.","PeriodicalId":337918,"journal":{"name":"2005 IEEE International Wkshp on Radio-Frequency Integration Technology: Integrated Circuits for Wideband Comm & Wireless Sensor Networks","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116948076","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1900-01-01DOI: 10.1109/RFIT.2005.1598880
Chien-Cheng Wei, H. Chiu, Wu-Shiung Feng
An ultra-wideband CMOS voltage-controlled oscillator (VCO) with 3-5 GHz tuning range is presented in this paper. The circuit was designed and fabricated by using TSMC 0.18-/spl mu/m CMOS process. The proposed VCO is using the tunable active inductor to replace the passive spiral inductor. The active inductor can vary the inductance between 1.5/spl sim/7 nH with quality-factor > 30 by a feedback tunable resistor. Comparisons of this topology with conventional VCO show that this topology achieves better performance with very wide tuning range and compact chip size. The tuning range is approximately from 3 to 5 GHz for ultra-wideband system applications.
{"title":"An ultra-wideband CMOS VCO with 3-5 GHz tuning range","authors":"Chien-Cheng Wei, H. Chiu, Wu-Shiung Feng","doi":"10.1109/RFIT.2005.1598880","DOIUrl":"https://doi.org/10.1109/RFIT.2005.1598880","url":null,"abstract":"An ultra-wideband CMOS voltage-controlled oscillator (VCO) with 3-5 GHz tuning range is presented in this paper. The circuit was designed and fabricated by using TSMC 0.18-/spl mu/m CMOS process. The proposed VCO is using the tunable active inductor to replace the passive spiral inductor. The active inductor can vary the inductance between 1.5/spl sim/7 nH with quality-factor > 30 by a feedback tunable resistor. Comparisons of this topology with conventional VCO show that this topology achieves better performance with very wide tuning range and compact chip size. The tuning range is approximately from 3 to 5 GHz for ultra-wideband system applications.","PeriodicalId":337918,"journal":{"name":"2005 IEEE International Wkshp on Radio-Frequency Integration Technology: Integrated Circuits for Wideband Comm & Wireless Sensor Networks","volume":"58 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129659125","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1900-01-01DOI: 10.1109/RFIT.2005.1598895
A. Lu, K. M. Chua, L.H. Guo
Insatiable demand for miniaturization and environmental friendly materials in next-generation electronic based products is driving the need for advanced low-cost and scalable manufacturing processes. To meet customers' needs today, ranging from communications to healthcare markets, tight integration of multiple functionalities is required. The conventional approach to multi-functional integration involves assembly and packaging of discrete components, active devices, etc. A holistic approach towards multi-functional integration to improve system cost-effectiveness, particularly for the next-generation RF microsystems and subsystems, is described, along with the unique manufacturing technologies.
{"title":"Emerging manufacturing technologies for RFIC, antenna and RF-MEMS integration","authors":"A. Lu, K. M. Chua, L.H. Guo","doi":"10.1109/RFIT.2005.1598895","DOIUrl":"https://doi.org/10.1109/RFIT.2005.1598895","url":null,"abstract":"Insatiable demand for miniaturization and environmental friendly materials in next-generation electronic based products is driving the need for advanced low-cost and scalable manufacturing processes. To meet customers' needs today, ranging from communications to healthcare markets, tight integration of multiple functionalities is required. The conventional approach to multi-functional integration involves assembly and packaging of discrete components, active devices, etc. A holistic approach towards multi-functional integration to improve system cost-effectiveness, particularly for the next-generation RF microsystems and subsystems, is described, along with the unique manufacturing technologies.","PeriodicalId":337918,"journal":{"name":"2005 IEEE International Wkshp on Radio-Frequency Integration Technology: Integrated Circuits for Wideband Comm & Wireless Sensor Networks","volume":"862 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116306802","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1900-01-01DOI: 10.1109/RFIT.2005.1598873
Tun-Shih Chen
This paper describes the detail design considerations and verification of a 10 Gb/s half-rate clock and data recovery circuit (CDR). This CDR circuit utilizes half-rate bang-bang architecture with additional frequency acquisition loop to ensure proper operation and avoid false locking. Direct bang-bang frequency tuning is applied to eliminate the latency of the charge pump and allow flexible control of the small bang-bang frequency tuning step. The CDR circuit was fabricated in TSMC 0.13 /spl mu/m RF/MS CMOS technology. Experimental results show 1.4 ps rms jitter and 7 ps peak-to-peak jitter generation by 2/sup 31/-1 PRBS at a rate of 10 Gb/s. Jitter transfer bandwidth is about 8 MHz and jitter tolerance has large margin above OC-192 mask. The circuit excluding the output buffers dissipates 86 mW power at 1.5 V power supply. The die size including the pads is 1.3/spl times/1.5 mm/sup 2/.
{"title":"A 10 Gb/s CMOS half-rate clock and data recovery circuit with direct bang-bang tuning","authors":"Tun-Shih Chen","doi":"10.1109/RFIT.2005.1598873","DOIUrl":"https://doi.org/10.1109/RFIT.2005.1598873","url":null,"abstract":"This paper describes the detail design considerations and verification of a 10 Gb/s half-rate clock and data recovery circuit (CDR). This CDR circuit utilizes half-rate bang-bang architecture with additional frequency acquisition loop to ensure proper operation and avoid false locking. Direct bang-bang frequency tuning is applied to eliminate the latency of the charge pump and allow flexible control of the small bang-bang frequency tuning step. The CDR circuit was fabricated in TSMC 0.13 /spl mu/m RF/MS CMOS technology. Experimental results show 1.4 ps rms jitter and 7 ps peak-to-peak jitter generation by 2/sup 31/-1 PRBS at a rate of 10 Gb/s. Jitter transfer bandwidth is about 8 MHz and jitter tolerance has large margin above OC-192 mask. The circuit excluding the output buffers dissipates 86 mW power at 1.5 V power supply. The die size including the pads is 1.3/spl times/1.5 mm/sup 2/.","PeriodicalId":337918,"journal":{"name":"2005 IEEE International Wkshp on Radio-Frequency Integration Technology: Integrated Circuits for Wideband Comm & Wireless Sensor Networks","volume":"40 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116017464","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1900-01-01DOI: 10.1109/RFIT.2005.1598881
C. Viallon, T. Parra
This paper deals with the design of high performance microwave and millimeter wave balanced circuits. It focuses on the design methodology and the description of some original techniques which improve the balance of microwave differential amplifiers. Based on these structures, an original broadband active balun is proposed and applied as RF and LO power splitters of a K band double balanced down-converter. This converter moreover involves a simplified Gilbert mixing cell, and 3D interconnections have been developed to prevent any balance damage at the couplers/mixer interfaces. The overall function, which converts a 20 GHz RF single-ended signal into a 1 GHz IF one, has been implemented on a compact single chip using a 0.25 /spl mu/m SiGe BiCMOS process. Measurements show an 18 dB conversion gain, a 12 dB double side band noise figure and a -1 dBm OP1dB. Moreover, as a consequence of its highly balanced configuration, this circuit features outstanding port-to-port isolations as well as a spurious-free IF output spectrum.
{"title":"Microwave differential structures optimization: application to a double balanced SiGe active down-converter design","authors":"C. Viallon, T. Parra","doi":"10.1109/RFIT.2005.1598881","DOIUrl":"https://doi.org/10.1109/RFIT.2005.1598881","url":null,"abstract":"This paper deals with the design of high performance microwave and millimeter wave balanced circuits. It focuses on the design methodology and the description of some original techniques which improve the balance of microwave differential amplifiers. Based on these structures, an original broadband active balun is proposed and applied as RF and LO power splitters of a K band double balanced down-converter. This converter moreover involves a simplified Gilbert mixing cell, and 3D interconnections have been developed to prevent any balance damage at the couplers/mixer interfaces. The overall function, which converts a 20 GHz RF single-ended signal into a 1 GHz IF one, has been implemented on a compact single chip using a 0.25 /spl mu/m SiGe BiCMOS process. Measurements show an 18 dB conversion gain, a 12 dB double side band noise figure and a -1 dBm OP1dB. Moreover, as a consequence of its highly balanced configuration, this circuit features outstanding port-to-port isolations as well as a spurious-free IF output spectrum.","PeriodicalId":337918,"journal":{"name":"2005 IEEE International Wkshp on Radio-Frequency Integration Technology: Integrated Circuits for Wideband Comm & Wireless Sensor Networks","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126091334","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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