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2016 International Conference on Microelectronic Test Structures (ICMTS)最新文献

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Interface trap density estimation in FinFETs from the subthreshold current 基于亚阈值电流的finfet界面陷阱密度估计
Pub Date : 2016-03-28 DOI: 10.1109/ICMTS.2016.7476199
J. Schmitz, B. Kaleli, P. Kuipers, N. van den Berg, S. Smits, R. Hueting
In this work we present a measurement approach to determine the interface trap density in FinFETs as a function of their energy. It is based on the precise determination of the gate voltage dependent ideality factor of the subthreshold current in this device. The required measurement accuracy for temperature, drain current and transconductance is derived, and we propose an implementation for wafer-level device measurement on contemporary test set-ups. Exemplary interface trap distributions are shown as obtained from two FinFET device technologies, featuring the commonly observed bathtub shape.
在这项工作中,我们提出了一种测量方法来确定finfet中界面陷阱密度作为其能量的函数。它是基于该器件中与门电压相关的亚阈值电流的理想因数的精确测定。所需的温度测量精度,漏极电流跨导派生,我们提出一个实现wafer-level设备测量在现代测试支架。示例性界面陷阱分布显示为从两种FinFET器件技术中获得的,具有通常观察到的浴缸形状。
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引用次数: 5
Spring-constant measurement methods for RF-MEMS capacitive switches RF-MEMS电容开关的弹簧常数测量方法
Pub Date : 2016-03-28 DOI: 10.1109/ICMTS.2016.7476164
Jiahui Wang, J. Bielen, C. Salm, J. Schmitz
In this article we compare three approaches to measure the spring constant in RF MEMS capacitive switches. We use the lowest vibration mode, as obtained from vibrometry; the pull-in voltage; and the low-field capacitance-voltage curve of the device to extract the spring constant. Experimental results are presented for each approach, and FEM model predictions are used to further verify and interpret the findings. Pros and cons of each method are discussed.
在本文中,我们比较了三种测量射频MEMS电容开关弹簧常数的方法。我们使用从测振仪获得的最低振动模式;拉入电压;并从器件的低场容压曲线中提取弹簧常数。给出了每种方法的实验结果,并使用有限元模型预测进一步验证和解释结果。讨论了每种方法的优缺点。
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引用次数: 0
Extraction of floating-gate capacitive parameters in split-gate flash memory cells 分栅闪存单元中浮栅电容参数的提取
Pub Date : 2016-03-28 DOI: 10.1109/ICMTS.2016.7476186
Y. Tkachev
A new fast and simple method for extraction of capacitive coupling coefficients in a split-gate flash memory cell is described. The method is based on the modulation of cell's erase characteristics by the bias applied to the gates during read and erase operations. The absolute values of the capacitance between the floating gate and other nodes are also extracted using the effect of modulation of cell conductance caused by the transfer of individual electrons to/from the floating gate.
提出了一种新的快速简便的分栅闪存单元电容耦合系数提取方法。该方法是基于在读取和擦除操作期间施加在门上的偏置对单元擦除特性的调制。利用单个电子从浮栅转移到/从浮栅转移引起的电池电导调制效应,还可以提取浮栅和其他节点之间电容的绝对值。
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引用次数: 5
Top-gated MoS2 capacitors and transistors with high-k dielectrics for interface study 用于界面研究的高k介电体的顶门控MoS2电容器和晶体管
Pub Date : 2016-03-28 DOI: 10.1109/ICMTS.2016.7476201
P. Zhao, A. Azcatl, Pavel Bolshakov-Barrett, R. Wallace, C. Young, P. Hurley
Top-gated MOS capacitors on bulk MoS2 and transistors of few-layer MoS2 were designed and fabricated. They can be potentially utilized on various TMD and high-k materials for fast and robust electrical characterization. The 3-terminal transistor test structure shows advantages of significant reduction of parasitic effects. C-V and I-V measurements were successfully conducted to characterize few-layer MoS2 transistors with sub-10 nm HfO2 dielectric.
设计并制作了基于大块二硫化钼的顶门控MOS电容器和基于少层二硫化钼的晶体管。它们可以潜在地用于各种TMD和高k材料,以实现快速和稳健的电特性。三端晶体管测试结构具有显著降低寄生效应的优点。C-V和I-V测量成功地表征了具有低于10 nm HfO2介电介质的少层MoS2晶体管。
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引用次数: 4
An efficient method to evaluate 4 million micro-bump interconnection resistances for 3D stacked 16-mpixel image sensor 一种评估3D堆叠1600万像素图像传感器400万个微碰撞互连电阻的有效方法
Pub Date : 2016-03-28 DOI: 10.1109/ICMTS.2016.7476162
Y. Takemoto, H. Kato, Torn Kondo, N. Takazawa, M. Tsukimura, H. Saito, Kenji Kobayashi, J. Aoki, S. Suzuki, Y. Gomi, S. Matsuda, Y. Tadaki
We developed an efficient method for evaluating the 4 million micro-bump interconnection resistances of the 3D stacked 16-Mpixel CMOS image sensor by including vertical scanning and readout circuits and extra circuits in both of two substrates for a resistance testing mode, which enables us not only to find failed bumps but also to evaluate the resistances by scanning all micro bumps. We measured the resistances of the interconnections ranging from 50 to 500 kΩ with a resolution of 50kΩ.
我们开发了一种有效的方法来评估3D堆叠16万像素CMOS图像传感器的400万个微碰撞互连电阻,该方法包括垂直扫描和读出电路以及两个衬底中的额外电路,用于电阻测试模式,不仅可以发现失败的碰撞,还可以通过扫描所有微碰撞来评估电阻。我们测量了互连的电阻范围从50到500 kΩ,分辨率为50kΩ。
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引用次数: 3
Chip level characterisation studies of Ni and NiFe electrochemical deposition using test structures 用测试结构对Ni和NiFe电化学沉积的芯片级表征研究
Pub Date : 2016-03-28 DOI: 10.1109/ICMTS.2016.7476203
J. Murray, Richard Perry, J. Terry, Stewart Smith, Andrew R. Mount, Anthony J. Walton
This paper describes the first use of test structure chips designed to characterise the fundamental properties of Ni and NiFe alloy films deposited using electroplating. This approach is used to perform a chip-level investigation into the effects of electrolyte bath composition on the characteristics of deposited Ni and NiFe layers. The advantage of this methodology is that each electrolyte change does not require the replacement of a 35 litre bath (which is necessary for wafer level investigations), thereby making each experiment far less time consuming, and considerably cheaper to perform.
本文描述了首次使用测试结构芯片来表征电镀沉积的Ni和NiFe合金薄膜的基本性能。该方法用于在芯片水平上研究电解液成分对沉积Ni和NiFe层特性的影响。这种方法的优点是每次更换电解液不需要更换35升的浴槽(这是晶圆级调查所必需的),从而使每次实验花费的时间大大减少,并且执行起来相当便宜。
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引用次数: 1
Microfabricated test structures for thermal gas sensor 热气体传感器微加工测试结构
Pub Date : 2016-03-28 DOI: 10.1109/ICMTS.2016.7476165
M. Denoual, M. Pouliquen, D. Robbes, J. Grand, H. Awala, S. Mintova, O. de Sagazan, S. Inoue, A. Mita-Tixier, Y. Mita
Microfabricated test structures are presented for the proof validation of a new chemical sensor concept. The proposed detection principle is based on time constant shift of a thermal device covered with zeolites when target species are adsorbed.
为验证一种新的化学传感器概念,提出了微加工测试结构。所提出的检测原理是基于沸石覆盖的热装置在吸附目标物质时的时间常数位移。
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引用次数: 3
A high power curve tracer for characterizing full operational range of SiC power transistors 一种高功率曲线示踪器,用于表征SiC功率晶体管的全工作范围
Pub Date : 2016-03-28 DOI: 10.1109/ICMTS.2016.7476181
Yohei Nakamura, Michihiro Shintani, Takashi Sato, T. Hikihara
A curve tracer is proposed for measuring static characteristics of power devices at high voltage and large current range. Using a SiC-MOSFET as a switch for pulse-based measurement, high voltage tolerance and fast switching are simultaneously achieved. The proposed curve tracer facilitates current-voltage measurements for full I-V regions found in practical device operations. The measurement results provided by the proposed method contribute to build device models that can be used to design efficient power converters.
提出了一种用于高电压大电流范围电力器件静态特性测量的曲线示踪器。使用SiC-MOSFET作为脉冲测量的开关,可以同时实现高电压容限和快速开关。所提出的曲线示踪剂有助于在实际设备操作中发现的全I-V区域的电流-电压测量。该方法提供的测量结果有助于建立可用于设计高效功率转换器的器件模型。
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引用次数: 13
Impact of a laser pulse on HfO2-based RRAM cells reliability and integrity 激光脉冲对hfo2基RRAM电池可靠性和完整性的影响
Pub Date : 2016-03-28 DOI: 10.1109/ICMTS.2016.7476196
A. Krakovinsky, M. Bocquet, R. Wacquez, J. Coignus, D. Deleruyelle, C. Djaou, G. Reimbold, J. Portal
Several NVM technologies have emerged during the last 10 years. These technologies offer solutions for the replacement of the Flash technology, which is facing downsizing limits [1]. Moreover these solutions propose lower switching energy and faster operations compared to the state of the art for Flash, and thus, are seen as an opportunity for the rise of the IoT market. But one of the main concerns regarding IoT is the protection of the data. Contrary to Flash, security of the data in emerging NVM is yet to be evaluated. In order to verify capability of the technology in terms of data integrity, we propose to investigate reliability and integrity of HfO2-based Resistive RAM (OxRRAM). This paper details the experimental protocol defined for laser-based attacks, shows that a laser pulse can affect the information stored in a single OxRRAM bit. The occurring phenomenon is then explained by mean of thermal and electrical simulations.
在过去的10年里,出现了几种NVM技术。这些技术为Flash技术的替代提供了解决方案,Flash技术正面临着缩小规模的限制。此外,与最先进的Flash相比,这些解决方案提出了更低的开关能量和更快的操作速度,因此,被视为物联网市场崛起的机会。但物联网的主要问题之一是数据的保护。与Flash相反,新兴NVM中的数据安全性还有待评估。为了验证该技术在数据完整性方面的能力,我们建议研究基于hfo2的电阻式RAM (OxRRAM)的可靠性和完整性。本文详细介绍了基于激光攻击的实验协议,表明激光脉冲可以影响存储在单个OxRRAM位中的信息。然后用热学和电学模拟的方法来解释发生的现象。
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引用次数: 8
Measurement of SRAM power-up state for PUF applications using an addressable SRAM cell array test structure 使用可寻址SRAM单元阵列测试结构测量PUF应用的SRAM上电状态
Pub Date : 2016-03-28 DOI: 10.1109/ICMTS.2016.7476191
K. Takeuchi, T. Mizutani, T. Saraya, M. Kobayashi, T. Hiramoto, H. Shinohara
SRAM data just after power-up were measured using an addressable SRAM cell array test structure. It was found that the results are strongly affected by the address switching noise and “memory effect”. An addressing sequence combined with word line reset pulse application is proposed for reliable power-up data stability evaluation.
上电后的SRAM数据使用可寻址SRAM单元阵列测试结构进行测量。结果发现,地址转换噪声和“记忆效应”对结果有很大影响。提出了一种结合字线复位脉冲应用的寻址序列,用于可靠的上电数据稳定性评估。
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引用次数: 8
期刊
2016 International Conference on Microelectronic Test Structures (ICMTS)
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