Pub Date : 2021-02-13DOI: 10.1109/isscc42613.2021.9365787
{"title":"ISSCC 2022 Call for Papers","authors":"","doi":"10.1109/isscc42613.2021.9365787","DOIUrl":"https://doi.org/10.1109/isscc42613.2021.9365787","url":null,"abstract":"","PeriodicalId":371093,"journal":{"name":"2021 IEEE International Solid- State Circuits Conference (ISSCC)","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-02-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129694511","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-02-13DOI: 10.1109/ISSCC42613.2021.9365857
J. Holloway, G. Dogiamis, R. Han
The rapid surge of data transmission within computation, storage and communication infrastructures is pushing the speed boundary of traditional copper-based electrical links. Recent realizations of l00Gb/s wired links require advanced FinFET technologies, highcost packaging/cables and power-consuming equalization. High-frequency waves over dielectric waveguides have been considered as an alternative solution that exploits the low-loss, broadband medium while maintaining compatibility with existing silicon 1C platforms. However, since its debut in 2011 [1], this scheme, previously using $leq 140mathrm{G}mathrm{H}mathrm{z}$ carriers, has only achieved data rates of up to 36Gb/s[2]. lt is expected that higher carrier frequencies (e.g. >200GHz) and multi-channel aggregation would further increase the data rate while shrinking the interconnect size; but that scheme has been hindered by challenges related to the required high-order multiplexer and ultra-broadband waveguide coupler operating efficiently at sub terahertz (sub-THz) frequencies. in this paper, using a 130nmSiGe BiCMOS technology, we present a multi-channel, multiplexer/coupler-integrated transmitter (Tx) that delivers a data rate of $105mathrm{G}mathrm{b}/mathrm{s}(3times 35mathrm{G}mathrm{b}/mathrm{s})$. To demodulate each channel, a 35Gb/s coupler-integrated receiver (Rx) is also developed. Ourlink, including the chipset and a 0. 4mm-wide, 30cm-long dielectric ribbon, experimentally demonstrates the potential speed, efficiency, size and cost advantages of THz fiber links in high-speed inter-server and backplane fabrics.
{"title":"A 105Gb/s Dielectric-Waveguide Link in 130nm BiCMOS Using Channelized 220-to-335GHz Signal and Integrated Waveguide Coupler","authors":"J. Holloway, G. Dogiamis, R. Han","doi":"10.1109/ISSCC42613.2021.9365857","DOIUrl":"https://doi.org/10.1109/ISSCC42613.2021.9365857","url":null,"abstract":"The rapid surge of data transmission within computation, storage and communication infrastructures is pushing the speed boundary of traditional copper-based electrical links. Recent realizations of l00Gb/s wired links require advanced FinFET technologies, highcost packaging/cables and power-consuming equalization. High-frequency waves over dielectric waveguides have been considered as an alternative solution that exploits the low-loss, broadband medium while maintaining compatibility with existing silicon 1C platforms. However, since its debut in 2011 [1], this scheme, previously using $leq 140mathrm{G}mathrm{H}mathrm{z}$ carriers, has only achieved data rates of up to 36Gb/s[2]. lt is expected that higher carrier frequencies (e.g. >200GHz) and multi-channel aggregation would further increase the data rate while shrinking the interconnect size; but that scheme has been hindered by challenges related to the required high-order multiplexer and ultra-broadband waveguide coupler operating efficiently at sub terahertz (sub-THz) frequencies. in this paper, using a 130nmSiGe BiCMOS technology, we present a multi-channel, multiplexer/coupler-integrated transmitter (Tx) that delivers a data rate of $105mathrm{G}mathrm{b}/mathrm{s}(3times 35mathrm{G}mathrm{b}/mathrm{s})$. To demodulate each channel, a 35Gb/s coupler-integrated receiver (Rx) is also developed. Ourlink, including the chipset and a 0. 4mm-wide, 30cm-long dielectric ribbon, experimentally demonstrates the potential speed, efficiency, size and cost advantages of THz fiber links in high-speed inter-server and backplane fabrics.","PeriodicalId":371093,"journal":{"name":"2021 IEEE International Solid- State Circuits Conference (ISSCC)","volume":"122 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-02-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124514785","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-02-13DOI: 10.1109/ISSCC42613.2021.9365841
Erwin Allebes, Gaurav Singh, Yuming He, E. Tiurin, Paul Mateman, M. Ding, J. Dijkhuis, Gert-Jan van Schaik, E. Bechthum, J. V. D. Heuvel, Mohieddine El Soussi, Arjan Breeschoten, Hannu Korpela, Yao-Hong Liu, Christian Bachmann
The recent popularity of indoor-localization applications such as secure access and asset tracking has led to growing interest in accurate RF-based ranging solutions. Impulse-radio ultra-wideband (IR-UWB) is a promising solution for accurate ranging due to its wideband 0peration. The recently released IEEE 802. 15.4z standard [1] improves upon the security of ranging and mandates a coherent operation with higher mean pulse-repetition frequencies (mPRF), in comparison to the legacy standard IEEE 802. 15.4a. The next generation IR-UWB devices demand ultra-low-power operation while meeting the strict spectrum regulations to operate worldwide in C and X bands (4 to 10GHz). The prior-art coherent IR-UWB transmitters either consume very high power [2] or result in high spurious emissions in adjacent channels due to poor sidelobe suppression [3 –6]. In this work, an asynchronous polar transmitter is proposed that consumes 4.9mW active power with an output power spectral density (PSD) of -41.3dBm/MHz and a sidelobe suppression of over 28dBrin IEEE 802. 15.4zl24.8MHzmPRF mode, channel 9 (7987.2MHz). Further, we demonstrate the use of an injection-locked ring oscillator (IL-R0) with fine-grained duty-cycling of the TX chain to achieve state-of-the-art power consumption for mPRFs from 3.9MHz to 124. 8MHz while maintaining coherent operation over the packet.
{"title":"21.2 A 3-to-10GHz 180pJ/b IEEE802.15.4z/4a IR-UWB Coherent Polar Transmitter in 28nm CMOS with Asynchronous Amplitude Pulse-Shaping and Injection-Locked Phase Modulation","authors":"Erwin Allebes, Gaurav Singh, Yuming He, E. Tiurin, Paul Mateman, M. Ding, J. Dijkhuis, Gert-Jan van Schaik, E. Bechthum, J. V. D. Heuvel, Mohieddine El Soussi, Arjan Breeschoten, Hannu Korpela, Yao-Hong Liu, Christian Bachmann","doi":"10.1109/ISSCC42613.2021.9365841","DOIUrl":"https://doi.org/10.1109/ISSCC42613.2021.9365841","url":null,"abstract":"The recent popularity of indoor-localization applications such as secure access and asset tracking has led to growing interest in accurate RF-based ranging solutions. Impulse-radio ultra-wideband (IR-UWB) is a promising solution for accurate ranging due to its wideband 0peration. The recently released IEEE 802. 15.4z standard [1] improves upon the security of ranging and mandates a coherent operation with higher mean pulse-repetition frequencies (mPRF), in comparison to the legacy standard IEEE 802. 15.4a. The next generation IR-UWB devices demand ultra-low-power operation while meeting the strict spectrum regulations to operate worldwide in C and X bands (4 to 10GHz). The prior-art coherent IR-UWB transmitters either consume very high power [2] or result in high spurious emissions in adjacent channels due to poor sidelobe suppression [3 –6]. In this work, an asynchronous polar transmitter is proposed that consumes 4.9mW active power with an output power spectral density (PSD) of -41.3dBm/MHz and a sidelobe suppression of over 28dBrin IEEE 802. 15.4zl24.8MHzmPRF mode, channel 9 (7987.2MHz). Further, we demonstrate the use of an injection-locked ring oscillator (IL-R0) with fine-grained duty-cycling of the TX chain to achieve state-of-the-art power consumption for mPRFs from 3.9MHz to 124. 8MHz while maintaining coherent operation over the packet.","PeriodicalId":371093,"journal":{"name":"2021 IEEE International Solid- State Circuits Conference (ISSCC)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-02-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130596314","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-02-13DOI: 10.1109/ISSCC42613.2021.9365835
S. Trotta, D. Weber, Reinhard Jungmaier, Ashutosh Baheti, J. Lien, Dennis Noppeney, M. Tabesh, Christoph Rumpler, Michael Aichner, Siegfried Albel, Jagjit S. Bal, I. Poupyrev
With the introduction of the Internet of Things (IoT), there is an increasing focus on human-to-machine interaction. Nowadays, sensors make system and robots to see, hear, feel, and intuitively “understand” their surroundings. 60GHz radar [1] provides a very attractive solution for the sensing of human motion, enabling specific use cases such as: smart presence, hand gesture, and vital signs monitoring. Those can enhance the user experience in wearables, mobile devices, TVs, smart homes, automotive infotainment systems and AR-VR applications. The high bandwidth allocated in the 60GHz band (from 57 to 64GHz) enables very high range resolution sensing ($approx$ 2cm), which, when complemented with micro-Doppler and time domain analysis [2], offers a powerful tool for discriminating complex hand movements with millimeter accuracy. The solution presented in this paper represents the a tiny radar system integrated into a smartphone, the Google Pixel 4. The simplified signal flow pipeline, from the radar sensor up to the signal transformation and classification, is presented in Fig. 2.3.1 [3]. The radar sensor is designed primarily taking into account all the integration boundaries, which includes in primis power consumption and package size (including antenna). Specifically, the power consumption requirement translates to a very stringent requirement for the maximum number of chirps the sensor could run per frame, impacting the process gain, and so the maximum detection range.
{"title":"SOLI: A Tiny Device for a New Human Machine Interface","authors":"S. Trotta, D. Weber, Reinhard Jungmaier, Ashutosh Baheti, J. Lien, Dennis Noppeney, M. Tabesh, Christoph Rumpler, Michael Aichner, Siegfried Albel, Jagjit S. Bal, I. Poupyrev","doi":"10.1109/ISSCC42613.2021.9365835","DOIUrl":"https://doi.org/10.1109/ISSCC42613.2021.9365835","url":null,"abstract":"With the introduction of the Internet of Things (IoT), there is an increasing focus on human-to-machine interaction. Nowadays, sensors make system and robots to see, hear, feel, and intuitively “understand” their surroundings. 60GHz radar [1] provides a very attractive solution for the sensing of human motion, enabling specific use cases such as: smart presence, hand gesture, and vital signs monitoring. Those can enhance the user experience in wearables, mobile devices, TVs, smart homes, automotive infotainment systems and AR-VR applications. The high bandwidth allocated in the 60GHz band (from 57 to 64GHz) enables very high range resolution sensing ($approx$ 2cm), which, when complemented with micro-Doppler and time domain analysis [2], offers a powerful tool for discriminating complex hand movements with millimeter accuracy. The solution presented in this paper represents the a tiny radar system integrated into a smartphone, the Google Pixel 4. The simplified signal flow pipeline, from the radar sensor up to the signal transformation and classification, is presented in Fig. 2.3.1 [3]. The radar sensor is designed primarily taking into account all the integration boundaries, which includes in primis power consumption and package size (including antenna). Specifically, the power consumption requirement translates to a very stringent requirement for the maximum number of chirps the sensor could run per frame, impacting the process gain, and so the maximum detection range.","PeriodicalId":371093,"journal":{"name":"2021 IEEE International Solid- State Circuits Conference (ISSCC)","volume":"51 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-02-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121616346","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-02-13DOI: 10.1109/ISSCC42613.2021.9365946
A. C. Oliveira, J. Groenesteijn, R. Wiegerink, K. Makinwa
Precision flow sensors are widely used in the pharmaceutical, food, and semiconductor industries to measure small amounts (<1 gram/hour) of liquids and gases. MEMS thermal flow sensors currently achieve state-of-the-art performance in terms of resolution, size, and power consumption [1, 3]. However, they only measure volumetric flow, and so must be calibrated for use with specific liquids [1] or gases [2, 3]. In contrast, Coriolis flow sensors measure mass flow and thus do not need calibration for specific fluids. Furthermore, their resonance frequency can be used as a measure of fluid density. These features enable significant size, cost, and complexity reductions in low-flow microfluidic systems. Although much progress has been made, miniature [4] and MEMS [5– 7] Coriolis mass flow sensors are still outperformed by their thermal counterparts, especially in terms of resolution and long-term stability.
{"title":"5.7 A MEMS Coriolis Mass Flow Sensor with 300 μ g/h/√Hz Resolution and ± 0.8mg/h Zero Stability","authors":"A. C. Oliveira, J. Groenesteijn, R. Wiegerink, K. Makinwa","doi":"10.1109/ISSCC42613.2021.9365946","DOIUrl":"https://doi.org/10.1109/ISSCC42613.2021.9365946","url":null,"abstract":"Precision flow sensors are widely used in the pharmaceutical, food, and semiconductor industries to measure small amounts (<1 gram/hour) of liquids and gases. MEMS thermal flow sensors currently achieve state-of-the-art performance in terms of resolution, size, and power consumption [1, 3]. However, they only measure volumetric flow, and so must be calibrated for use with specific liquids [1] or gases [2, 3]. In contrast, Coriolis flow sensors measure mass flow and thus do not need calibration for specific fluids. Furthermore, their resonance frequency can be used as a measure of fluid density. These features enable significant size, cost, and complexity reductions in low-flow microfluidic systems. Although much progress has been made, miniature [4] and MEMS [5– 7] Coriolis mass flow sensors are still outperformed by their thermal counterparts, especially in terms of resolution and long-term stability.","PeriodicalId":371093,"journal":{"name":"2021 IEEE International Solid- State Circuits Conference (ISSCC)","volume":"142 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-02-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127936278","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-02-13DOI: 10.1109/ISSCC42613.2021.9365986
Dongsu Kim, Jun-Suk Bang, Jongbeom Baek, Seungchan Park, Young-Ho Jung, Jae-Yeol Han, Ik-Hwan Kim, Sung-Youb Jung, Takahiro Nomiyama, Ji-Seon Paek, Jongwoo Lee, T. Cho
Envelope tracking (ET) is a key technology improving efficiency of RF power amplifiers (PAs) and battery lifetime in mobile handsets. It has been commercialized since 4G LTE era, and is also being employed in 5G NR handsets. A supply modulator (SM) is a circuit generating power supplies of RF PAs for ET and average power tracking (APT) operations. Currently, the maximum channel BW and supported ET BW of 5G NR handset is 100MHz [1]–[4]. In a short time, over 100MHz BW will be necessary to support intra-band contiguous carrier aggregation cases of n77C/n78C/n79C in 3GPP standard [5]. The required instantaneous maximum output power of SM is about 10W which is calculated by the following parameters: 26dBm output power by power class 2 (PC2), 2dB loss of RF front-end module (FEM) due to complex operating band combinations (EN-DC for non-standalone mode, NE-DC, 2CA/3CA), 6dB higher instantaneous power due to peak-to-average power ratio (PAPR) at 1 resource block (RB), 1dB margin, and poor PA efficiency of around 33% (worst example) due to high carrier frequency of 5GHz at n79 band. The poor PA efficiency can be relaxed by high voltage PA design beyond 5V. In [1], a supply modulator with boosted output larger than battery voltage $(V_{BAT})$ is proposed, and the designed PA with 30% higher voltage shows 10% higher efficiency and broader BW owing to low impedance transformation ratio from $50 Omega$ and small parasitic output capacitance of power cell. The challenge is how to design a supply modulator for 5G NR that can achieve both wide ET BW and high output voltage/power capability, while satisfying high efficiency, low receiver-band noise, short transition time, and multi-mode/standard operation.
{"title":"33.9 A Hybrid Switching Supply Modulator Achieving 130MHz Envelope-Tracking Bandwidth and 10W Output Power for 2G/3G/LTE/NR RF Power Amplifiers","authors":"Dongsu Kim, Jun-Suk Bang, Jongbeom Baek, Seungchan Park, Young-Ho Jung, Jae-Yeol Han, Ik-Hwan Kim, Sung-Youb Jung, Takahiro Nomiyama, Ji-Seon Paek, Jongwoo Lee, T. Cho","doi":"10.1109/ISSCC42613.2021.9365986","DOIUrl":"https://doi.org/10.1109/ISSCC42613.2021.9365986","url":null,"abstract":"Envelope tracking (ET) is a key technology improving efficiency of RF power amplifiers (PAs) and battery lifetime in mobile handsets. It has been commercialized since 4G LTE era, and is also being employed in 5G NR handsets. A supply modulator (SM) is a circuit generating power supplies of RF PAs for ET and average power tracking (APT) operations. Currently, the maximum channel BW and supported ET BW of 5G NR handset is 100MHz [1]–[4]. In a short time, over 100MHz BW will be necessary to support intra-band contiguous carrier aggregation cases of n77C/n78C/n79C in 3GPP standard [5]. The required instantaneous maximum output power of SM is about 10W which is calculated by the following parameters: 26dBm output power by power class 2 (PC2), 2dB loss of RF front-end module (FEM) due to complex operating band combinations (EN-DC for non-standalone mode, NE-DC, 2CA/3CA), 6dB higher instantaneous power due to peak-to-average power ratio (PAPR) at 1 resource block (RB), 1dB margin, and poor PA efficiency of around 33% (worst example) due to high carrier frequency of 5GHz at n79 band. The poor PA efficiency can be relaxed by high voltage PA design beyond 5V. In [1], a supply modulator with boosted output larger than battery voltage $(V_{BAT})$ is proposed, and the designed PA with 30% higher voltage shows 10% higher efficiency and broader BW owing to low impedance transformation ratio from $50 Omega$ and small parasitic output capacitance of power cell. The challenge is how to design a supply modulator for 5G NR that can achieve both wide ET BW and high output voltage/power capability, while satisfying high efficiency, low receiver-band noise, short transition time, and multi-mode/standard operation.","PeriodicalId":371093,"journal":{"name":"2021 IEEE International Solid- State Circuits Conference (ISSCC)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-02-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130811047","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-02-13DOI: 10.1109/ISSCC42613.2021.9365979
Robin Garg, Sanket Jain, Paul Dania, Arun Nataraian
Reduction in base-station deployment costs while increasing coverage has motivated Integrated Access and Backhaul (IAB) nodes in mm-wave 5G NR (Fig. 14.3.1). Similarly, high path loss due to shadowing and limited outdoor-to-indoor penetration at mm-wave has led to an interest in repeater/relays to extend 5G NR coverage [1]. Currently, halfduplexlinks based on TDD (preferred for lAB), FDD, spatial, and polarization-duplexare explored, targeting mm-wave TWRX isolation at the cost of channel capacity. While mmwave in-band full-duplex (IBFD) with shared antenna (ANT) interface can enable spectrum reuse in IAB and repeaters/relays, >100dB total self-interference cancellation (SIC) is required with up to 50dB of SIC in the mm-wave front-end [2]. Such SIC has been shown for IBFD at RF [3– 5], however mm-wave IBFD SIC with a shared antenna interface has been limited to 20dBat28GHz and 40dB(22dB at +10dBm TX SI power) at 60GHz [6, 7]. Achieving mm-wave IBFD SIC with a shared ANT interface is particularly challenging given (i) the high frequency of operation, (ii) wide 400MHz/800MHz bandwidths targeted in 5G NR, and (iii) variations in beamformer ANT impedance that changes the SI channel. This paper presents a fully integrated mm-wave circulator RX that addresses these challenges using (i) a hybrid-coupler and non-reciprocal N-path filter-based shared ANT interface that provides wideband SIC while creating an SI replica, enabling (ii) subsequent active cancellation with variable gain/phase shift to accommodate SI channel variations. The circulator RX implementation in 45nm SOI CMOS achieves 52. 8dB cancellation across 400MHz at 26. 4GHz(>100 $times$ improvement over state of the art at high power levels) with 3.1dB TX-to-ANT insertion loss (IL) and +11.5dBm TX power-handling. System-level feasibility for mm-wave wideband IBFD is shown with the integrated RX supporting 600MS/s128-OAM wireless reception (4.2Gb/s) with 3.3% RX EVM in the presence of an in-band 128-OAM 300MS/s (limited by instrument) TX SI signal, and SIC is demonstrated across SI channel changes using a global optimization approach.
{"title":"14.3 A 26GHz Full-Duplex Circulator Receiver with 53UB/400MHz(40UB/800MHz) Self-Interference Cancellation for mm-Wave Repeaters","authors":"Robin Garg, Sanket Jain, Paul Dania, Arun Nataraian","doi":"10.1109/ISSCC42613.2021.9365979","DOIUrl":"https://doi.org/10.1109/ISSCC42613.2021.9365979","url":null,"abstract":"Reduction in base-station deployment costs while increasing coverage has motivated Integrated Access and Backhaul (IAB) nodes in mm-wave 5G NR (Fig. 14.3.1). Similarly, high path loss due to shadowing and limited outdoor-to-indoor penetration at mm-wave has led to an interest in repeater/relays to extend 5G NR coverage [1]. Currently, halfduplexlinks based on TDD (preferred for lAB), FDD, spatial, and polarization-duplexare explored, targeting mm-wave TWRX isolation at the cost of channel capacity. While mmwave in-band full-duplex (IBFD) with shared antenna (ANT) interface can enable spectrum reuse in IAB and repeaters/relays, >100dB total self-interference cancellation (SIC) is required with up to 50dB of SIC in the mm-wave front-end [2]. Such SIC has been shown for IBFD at RF [3– 5], however mm-wave IBFD SIC with a shared antenna interface has been limited to 20dBat28GHz and 40dB(22dB at +10dBm TX SI power) at 60GHz [6, 7]. Achieving mm-wave IBFD SIC with a shared ANT interface is particularly challenging given (i) the high frequency of operation, (ii) wide 400MHz/800MHz bandwidths targeted in 5G NR, and (iii) variations in beamformer ANT impedance that changes the SI channel. This paper presents a fully integrated mm-wave circulator RX that addresses these challenges using (i) a hybrid-coupler and non-reciprocal N-path filter-based shared ANT interface that provides wideband SIC while creating an SI replica, enabling (ii) subsequent active cancellation with variable gain/phase shift to accommodate SI channel variations. The circulator RX implementation in 45nm SOI CMOS achieves 52. 8dB cancellation across 400MHz at 26. 4GHz(>100 $times$ improvement over state of the art at high power levels) with 3.1dB TX-to-ANT insertion loss (IL) and +11.5dBm TX power-handling. System-level feasibility for mm-wave wideband IBFD is shown with the integrated RX supporting 600MS/s128-OAM wireless reception (4.2Gb/s) with 3.3% RX EVM in the presence of an in-band 128-OAM 300MS/s (limited by instrument) TX SI signal, and SIC is demonstrated across SI channel changes using a global optimization approach.","PeriodicalId":371093,"journal":{"name":"2021 IEEE International Solid- State Circuits Conference (ISSCC)","volume":"44 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-02-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128604490","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-02-13DOI: 10.1109/ISSCC42613.2021.9365801
Tantan Zhang, Hyunwoo Son, Yuan Gao, Jingjing Lan, C. Heng
Bio-impedance (BioZ) is an important physiological parameter in wearable healthcare sensing. Besides the inherent cardiac and respiratory information, BioZ can be also used for other emerging applications such as non-invasive blood status sensing [1]. A conventiona14-e1ectrode (4E) setup eliminates the effect of electrode-tissue impedance (ETI) at the expense of user comfort, system complexity, and cost. On the other hand, a 2-electrode (2E) setup avoids short-falls of 4E but can only capture relative changes of Bi0Z instead of its absolute value. In addition, a readout front-end (RFE) with wide dynamic range (DR) and high signal-to-noise ratio (SNR) is needed to deal with small BioZ variation (0.1$sim10Omega$) as well as large baseline resistance (>10k$Omega$). A conventional RFE architecture employing an instrumentation amplifier (IA) and ADC has to trade-off between resolution, DR and noise [2, 3]. Although flicker noise in the current generator (CG) is mitigated through dynamic element matching (DEM) [2], the reference current (IREF) noise issue remains unaddressed. In [5], digital-assisted baseline cancellation and IREF correlated noise cancellation are proposed, which help eliminate IREF noise and input-dependent noise [4] due to the large signal in the current-balance instrumentation amplifier (CBIA). Nevertheless, larger noise is still observed due to the finite residual current $(I_{res})$ from the baseline cancellation.
{"title":"28.5 A 0.6V/0.9V 26.6-to-119.3µW ΔΣ-Based Bio-Impedance Readout IC with 101.9dB SNR and <0.1Hz 1/f Corner","authors":"Tantan Zhang, Hyunwoo Son, Yuan Gao, Jingjing Lan, C. Heng","doi":"10.1109/ISSCC42613.2021.9365801","DOIUrl":"https://doi.org/10.1109/ISSCC42613.2021.9365801","url":null,"abstract":"Bio-impedance (BioZ) is an important physiological parameter in wearable healthcare sensing. Besides the inherent cardiac and respiratory information, BioZ can be also used for other emerging applications such as non-invasive blood status sensing [1]. A conventiona14-e1ectrode (4E) setup eliminates the effect of electrode-tissue impedance (ETI) at the expense of user comfort, system complexity, and cost. On the other hand, a 2-electrode (2E) setup avoids short-falls of 4E but can only capture relative changes of Bi0Z instead of its absolute value. In addition, a readout front-end (RFE) with wide dynamic range (DR) and high signal-to-noise ratio (SNR) is needed to deal with small BioZ variation (0.1$sim10Omega$) as well as large baseline resistance (>10k$Omega$). A conventional RFE architecture employing an instrumentation amplifier (IA) and ADC has to trade-off between resolution, DR and noise [2, 3]. Although flicker noise in the current generator (CG) is mitigated through dynamic element matching (DEM) [2], the reference current (IREF) noise issue remains unaddressed. In [5], digital-assisted baseline cancellation and IREF correlated noise cancellation are proposed, which help eliminate IREF noise and input-dependent noise [4] due to the large signal in the current-balance instrumentation amplifier (CBIA). Nevertheless, larger noise is still observed due to the finite residual current $(I_{res})$ from the baseline cancellation.","PeriodicalId":371093,"journal":{"name":"2021 IEEE International Solid- State Circuits Conference (ISSCC)","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-02-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131828220","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-02-13DOI: 10.1109/ISSCC42613.2021.9366050
Yong-Hun Kim, Hyung-Jin Kim, Jaemin Choi, M. Ahn, Dongkeon Lee, Seunghyun Cho, Dong-Yeon Park, Y.J. Park, Min-Soo Jang, Yongjun Kim, Jinyong Choi, Sung-Woo Yoon, Jaesu Jung, Jae-Koo Park, Jae-Woo Lee, D. Kwon, H. Cha, Si-Hyeong Cho, Seonghwan Kim, Jihwa You, Kyoung-Ho Kim, Dae-Hyun Kim, Byung-Cheol Kim, Young-Kwan Kim, Jun-Ho Kim, Seouk-Kyu Choi, Chankyung Kim, Byongwook Na, Hye-In Choi, Reum Oh, Jeong-Don Ihm, Seung-Jun Bae, N. Kim, Jung-Bae Lee
The demand for mobile DRAM has increased, with a requirement for high density, high data rates, and low-power consumption to support applications such as 5G communication, multiple cameras, and automotive. Thus, density has increased from 2Gb [1] to 16Gb [2] in LPDDR4 and LPDDR4X, but the maximum density for LPDDR5 is only 12Gb [3] due to the limited package size specification: such as a 496-ball FBGA. In this work, a mosaic architecture is introduced to increase the density to 16Gb, even in a limited package size. Additionally, the I/O performance is improved by shortening the length for the top metal, and a short-feedback sense amplifier (SA) with dedicated VREFs for a 1-tap DFE. The side effect of a mosaic architecture is the performance of the internal DRAM due to a 1.64× long bus line; however, this is mitigated by a fully-source-synchronous (FSS) bus scheme that is robust to PVT variation. In addition, to reduce the power consumption of the long bus line a low-level swing (LLS) scheme is used in low frequency mode. Furthermore, to enhance power efficiency and yield an adaptive-body-bias (ABB) scheme is introduced in a 3rd generation of a 10nm DRAM process.
{"title":"25.2 A 16Gb Sub-1V 7.14Gb/s/pin LPDDR5 SDRAM Applying a Mosaic Architecture with a Short-Feedback 1-Tap DFE, an FSS Bus with Low-Level Swing and an Adaptively Controlled Body Biasing in a 3rd-Generation 10nm DRAM","authors":"Yong-Hun Kim, Hyung-Jin Kim, Jaemin Choi, M. Ahn, Dongkeon Lee, Seunghyun Cho, Dong-Yeon Park, Y.J. Park, Min-Soo Jang, Yongjun Kim, Jinyong Choi, Sung-Woo Yoon, Jaesu Jung, Jae-Koo Park, Jae-Woo Lee, D. Kwon, H. Cha, Si-Hyeong Cho, Seonghwan Kim, Jihwa You, Kyoung-Ho Kim, Dae-Hyun Kim, Byung-Cheol Kim, Young-Kwan Kim, Jun-Ho Kim, Seouk-Kyu Choi, Chankyung Kim, Byongwook Na, Hye-In Choi, Reum Oh, Jeong-Don Ihm, Seung-Jun Bae, N. Kim, Jung-Bae Lee","doi":"10.1109/ISSCC42613.2021.9366050","DOIUrl":"https://doi.org/10.1109/ISSCC42613.2021.9366050","url":null,"abstract":"The demand for mobile DRAM has increased, with a requirement for high density, high data rates, and low-power consumption to support applications such as 5G communication, multiple cameras, and automotive. Thus, density has increased from 2Gb [1] to 16Gb [2] in LPDDR4 and LPDDR4X, but the maximum density for LPDDR5 is only 12Gb [3] due to the limited package size specification: such as a 496-ball FBGA. In this work, a mosaic architecture is introduced to increase the density to 16Gb, even in a limited package size. Additionally, the I/O performance is improved by shortening the length for the top metal, and a short-feedback sense amplifier (SA) with dedicated VREFs for a 1-tap DFE. The side effect of a mosaic architecture is the performance of the internal DRAM due to a 1.64× long bus line; however, this is mitigated by a fully-source-synchronous (FSS) bus scheme that is robust to PVT variation. In addition, to reduce the power consumption of the long bus line a low-level swing (LLS) scheme is used in low frequency mode. Furthermore, to enhance power efficiency and yield an adaptive-body-bias (ABB) scheme is introduced in a 3rd generation of a 10nm DRAM process.","PeriodicalId":371093,"journal":{"name":"2021 IEEE International Solid- State Circuits Conference (ISSCC)","volume":"78 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-02-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128600152","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-02-13DOI: 10.1109/isscc42613.2021.9365764
{"title":"ISSCC 2021 Index to Authors","authors":"","doi":"10.1109/isscc42613.2021.9365764","DOIUrl":"https://doi.org/10.1109/isscc42613.2021.9365764","url":null,"abstract":"","PeriodicalId":371093,"journal":{"name":"2021 IEEE International Solid- State Circuits Conference (ISSCC)","volume":"13 6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-02-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114154660","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
京公网安备 11010802042870号
京ICP备2023020795号-1
扫码关注我们
求助内容：
应助结果提醒方式：