Pub Date : 2003-07-10DOI: 10.1109/SCS.2003.1227091
H. Andrei, F. Spinei, C. Cepisca
This work deals with the computation of the sensitivities in electrical networks and their invariants. This paper presents a method for computation of the sensitivities in electrical steady state linear networks, correlating it to the new four parameters which characterize the current and respectively voltage harmonics. The given example is used for the discussion of some aspects related to the sensitivity problems.
{"title":"On sensitivities in steady state circuits","authors":"H. Andrei, F. Spinei, C. Cepisca","doi":"10.1109/SCS.2003.1227091","DOIUrl":"https://doi.org/10.1109/SCS.2003.1227091","url":null,"abstract":"This work deals with the computation of the sensitivities in electrical networks and their invariants. This paper presents a method for computation of the sensitivities in electrical steady state linear networks, correlating it to the new four parameters which characterize the current and respectively voltage harmonics. The given example is used for the discussion of some aspects related to the sensitivity problems.","PeriodicalId":375963,"journal":{"name":"Signals, Circuits and Systems, 2003. SCS 2003. International Symposium on","volume":"45 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-07-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124299156","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2003-07-10DOI: 10.1109/SCS.2003.1227135
L. Scripcariu, P. Duma
Run-Length Limited (RLL) codes are a key component in digital data recording, for computer storage and electronic entertainment applications according to K.A. Schouhamer Immink (1991). Hardware storage devices with high-density data, such as Compact Discs or DVD, use RLL codes. High coding efficiency (over 90%) is obtained for high-rate codes. The design of these codes using the classic graphic method is very complicated according to K.A. Schouhamer Immink et al. (1998). Therefore we propose an efficient method for high-rate codes design and different RLL family codes are designed based on it. Some new high-rate binary RLL codes are included as examples.
根据K.A. Schouhamer Immink(1991)的说法，运行长度限制(RLL)代码是数字数据记录的关键组成部分，用于计算机存储和电子娱乐应用。包含高密度数据的硬件存储设备，如光盘、DVD等，使用RLL码。高码率的编码效率可达90%以上。根据K.A. Schouhamer Immink et al.(1998)，使用经典图形方法设计这些码是非常复杂的。因此，我们提出了一种高效的高速率码设计方法，并在此基础上设计了不同的RLL族码。给出了一些新的高速率二进制RLL码的示例。
{"title":"A new method for high-rate RLL codes design","authors":"L. Scripcariu, P. Duma","doi":"10.1109/SCS.2003.1227135","DOIUrl":"https://doi.org/10.1109/SCS.2003.1227135","url":null,"abstract":"Run-Length Limited (RLL) codes are a key component in digital data recording, for computer storage and electronic entertainment applications according to K.A. Schouhamer Immink (1991). Hardware storage devices with high-density data, such as Compact Discs or DVD, use RLL codes. High coding efficiency (over 90%) is obtained for high-rate codes. The design of these codes using the classic graphic method is very complicated according to K.A. Schouhamer Immink et al. (1998). Therefore we propose an efficient method for high-rate codes design and different RLL family codes are designed based on it. Some new high-rate binary RLL codes are included as examples.","PeriodicalId":375963,"journal":{"name":"Signals, Circuits and Systems, 2003. SCS 2003. International Symposium on","volume":"68 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-07-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121800120","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2003-07-10DOI: 10.1109/SCS.2003.1226947
S. Ciochină, C. Paleologu, A. Enescu
Two versions of the RLS algorithm suitable for fixed-point implementation are proposed. A brief analysis concerning the convergence properties and the finite precision effects is performed. The simulation results show superior performances of these algorithms in the context of fixed-point implementation.
{"title":"On the behavior of RLS adaptive algorithm in fixed-point implementation","authors":"S. Ciochină, C. Paleologu, A. Enescu","doi":"10.1109/SCS.2003.1226947","DOIUrl":"https://doi.org/10.1109/SCS.2003.1226947","url":null,"abstract":"Two versions of the RLS algorithm suitable for fixed-point implementation are proposed. A brief analysis concerning the convergence properties and the finite precision effects is performed. The simulation results show superior performances of these algorithms in the context of fixed-point implementation.","PeriodicalId":375963,"journal":{"name":"Signals, Circuits and Systems, 2003. SCS 2003. International Symposium on","volume":"188 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-07-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123014639","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2003-07-10DOI: 10.1109/SCS.2003.1227066
M. Loulou, M. Fakhfakh, N. Masmoudi
In this paper, we deal with reducing the effect of non-ideality affecting memory cells build in switched current (SI) technique. The basic idea consists of combining benefits of two improved techniques. Indeed, we demonstrate that class AB cells built in the grounded gate configuration and used with S2I technique improve the performance of SI cells. As a consequence errors hitting output current are minimized and dynamic range is maximized. The proposed cell is designed using CMOS 0.35 μm process. With 3.3V power supply voltage, this new memory cell achieves a 80 dB dynamic range at 16 MHz sampling frequency, where the power consumption is about 860 μW. These performances are reached using a new methodology to optimize transistor sizes.
{"title":"A high precision high speed S2I switched current grounded gate class AB memory cell","authors":"M. Loulou, M. Fakhfakh, N. Masmoudi","doi":"10.1109/SCS.2003.1227066","DOIUrl":"https://doi.org/10.1109/SCS.2003.1227066","url":null,"abstract":"In this paper, we deal with reducing the effect of non-ideality affecting memory cells build in switched current (SI) technique. The basic idea consists of combining benefits of two improved techniques. Indeed, we demonstrate that class AB cells built in the grounded gate configuration and used with S2I technique improve the performance of SI cells. As a consequence errors hitting output current are minimized and dynamic range is maximized. The proposed cell is designed using CMOS 0.35 μm process. With 3.3V power supply voltage, this new memory cell achieves a 80 dB dynamic range at 16 MHz sampling frequency, where the power consumption is about 860 μW. These performances are reached using a new methodology to optimize transistor sizes.","PeriodicalId":375963,"journal":{"name":"Signals, Circuits and Systems, 2003. SCS 2003. International Symposium on","volume":"180 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-07-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123180779","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2003-07-10DOI: 10.1109/SCS.2003.1227120
C. Popa
A new curvature-correction technique for improving the temperature behavior of a CMOS voltage reference is presented. The reducing of the temperature coefficient of the reference voltage is realized compensating the nonlinear temperature dependence of the gate-source voltage for a MOS transistor working in weak inversion with the difference between two gate-source voltages. These MOS transistors are polarized at drain currents with different temperature dependencies (PTAT and PTAT2, respectively). The PTAT voltage generator was implemented using an original offset voltage follower block, with the advantage that matched transistors and, in consequence, with a relatively smaller degradation of the circuit temperature behavior caused by devices' mismatches. SPICE simulation reports TC= 1.95 ppm/K for an extended temperature range, 273K < T < 363K, without considering the parameters spread.
提出了一种改善CMOS基准电压温度特性的曲率校正新技术。通过降低参考电压的温度系数，实现了用两个栅极电压差来补偿弱反转MOS晶体管栅极电压的非线性温度依赖性。这些MOS晶体管在具有不同温度依赖性(分别为PTAT和PTAT2)的漏极电流下极化。PTAT电压发生器使用原始的偏置电压跟随块实现，其优点是匹配晶体管，因此，由器件不匹配引起的电路温度行为的退化相对较小。SPICE模拟报告TC= 1.95 ppm/K的扩展温度范围，273K < T < 363K，不考虑参数扩散。
{"title":"A new curvature-corrected voltage reference based on the weight difference of gate-source voltages for subthreshold-operated MOS transistors","authors":"C. Popa","doi":"10.1109/SCS.2003.1227120","DOIUrl":"https://doi.org/10.1109/SCS.2003.1227120","url":null,"abstract":"A new curvature-correction technique for improving the temperature behavior of a CMOS voltage reference is presented. The reducing of the temperature coefficient of the reference voltage is realized compensating the nonlinear temperature dependence of the gate-source voltage for a MOS transistor working in weak inversion with the difference between two gate-source voltages. These MOS transistors are polarized at drain currents with different temperature dependencies (PTAT and PTAT2, respectively). The PTAT voltage generator was implemented using an original offset voltage follower block, with the advantage that matched transistors and, in consequence, with a relatively smaller degradation of the circuit temperature behavior caused by devices' mismatches. SPICE simulation reports TC= 1.95 ppm/K for an extended temperature range, 273K < T < 363K, without considering the parameters spread.","PeriodicalId":375963,"journal":{"name":"Signals, Circuits and Systems, 2003. SCS 2003. International Symposium on","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-07-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115251076","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2003-07-10DOI: 10.1109/SCS.2003.1226950
N. Rubanov
The subcircuit identification (SI) is a task of recognition of instances of small subcircuits in a larger circuit. SI program are important components of CAD tools for the simulation, verification, and testing of ICs. Modern IC designs, first, contain millions of the nets and devices, and, second, thousands of subcircuits. The conventional SI algorithms based on the graph state-space search techniques are computationally demanding and may require long runtime for such ICs. In this paper, we develop an optimization-based graph recognition method for solving the SI problem. This method combines the self annealing optimization technique and two concepts from the pattern recognition theory, namely, the error propagation and the soft (delayed) decision making. In contrast to the search-based algorithms our method allows extremely fast simultaneous finding of all subcircuit instances. The experimental results show that it recognizes all the instances orders of magnitude faster than the search-oriented techniques.
{"title":"Fast and accurate identifying subcircuits using an optimization based technique","authors":"N. Rubanov","doi":"10.1109/SCS.2003.1226950","DOIUrl":"https://doi.org/10.1109/SCS.2003.1226950","url":null,"abstract":"The subcircuit identification (SI) is a task of recognition of instances of small subcircuits in a larger circuit. SI program are important components of CAD tools for the simulation, verification, and testing of ICs. Modern IC designs, first, contain millions of the nets and devices, and, second, thousands of subcircuits. The conventional SI algorithms based on the graph state-space search techniques are computationally demanding and may require long runtime for such ICs. In this paper, we develop an optimization-based graph recognition method for solving the SI problem. This method combines the self annealing optimization technique and two concepts from the pattern recognition theory, namely, the error propagation and the soft (delayed) decision making. In contrast to the search-based algorithms our method allows extremely fast simultaneous finding of all subcircuit instances. The experimental results show that it recognizes all the instances orders of magnitude faster than the search-oriented techniques.","PeriodicalId":375963,"journal":{"name":"Signals, Circuits and Systems, 2003. SCS 2003. International Symposium on","volume":"37 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-07-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124856279","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2003-07-10DOI: 10.1109/SCS.2003.1226940
H. Bessalah, F. Alim, S. Seddiki
In this paper, the implementation of a new algorithm for the calculation of the Hough Transform (HT) with on-line arithmetic is introduced. This algorithm allows considerable reduction in the required number of multipliers and transfer tables. The main idea consists in using a combination of incremental method with the usual HT expression calling on-line calculation mode, which is efficient for real time applications.
{"title":"Implementation of the Hough transform by the on-line mode","authors":"H. Bessalah, F. Alim, S. Seddiki","doi":"10.1109/SCS.2003.1226940","DOIUrl":"https://doi.org/10.1109/SCS.2003.1226940","url":null,"abstract":"In this paper, the implementation of a new algorithm for the calculation of the Hough Transform (HT) with on-line arithmetic is introduced. This algorithm allows considerable reduction in the required number of multipliers and transfer tables. The main idea consists in using a combination of incremental method with the usual HT expression calling on-line calculation mode, which is efficient for real time applications.","PeriodicalId":375963,"journal":{"name":"Signals, Circuits and Systems, 2003. SCS 2003. International Symposium on","volume":"288 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-07-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123261417","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2003-07-10DOI: 10.1109/SCS.2003.1226981
R. Matei
In this paper, we propose some efficient realizations of separable 2-D spatial filters implemented on Cellular Neural Networks (CNNs), based on the Gaussian distribution function, which is approximated by both FIR and IIR filters. We also present a method of iterative filtering, which allows a selective Gaussian function to be implemented by repeating a simple filtering task several times. Some examples of selective low-pass and band-pass separable filters are given to illustrate the design methods.
{"title":"Some separable linear filtering tasks using CNNs","authors":"R. Matei","doi":"10.1109/SCS.2003.1226981","DOIUrl":"https://doi.org/10.1109/SCS.2003.1226981","url":null,"abstract":"In this paper, we propose some efficient realizations of separable 2-D spatial filters implemented on Cellular Neural Networks (CNNs), based on the Gaussian distribution function, which is approximated by both FIR and IIR filters. We also present a method of iterative filtering, which allows a selective Gaussian function to be implemented by repeating a simple filtering task several times. Some examples of selective low-pass and band-pass separable filters are given to illustrate the design methods.","PeriodicalId":375963,"journal":{"name":"Signals, Circuits and Systems, 2003. SCS 2003. International Symposium on","volume":"123 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-07-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123383425","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2003-07-10DOI: 10.1109/SCS.2003.1226966
V. Patrascu, V. Buzuloiu
In this paper, we present a mathematical model for color image processing. It is a logarithmic one. We consider the cube (-1, 1)3 as the set of values for the color space. We define two operations: addition (+) and real scalar multiplication (×). With these operations the space of colors becomes a real vector space. Then defining the scalar product (.|.) and the norm || · ||, we obtain a (logarithmic) Euclidean space. We show how we can use this model for color image enhancement and we present some experimental results.
{"title":"Color image processing using logarithmic operations","authors":"V. Patrascu, V. Buzuloiu","doi":"10.1109/SCS.2003.1226966","DOIUrl":"https://doi.org/10.1109/SCS.2003.1226966","url":null,"abstract":"In this paper, we present a mathematical model for color image processing. It is a logarithmic one. We consider the cube (-1, 1)3 as the set of values for the color space. We define two operations: addition (+) and real scalar multiplication (×). With these operations the space of colors becomes a real vector space. Then defining the scalar product (.|.) and the norm || · ||, we obtain a (logarithmic) Euclidean space. We show how we can use this model for color image enhancement and we present some experimental results.","PeriodicalId":375963,"journal":{"name":"Signals, Circuits and Systems, 2003. SCS 2003. International Symposium on","volume":"29 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-07-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124483009","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2003-07-10DOI: 10.1109/SCS.2003.1226954
P. Guitton-Ouhamou, C. Belleudy, M. Auguin
Energy consumption is a hot topic in the design of embedded systems. As mobile computing system (video camera, cellular phone, etc.) becomes more popular, how to lengthen the battery life of these systems becomes a critical issue. Also embedded system design is one of the most challenging tasks because the increasing complexity of new and various applications and the great variety of constraints to meet (lower cost, higher performance, lower energy). In this paper, we focus on the constraint of low energy consumption in hardware/software codesign tool. Our goal is to reach the best trade-off between system performance and energy consumption. For hardware and software units (DSP, RISC processors), we have developed a model of energy consumption and the methodology to evaluate the energy consumption of the designed systems. Then to reduce this energy, we introduce optimizations in allocation and scheduling steps. Experimental results show that this approach is promising and that it provides architectures with an energy saving of 50%.
{"title":"Automatical exploration of low power architecture in co-design tool","authors":"P. Guitton-Ouhamou, C. Belleudy, M. Auguin","doi":"10.1109/SCS.2003.1226954","DOIUrl":"https://doi.org/10.1109/SCS.2003.1226954","url":null,"abstract":"Energy consumption is a hot topic in the design of embedded systems. As mobile computing system (video camera, cellular phone, etc.) becomes more popular, how to lengthen the battery life of these systems becomes a critical issue. Also embedded system design is one of the most challenging tasks because the increasing complexity of new and various applications and the great variety of constraints to meet (lower cost, higher performance, lower energy). In this paper, we focus on the constraint of low energy consumption in hardware/software codesign tool. Our goal is to reach the best trade-off between system performance and energy consumption. For hardware and software units (DSP, RISC processors), we have developed a model of energy consumption and the methodology to evaluate the energy consumption of the designed systems. Then to reduce this energy, we introduce optimizations in allocation and scheduling steps. Experimental results show that this approach is promising and that it provides architectures with an energy saving of 50%.","PeriodicalId":375963,"journal":{"name":"Signals, Circuits and Systems, 2003. SCS 2003. International Symposium on","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-07-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121143945","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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