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Precision Crosssectional Analysis of LSI and VLSI Devices 大规模集成电路和超大规模集成电路器件的精密截面分析
Pub Date : 1981-04-01 DOI: 10.1109/IRPS.1981.362985
Peter G. Angelides
This is a tutorial paper describing and illustrating a crosssectional procedure for LSI and VLSI devices. The significant results using this procedure are one to one measurements of circuit parameters and a very clear view of the crosssectioned circuit at any given point. It is thus possible to measure with ease dimensions in the 0.3 micron range using the light microscope.
这是一篇描述和说明大规模集成电路和超大规模集成电路器件的横截面程序的教程。使用此程序的重要结果是电路参数的一对一测量和在任何给定点的截面电路的非常清晰的视图。因此,使用光学显微镜可以轻松测量0.3微米范围内的尺寸。
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引用次数: 4
Reliability Tests and Stress in Plastic Integrated Circuits 塑料集成电路的可靠性测试和应力
Pub Date : 1981-04-01 DOI: 10.1109/IRPS.1981.362978
W. Schroen, James L. Spencer, John A. Bryan, Robert D. Cleveland, Terry D. Metzgar, D. Edwards
Temperature cycling and pressure cooker environmental tests were performed on integrated strain gauge and metal test structures. Test bars were packaged in different plastic encapsulation materials and under different packaging procedures. For temperature cycling, dramatic differences in build-up and relief of internal stress in silicon bars were found as a function of the packaging conditions selected. Packaging conditions also affected the performance of test structures and actual circuits in pressure cooker. Conclusions for plastic IC reliability are reached, as illustrated by an innovative test structure for simultaneous measurement of stress, leakage and corrosion. In conclusion, modular reliability test bars are discussed in relation to the strategy for reliability prediction.
对综合应变片和金属试验结构进行了温度循环和高压锅环境试验。试验棒采用不同的塑料封装材料和不同的包装工艺进行包装。对于温度循环,在硅棒内部应力的积累和缓解的巨大差异被发现作为一个功能的包装条件选择。封装条件对测试结构和实际电路的性能也有影响。通过同时测量应力、泄漏和腐蚀的创新测试结构,得出了塑性集成电路可靠性的结论。最后,讨论了模块化可靠性试验杆与可靠性预测策略的关系。
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引用次数: 26
Temperature Accelerated Estimation of MNOS Memory Reliability MNOS存储器可靠性的温度加速估计
Pub Date : 1981-04-01 DOI: 10.1109/IRPS.1981.362966
T. Ajiki, M. Sugimoto, H. Higuchi, S. Kumada
A MNOS non-volatile memory has many special features and a good marketability. In spite of that it is not widely used due to its undeveloped reliability. Life test experiments were done under various application conditions to obtain an exact reliability estimation for a MNOS memory. Result of these test imply the application of erase/ write cycles prior to retention life test experiments, which is preferable for a proper estimation of life time at field operation conditions. A screening procedure at high temperature for a short time becomes possible by applying a proper acceleration factor.
MNOS非易失性存储器具有许多特殊的特性和良好的市场销路。尽管如此,由于其不发达的可靠性,它并没有被广泛使用。在各种应用条件下进行了寿命测试实验,以获得MNOS存储器的准确可靠性估计。这些测试的结果意味着在保留寿命测试实验之前应用擦除/写入周期,这对于在现场操作条件下正确估计寿命是可取的。通过施加适当的加速系数,可以在高温下进行短时间的筛选。
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引用次数: 3
Statistics of Defect Related Breakdown 缺陷相关分解的统计
Pub Date : 1981-04-01 DOI: 10.1109/IRPS.1981.362998
M. Shatzkes, M. Av-Ron
An analysis of dielectric breakdown is presented under the assumption that breakdown events occurring at defect-free regions (intrinsic) and-at defects are independent. The yield as function of time, when the defects are Poisson distributed, is a product of factors reflecting defect-related and intrinsic breakdown. Explicit results are given for various tests commonly used in studies of dielectric reliability. A statistical model of dielectric breakdown is required for precise reliability projections and for assessment of dielectric quality from data obtained in breakdown tests. Such a model was developed by Solomon, Klein and Albert1 for defect free insulators. We2,3 derived a model incorporating the effects of defects and presented results for the case where all defects were the same type, i.e., the probability for breakdown at each defect being the same. Our purpose here is to extend our analysis to the case of multiple defect types and to further elucidate the implications of our model.
在假定发生在无缺陷区域(本征)和缺陷区域的击穿事件是相互独立的情况下,对介质击穿进行了分析。当缺陷为泊松分布时,成品率作为时间的函数是反映缺陷相关击穿和内在击穿因素的乘积。给出了电介质可靠性研究中常用的各种试验的明确结果。电介质击穿的统计模型需要精确的可靠性预测和从击穿试验中获得的数据评估电介质质量。这种模型是由Solomon, Klein和Albert1为无缺陷绝缘子开发的。we2,3导出了一个包含缺陷影响的模型,并给出了所有缺陷都是相同类型的情况下的结果,也就是说,每个缺陷的崩溃概率是相同的。我们在这里的目的是将我们的分析扩展到多种缺陷类型的情况,并进一步阐明我们模型的含义。
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引用次数: 4
A Mechanism for the Dependence of Moisture Detection Sensitivity on Gas Composition in Residual Gas Analysis 残余气体分析中水分检测灵敏度随气体成分变化的机理
Pub Date : 1981-04-01 DOI: 10.1109/IRPS.1981.362990
J. Kiely, P. Flinn, B. Sun
The measurement of internal water vapor in semiconductor packages by Residual Gas Analysis (RGA) is complicated by the dependence of the detected signal on gas composition. In particular, the dependence on the percentage of O2 or H2 present is quite significant. The data presented show that the detected moisture signal contains an additive portion proportional to the percentage O2 or H2 present, but is independent of the true water present. A mechanism, sputtering or local heating in the ionizer of the mass spectrometer, is shown to account for this behavior.
利用残余气体分析(RGA)对半导体封装内部水蒸气的测量由于检测信号依赖于气体成分而变得复杂。特别是,对存在的O2或H2的百分比的依赖是相当显著的。所提供的数据表明,检测到的水分信号包含与存在的O2或H2百分比成比例的添加剂部分,但与存在的真实水无关。一个机制,溅射或局部加热的电离器的质谱仪,显示了解释这种行为。
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引用次数: 0
Phase Dependent Voltage Contrast - An Inexpensive SEM Addition for LSI Failure Analysis 相位相关的电压对比-一种廉价的SEM附加的LSI失效分析
Pub Date : 1981-04-01 DOI: 10.1109/IRPS.1981.363007
D. Younkin
A simple and inexpensive SEM voltage contrast technique has been developed which displays die-level logic-state information by distinguishing between in- and out-of-phase signals with respect to a reference signal. The technique as currently implemented also permits on-chip delay measurements down to 75 ns with ±10% resolution. Electron beam blanking is not required.
一种简单而廉价的扫描电镜电压对比技术已经开发出来,它通过区分相对于参考信号的同相和异相信号来显示模级逻辑状态信息。目前实现的技术还允许片上延迟测量低至75 ns,分辨率为±10%。不需要电子束消隐。
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引用次数: 6
A New Technique for Input Protection Testing 输入保护检测新技术
Pub Date : 1981-04-01 DOI: 10.1109/IRPS.1981.362999
D. Fisch
Input protection circuits are typically evaluated by resistively discharging a capacitor into the tested device with one or more of its pins grounded. These techniques usually result in junction damage in or near the irnput protection circuit, rather than in gate oxide ruptures as is seen in most electrostatic damage field failures. To eliminate this inconsistency, a new testing technique has been developed. Electro-static failures are modeled as occurring while the affected device is isolated from ground and forced to change potential at an externally determined rate. The nlew technique provides two quantitative parameters, namely the maximum voltage and the rise time of the applied pulse, which yield the voltage slew rate and the power dissipated into the device. By adjusting these paramieters to obtain a predeterrnined failure rate, an accurate comparison of the input protection networks on different devices may be obtained. In addition to reproducing the field failure mechanism, experimiiental data indicates that this technique has sufficient sensitivity to detect slight design variations in almiiost identical input protection circuits.
输入保护电路通常通过电阻放电电容到被测器件中,并使其一个或多个引脚接地来评估。这些技术通常导致输入保护电路内或附近的结损坏,而不是在大多数静电损坏场故障中看到的栅极氧化物破裂。为了消除这种不一致,开发了一种新的测试技术。当受影响的设备与地面隔离并被迫以外部确定的速率改变电位时,静电故障被建模为发生。nlew技术提供了两个定量参数,即最大电压和施加脉冲的上升时间,从而产生电压转换率和耗散到器件中的功率。通过调整这些参数来获得预定的故障率,可以对不同设备上的输入保护网络进行准确的比较。除了再现现场失效机制外,实验数据表明,该技术具有足够的灵敏度,可以在几乎相同的输入保护电路中检测到轻微的设计变化。
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引用次数: 2
Reliability Implications of Polyimide Multilevel Insulators 聚酰亚胺多层绝缘子的可靠性影响
Pub Date : 1981-04-01 DOI: 10.1109/IRPS.1981.363010
G. Brown
Polyimide films possess many characteristics that make them attractive candidates for application as multilevel insulators in the fabrication of VLSI devices. These include planarization of underlying topographies to improve metal step coverage, low interelectrode capacitance, low process temperatures compatible with all metal systems, and freedom from the corrosion liability associated with the phosphorus-doped oxide films commonly used for this purpose. The application of polyimide multilevel technology to MOS circuitry has been described by Sato, et al.1 for conventional aluminum gate devices, Shah, et al.2 for refractory gate structures, and Larsen3 for more complex silicon and aluminum MOS technology. Electrical parameters of polyimide films, including dc coniduction, dielectric constant and dissipation factor, and dielectric strength have been reported by Zielinski4 and Samuelson.5 At this symposium in 1976, Gregoritsch,6 and more recently Mukai, et al.7 have described reliability-oriented studies of structures containing polyimide films. While several of these workers have discussed effects of ionic contamination, dipoles, and electronic conduction at elevated temperatures, models relating these parameters to device reliability have not yet appeared.
聚酰亚胺薄膜具有许多特性,使其成为超大规模集成电路器件制造中多层绝缘体的有吸引力的候选者。这些包括底层地形的平面化,以提高金属台阶的覆盖率,低电极间电容,与所有金属系统兼容的低工艺温度,以及与通常用于此目的的掺磷氧化膜相关的腐蚀风险。Sato等人描述了聚酰亚胺多能级技术在MOS电路中的应用1,Shah等人描述了难熔栅结构2,Larsen3描述了更复杂的硅和铝MOS技术。聚酰亚胺薄膜的电学参数,包括直流导电性、介电常数和耗散因子,以及介电强度,已经由Zielinski4和samuelson 5报道。在1976年的研讨会上,Gregoritsch,6和最近的Mukai等人7描述了含有聚酰亚胺薄膜的结构的可靠性研究。虽然这些工作人员已经讨论了离子污染、偶极子和高温下电子传导的影响,但将这些参数与设备可靠性相关的模型尚未出现。
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引用次数: 7
The use of Marginal Voltage Measurements to Detect and Locate Defects in Digital Microcircuits 边缘电压测量在数字微电路缺陷检测与定位中的应用
Pub Date : 1981-04-01 DOI: 10.1109/IRPS.1981.362986
D. Ager, J. C. Henderson
By combining a measurement of the supply voltages below which a digital integrated circuit misoperates during a functional test, and a lightspot scanning technique, it is shown how defects can be both detected and located in circuits which otherwise appear normal. Equipment is described and examples are given of defects found.
通过结合在功能测试中数字集成电路误操作时的电源电压测量和光点扫描技术,展示了如何在电路中检测和定位缺陷,否则看起来正常。对设备进行了描述,并给出了发现缺陷的实例。
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引用次数: 9
Reliability Study of Plastic Encapsulated Copper Lead Frame/Epoxy Die Attach Packaging System 塑料封装铜引线框架/环氧贴片封装系统的可靠性研究
Pub Date : 1981-04-01 DOI: 10.1109/IRPS.1981.362981
J. R. Howell
This paper presents the evaluation methods used to appraise the reliability of plastic/copper lead frame packaging systems. A discussion of the copper/epoxy system, suspected failure mechanisms, tests designed to explore these mechanisms, and data developed during this study are presented. The data presented indicates the copper/epoxy system can meet or exceed the reliability of the Alloy 42 system.
本文介绍了用于评估塑料/铜引线框架封装系统可靠性的评估方法。本文介绍了铜/环氧树脂体系的讨论、可能的失效机制、旨在探索这些机制的测试以及在本研究中开发的数据。所提供的数据表明,铜/环氧树脂体系可以达到或超过42合金体系的可靠性。
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引用次数: 4
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19th International Reliability Physics Symposium
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