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19th International Reliability Physics Symposium最新文献

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CF4/O2 Plasma Accelerated Aluminum Metallization Corrosion in Plastic Encapsulated ICs in the Presence of Contaminated Die Attach Epoxies 模具附着环氧树脂污染下CF4/O2等离子体加速塑料封装集成电路铝金属化腐蚀
Pub Date : 1981-04-01 DOI: 10.1109/IRPS.1981.362979
R. Ritchie, D. Andrews
Corrosion rates, in autoclave, of aluminum bonding pad metallization in plastic encapsulated packages were studied as a function of die attach materials. The failure rate for chlorine contaminated die attach epoxies was enhanced if the pad metallization had prior exposure to carbon tetrafluoride/oxygen plasma. Eutectically attached devices exposed to CF4/O2 demonstrated increased failure rates. These rates were found to vary with length of exposure.
研究了塑料封装中铝焊盘金属化在高压灭菌器中的腐蚀速率与模具附着材料的关系。如果焊盘金属化之前暴露于四氟化碳/氧等离子体,则氯污染的模具附着环氧树脂的故障率会增加。接触CF4/O2的共晶连接设备显示故障率增加。研究发现,这些比率随暴露时间长短而变化。
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引用次数: 5
The Reflow Attachment and Reliability Testing of Ceramic Chip Carriers 陶瓷芯片载体的回流焊连接及可靠性测试
Pub Date : 1981-04-01 DOI: 10.1109/IRPS.1981.362980
H. Charles, B. Romenesko
The results of an extensive program for the solder reflow attachment and reliability testiny of ceramic chip carriers for use in space satellites, implantable biomedical electronics, and underwater instrumentation are discussed in detail. The program was divided in three major parts; 1) the packaging of integrated circuit chips in ceramic carriers; 2) the selection and qualification of solders, reflow methods and cleaning processes; and 3) the validation of the chip carrier-substrate system for high reliability applications. Military Standard environmental testing of ceramic chip carriers alone and carriers attached to thin film and thick film (multilayer) ceramic substrates, glass, sapphire, and various printed wire circuit boards has been conducted. Test results are presented for various carrier-substrate-solder combinations along with discussions of associated failure modes and fabrication problem areas.
详细讨论了用于空间卫星、植入式生物医学电子和水下仪器的陶瓷芯片载体的焊接回流连接和可靠性测试的广泛程序的结果。该计划分为三个主要部分;1)集成电路芯片在陶瓷载体中的封装;2)焊料的选择和鉴定、回流方法和清洗工艺;3)芯片载波-衬底系统的高可靠性应用验证。对单独的陶瓷芯片载体和附着在薄膜和厚膜(多层)陶瓷基板、玻璃、蓝宝石、各种印刷线路板上的载体进行了军用标准环境试验。本文给出了各种载体-衬底-焊料组合的测试结果,并讨论了相关的失效模式和制造问题区域。
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引用次数: 6
Reaction Kinetics of Al Films with Phosphosilicate Glass (PSG) in Semiconductors 半导体中铝膜与磷硅酸盐玻璃(PSG)的反应动力学
Pub Date : 1981-04-01 DOI: 10.1109/IRPS.1981.363000
G. Digiacomo
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引用次数: 2
Dynamic Measurement of the Water Vapor Content of Integrated Circuit Packages using Derivative Infrared Diode Laser Spectroscopy 利用导数红外二极管激光光谱动态测量集成电路封装中的水蒸气含量
Pub Date : 1981-04-01 DOI: 10.1109/IRPS.1981.362975
P. Bossard, J. Mucha
There has been considerable effort devoted to developing techniques for measuring the moisture content of hermetically sealed integrated circuit packages. Three techniques have generally been used for this purpose: 1) mass spectrometric analysis [1], 2) measurement of a suitably calibrated device characteristic [2], and 3) dew point determinations based on d.c. surface leakage or capacitance [3,4]. In this report, a new method [51 which utilizes derivative infrared spectra for quantitating trace amounts of water vapor, in a manner that eliminates the effects of adsorption or desorption in the test cell on the results of the measurements, is described. The technique is applied to the measurement of the water vapor content of "standard' TO-18 cans and 18 pin side brazed ceramic packages. Because of the sensitivity and selfcalibrating nature of this technique, it can accurately measure water vapor concentrations in the range of 102 to 104 ppm from 50 AQ volumes.
已经有相当多的努力致力于开发测量密封集成电路封装的水分含量的技术。通常有三种技术用于此目的:1)质谱分析[1],2)测量适当校准的器件特性[2],以及3)基于直流表面泄漏或电容的露点测定[3,4]。在本报告中,描述了一种新方法[51],该方法利用导数红外光谱来定量痕量水蒸气,这种方法消除了测试单元中吸附或解吸对测量结果的影响。该技术应用于测量“标准”to -18罐和18针侧钎焊陶瓷封装的水蒸气含量。由于该技术的灵敏度和自校准特性,它可以准确地测量从50 AQ体积的102到104 ppm范围内的水蒸气浓度。
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引用次数: 2
The Effects of Moisture on Multilayered Ceramic Top Brazed Flat Packs 水分对多层陶瓷顶部钎焊扁包的影响
Pub Date : 1981-04-01 DOI: 10.1109/IRPS.1981.362994
B. Drotman, Jim Silva
Recent moisture resistance tests of various multilayer top brazed ceramic flat packs have revealed a serious design deficiency. These flat packs which utilize a tungsten interconnect system, in the presence of high humidity, suffer a galvanic corrosion which anodically consumes the tungsten. This may ultimately produce an open circuit. The results indicate that the lead plating system does not adequately seal off the interface area where the tungsten stripe gresses from the inside of the package.
最近的各种多层顶部钎焊陶瓷平板包的抗湿性测试揭示了一个严重的设计缺陷。这些使用钨互连系统的平板封装,在高湿度的环境下,会遭受电偶腐蚀,阳极消耗钨。这可能最终产生开路。结果表明,镀铅系统不能充分密封钨条从封装内部渗出的界面区域。
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引用次数: 0
Electromigration Testing of Al-Alloy Films 铝合金薄膜的电迁移试验
Pub Date : 1980-10-01 DOI: 10.1109/IRPS.1981.363004
P. Ghate
A search for reliability improvement of Al film interconnections has led to the introduction of Al-Alloy films such as Al+Cu, Al+Si, Al+Cu+Si and so on. This paper describes thie results of an in-depth study of Al, Al+Cu (2 wt % Cu) and Al+Cu+Si (2 wt % Cu + 1 wt % Si) film interconnections and Silicon/Al-Alloy film contacts as they impact reliability of integrated circuits. Resistivity, microstructure and composition of Al-Alloy films vacuum deposited from an induction heated source (In-Source) and dc magnetron sputter deposition techniques have been investigated and it is concluded that both film deposition techniques are equally capable of producing these Al, Al+Cu (2 wt % Cu) and Al+Cu+Si (2 wt % Cu + 1 wt % Si) films of comparable physical properties. Chemical Analysis, X-Ray Fluorescence, Electron Microprobe, Scanning and Transmission Electron Microscopy and Ion Microprobe have been employed for Al-Alloy film characterization. Availability of automated dc magnetron sputter deposition equipment was a primary factor in the selection of magnetron sputter deposited Al-Alloy films for electromigration testing. Electromigration life tests on Al, Al+Cu and Al+Cu+Si film conductors (0.8 ¿m thick, 6 ¿m wide and 380, ¿m long) have been carried out at a current density of 1 × 106/ A/cm2 in the 150°C to 215°C ambience. Also, shallow junction devices with depths on the order of 0.
为了提高铝膜互连的可靠性,引入了Al+Cu、Al+Si、Al+Cu+Si等铝合金膜。本文介绍了Al、Al+Cu (2 wt % Cu)和Al+Cu+Si (2 wt % Cu+ 1 wt % Si)薄膜互连和硅/铝合金薄膜触点对集成电路可靠性的影响的深入研究结果。本文研究了感应热源真空沉积(In-Source)铝合金膜和直流磁控溅射沉积技术的电阻率、微观结构和成分,并得出结论,这两种沉积技术都能生产出具有相似物理性能的Al、Al+Cu (2 wt % Cu)和Al+Cu+Si (2 wt % Cu+ 1 wt % Si)薄膜。化学分析、x射线荧光、电子探针、扫描电镜和透射电镜、离子探针等技术已被广泛应用于铝合金薄膜的表征。自动直流磁控溅射沉积设备的可用性是选择磁控溅射沉积铝合金薄膜进行电迁移测试的主要因素。在150°C至215°C的环境下,在电流密度为1 × 106/ a /cm2的电流密度下,对Al, Al+Cu和Al+Cu+Si薄膜导体(0.8 m厚,6 m宽,380 m长)进行了电迁移寿命测试。此外,深度为0阶的浅结器件。
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引用次数: 14
SEM/EDAX Analysis of PIND Test Failures PIND测试失败的SEM/EDAX分析
Pub Date : 1900-01-01 DOI: 10.1109/IRPS.1981.362989
J. F. D. Porto, D. Loescher, H. Olson, P. Plunkett
Packaged LSI and hybrid devices used in high reliability military and space applications must pass a rigorous series of screens defined by Method 5004 of Mil Standard 883B. One of these screens is the Particle Impact Noise Detection (PIND) test. This test uses a very sensitive acoustic transducer to listen for particles within the package while the package is vibrated and shocked. We have used SEM, EDAX, and optical microscopy to analyze the particles from PIND failures. From these analyses we have identified the primary sources of PIND failures and have developed procedures that yield a low reject rate at PIND test. The device used in this investigation was a 1 K RAM die eutectically attached to a 24-pin leadless hermetic package (LHP). The package is solder sealed in a belt furnace with a gold-tin eutectic preform and a gold-plated cover. We have recovered the particles from PIND test failures by placing lead tape over a punched hole in the gold plated Kovar lid. The package is then vibrated until the particles pass through the hole and are attached to the adhesive on the tape. From the analyses we have identified many sources of particles that cause PIND test failures; the main source being the gold-tin solder preform used in the sealing process. We have investigated the effect of sealing materials, furnace temperature, furnace ambient, and package orientation on the number of gold-tin solder spheres.
用于高可靠性军事和空间应用的封装LSI和混合器件必须通过Mil标准883B方法5004定义的一系列严格的筛选。其中一个屏幕是粒子冲击噪声检测(PIND)测试。该测试使用一个非常灵敏的声学换能器,在包装受到振动和冲击时,聆听包装内的颗粒。我们使用SEM, EDAX和光学显微镜来分析PIND失效的颗粒。从这些分析中,我们已经确定了PIND失败的主要来源,并制定了在PIND测试中产生低废品率的程序。本研究中使用的器件是一个1k RAM芯片,共晶连接到一个24针无引线密封封装(LHP)。该包是焊料密封在带炉与金-锡共晶预铸和镀金盖。我们已经从PIND测试失败中恢复了颗粒,将铅带放在镀金科瓦尔盖的穿孔上。然后,包装被振动,直到颗粒穿过孔并附着在胶带上的粘合剂上。从分析中,我们已经确定了导致PIND测试失败的许多颗粒来源;主要来源是密封过程中使用的金锡焊料预制体。我们研究了密封材料、炉温、炉环境和封装方向对金锡焊料球数量的影响。
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引用次数: 2
期刊
19th International Reliability Physics Symposium
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