Pub Date : 2016-03-03DOI: 10.1109/ICEEOT.2016.7755620
R. Rajasekaran, J. A. Thulasi, J. A. Glenn
Solar energy is converted into electrical energy in effective manner. The main components of this solar power system are solar cell, dc to dc boost converters and inverter. The dc to dc converter used to boost or control the DC Voltage which is stored in the battery is fed to three phase Mosfet or IGBT driver, the output of the driver is connected to the Mosfet or IGBT which converts the DC supply in AC Supply. The low voltage AC supply is given to the three phase step up transformer. The three phase AC supply is generated.
{"title":"Three phase solar uninterrupted power supply","authors":"R. Rajasekaran, J. A. Thulasi, J. A. Glenn","doi":"10.1109/ICEEOT.2016.7755620","DOIUrl":"https://doi.org/10.1109/ICEEOT.2016.7755620","url":null,"abstract":"Solar energy is converted into electrical energy in effective manner. The main components of this solar power system are solar cell, dc to dc boost converters and inverter. The dc to dc converter used to boost or control the DC Voltage which is stored in the battery is fed to three phase Mosfet or IGBT driver, the output of the driver is connected to the Mosfet or IGBT which converts the DC supply in AC Supply. The low voltage AC supply is given to the three phase step up transformer. The three phase AC supply is generated.","PeriodicalId":383674,"journal":{"name":"2016 International Conference on Electrical, Electronics, and Optimization Techniques (ICEEOT)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-03-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125522857","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2016-03-03DOI: 10.1109/ICEEOT.2016.7754762
Pappu P. Potdukhe, Vishal D. Jaiswal
In this paper, Carry Select Adder (CSA) architecture are proposed using parallel prefix adder. Instead of using 4-bit Ripple Carry Adder (RCA), parallel prefix adder i.e., 4-bit Brent Kung (BK) adder is used to design CSA. Adders are key element in digital design, performing not only addition operation, but also many other function such as subtraction, multiplication and division. Ripple Carry Adder (RCA) gives the most complicated design as-well-as longer computation time. The time critical application use Brent Kung parallel prefix adder to drive fast results but they lead to increase in area. Carry Select Adder understands between RCA and BK in term of area and delay. Delay of RCA is larger therefore we have replaced it with Brent Kung parallel prefix adder which gives fast result. Power and delay of 4-bit RCA and 4-bit BK adder architecture are calculated at different input voltage. This paper describes comparative performance of 4-bit RCA and 4-Bit BK parallel prefix adder designed using TANNER EDA tool.
本文提出了一种采用并行前缀加法器的进位选择加法器(CSA)结构。采用并行前缀加法器即4位Brent Kung (BK)加法器来设计CSA，而不是使用4位纹波进位加法器(RCA)。加法器是数字设计中的关键元件，它不仅执行加法运算，而且还执行减法、乘法、除法等许多其他功能。纹波进位加法器(RCA)设计最复杂，计算时间较长。时间关键型应用使用Brent Kung并行前缀加法器来驱动快速结果，但导致面积增加。进位选择加法器理解RCA和BK之间的面积和延迟。RCA的延迟较大，因此我们用Brent Kung并行前缀加法器代替它，结果更快。计算了4位RCA和4位BK加法器结构在不同输入电压下的功率和时延。本文介绍了利用TANNER EDA工具设计的4位RCA和4位BK并行前缀加法器的性能比较。
{"title":"Design of high speed carry select adder using brent kung adder","authors":"Pappu P. Potdukhe, Vishal D. Jaiswal","doi":"10.1109/ICEEOT.2016.7754762","DOIUrl":"https://doi.org/10.1109/ICEEOT.2016.7754762","url":null,"abstract":"In this paper, Carry Select Adder (CSA) architecture are proposed using parallel prefix adder. Instead of using 4-bit Ripple Carry Adder (RCA), parallel prefix adder i.e., 4-bit Brent Kung (BK) adder is used to design CSA. Adders are key element in digital design, performing not only addition operation, but also many other function such as subtraction, multiplication and division. Ripple Carry Adder (RCA) gives the most complicated design as-well-as longer computation time. The time critical application use Brent Kung parallel prefix adder to drive fast results but they lead to increase in area. Carry Select Adder understands between RCA and BK in term of area and delay. Delay of RCA is larger therefore we have replaced it with Brent Kung parallel prefix adder which gives fast result. Power and delay of 4-bit RCA and 4-bit BK adder architecture are calculated at different input voltage. This paper describes comparative performance of 4-bit RCA and 4-Bit BK parallel prefix adder designed using TANNER EDA tool.","PeriodicalId":383674,"journal":{"name":"2016 International Conference on Electrical, Electronics, and Optimization Techniques (ICEEOT)","volume":"121 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-03-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134335669","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2016-03-03DOI: 10.1109/ICEEOT.2016.7754828
R. Sundarrajan, V. Vasudevan, S. Mithya
Cloud computing is the new generation of networks that uses remote servers hosted on the Internet for various uses such as data storage, data management, software usage etc. There are huge amount of resources provided and users can make use of the resources in any way they want to. Today, researchers attempt to find newer ways for Workflow scheduling which could work well in the cloud environment. Workflow scheduling is the most important task in cloud computing field and users have to pay for resources that were used based in a pay-per-usage scheme. Hence Workflow scheduling plays a vital role in getting maximum benefit from the resources that are provided. Another important element to be considered about cloud computing is Load balancing. This controlling of fill assures that every exclusive machine does the very same amount of labour at any immediate of time. To make sure this, we want to recommend on using the idea of fill controlling. Here in this document, we recommend heuristic criteria known as Firefly criteria for effective fill controlling in reasoning processing. This criterion is based on the travel behaviour of the fireflies which go looking for the closest possible maximum alternatives. We employ Firefly algorithm to schedule the jobs and thereby evenly distribute the load and in turn reduce the overall completion time (makespan).
{"title":"Workflow scheduling in cloud computing environment using firefly algorithm","authors":"R. Sundarrajan, V. Vasudevan, S. Mithya","doi":"10.1109/ICEEOT.2016.7754828","DOIUrl":"https://doi.org/10.1109/ICEEOT.2016.7754828","url":null,"abstract":"Cloud computing is the new generation of networks that uses remote servers hosted on the Internet for various uses such as data storage, data management, software usage etc. There are huge amount of resources provided and users can make use of the resources in any way they want to. Today, researchers attempt to find newer ways for Workflow scheduling which could work well in the cloud environment. Workflow scheduling is the most important task in cloud computing field and users have to pay for resources that were used based in a pay-per-usage scheme. Hence Workflow scheduling plays a vital role in getting maximum benefit from the resources that are provided. Another important element to be considered about cloud computing is Load balancing. This controlling of fill assures that every exclusive machine does the very same amount of labour at any immediate of time. To make sure this, we want to recommend on using the idea of fill controlling. Here in this document, we recommend heuristic criteria known as Firefly criteria for effective fill controlling in reasoning processing. This criterion is based on the travel behaviour of the fireflies which go looking for the closest possible maximum alternatives. We employ Firefly algorithm to schedule the jobs and thereby evenly distribute the load and in turn reduce the overall completion time (makespan).","PeriodicalId":383674,"journal":{"name":"2016 International Conference on Electrical, Electronics, and Optimization Techniques (ICEEOT)","volume":"109 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-03-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133775932","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2016-03-03DOI: 10.1109/ICEEOT.2016.7754780
Y. Abdalla
This work introduces a new general architecture for an analog to digital converter (ADC) cell. Each ADC cell generates one digital output bit when an analog voltage is applied at its input and produces an analog voltage. This analog voltage is suitable to be used as an input for another ADC cell in order to produce another digital output bit. This new ADC cell architecture is used as a building block to construct n-bit ADC. This n-bit ADC architecture is realized using cascaded n ADC cells and generates parallel digital output. A sample circuit realization is presented for the n-bit ADC and supported by simulation results. The ADC produces clean digital output when simulated at 50 Msample/sec.
{"title":"Building n-bit ADC using n 1-bit new general ADC cell architecture","authors":"Y. Abdalla","doi":"10.1109/ICEEOT.2016.7754780","DOIUrl":"https://doi.org/10.1109/ICEEOT.2016.7754780","url":null,"abstract":"This work introduces a new general architecture for an analog to digital converter (ADC) cell. Each ADC cell generates one digital output bit when an analog voltage is applied at its input and produces an analog voltage. This analog voltage is suitable to be used as an input for another ADC cell in order to produce another digital output bit. This new ADC cell architecture is used as a building block to construct n-bit ADC. This n-bit ADC architecture is realized using cascaded n ADC cells and generates parallel digital output. A sample circuit realization is presented for the n-bit ADC and supported by simulation results. The ADC produces clean digital output when simulated at 50 Msample/sec.","PeriodicalId":383674,"journal":{"name":"2016 International Conference on Electrical, Electronics, and Optimization Techniques (ICEEOT)","volume":"37 6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-03-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133345184","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2016-03-03DOI: 10.1109/ICEEOT.2016.7754830
Chakor Atmaram Munjaji, A. V. Tamhane
This paper represents the new topology and hardware modeling of Embedded-Z (EZ) source feed industrial drives and comparative analysis of Z source and EZ-source inverter. In industrial application conventionally there are two converters used for ASD systems i.e. Voltage Source Inverter (VSI) and Current Source Inverter (CSI), but they have a limited output voltage range. Conventional VSI and CSI support only either buck or boost DC-AC power conversion and need a relatively complex modulator. The problems in traditional source converters can be overcome by Z source inverter. In this LC impedance are employed for fast power conversion. Due to requirement of additional LC filter the cost of operation also increases. Therefore, instead of using an external LC filter in Z-source inverters, this paper gives an alternative family of Z-source inverters i.e. EZ-source inverter. In which input DC source has embedding between LC impedance, which perform the current and voltage filtering operation in current type and voltage type EZ source inverter. This paper illustrate the hardware design of EZ source inverter fed induction motor which overcome problems of conventional VSI and CSI inverters. And it gives the smooth speed control of induction motor.
{"title":"An embedded-Z (EZ) source inverter feed based industrial adjustable speed drive system","authors":"Chakor Atmaram Munjaji, A. V. Tamhane","doi":"10.1109/ICEEOT.2016.7754830","DOIUrl":"https://doi.org/10.1109/ICEEOT.2016.7754830","url":null,"abstract":"This paper represents the new topology and hardware modeling of Embedded-Z (EZ) source feed industrial drives and comparative analysis of Z source and EZ-source inverter. In industrial application conventionally there are two converters used for ASD systems i.e. Voltage Source Inverter (VSI) and Current Source Inverter (CSI), but they have a limited output voltage range. Conventional VSI and CSI support only either buck or boost DC-AC power conversion and need a relatively complex modulator. The problems in traditional source converters can be overcome by Z source inverter. In this LC impedance are employed for fast power conversion. Due to requirement of additional LC filter the cost of operation also increases. Therefore, instead of using an external LC filter in Z-source inverters, this paper gives an alternative family of Z-source inverters i.e. EZ-source inverter. In which input DC source has embedding between LC impedance, which perform the current and voltage filtering operation in current type and voltage type EZ source inverter. This paper illustrate the hardware design of EZ source inverter fed induction motor which overcome problems of conventional VSI and CSI inverters. And it gives the smooth speed control of induction motor.","PeriodicalId":383674,"journal":{"name":"2016 International Conference on Electrical, Electronics, and Optimization Techniques (ICEEOT)","volume":"114 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-03-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132670522","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2016-03-03DOI: 10.1109/ICEEOT.2016.7755123
Ong Wee Chuan, S. H. Ruslan
This project is about building a monitoring and control system for medical warehouse to ensure the medicine in warehouse is maintained within acceptable temperature and humidity limits. A virtual instrument (VI) has been designed to provide graphical user interface (GUI) for monitoring and controlling the environment condition with a real time access. The functionality of the system was successfully developed using LabVIEW software. Data display and data logger using LabVIEW was performed well from sensor measurement. Arduino was used as the brain to control the input and output devices. Besides that, Raspberry Pi was used to provide a wireless bridge to Arduino which running in LabVIEW LINX program. The performance of the system was tested and met the specified requirements. This system is able to alert the user when the temperature and/or humidity is out of the specified range by giving a warning through LED display, e-mail and short message notification.
{"title":"Medical warehouse monitoring and control system using LabVIEW","authors":"Ong Wee Chuan, S. H. Ruslan","doi":"10.1109/ICEEOT.2016.7755123","DOIUrl":"https://doi.org/10.1109/ICEEOT.2016.7755123","url":null,"abstract":"This project is about building a monitoring and control system for medical warehouse to ensure the medicine in warehouse is maintained within acceptable temperature and humidity limits. A virtual instrument (VI) has been designed to provide graphical user interface (GUI) for monitoring and controlling the environment condition with a real time access. The functionality of the system was successfully developed using LabVIEW software. Data display and data logger using LabVIEW was performed well from sensor measurement. Arduino was used as the brain to control the input and output devices. Besides that, Raspberry Pi was used to provide a wireless bridge to Arduino which running in LabVIEW LINX program. The performance of the system was tested and met the specified requirements. This system is able to alert the user when the temperature and/or humidity is out of the specified range by giving a warning through LED display, e-mail and short message notification.","PeriodicalId":383674,"journal":{"name":"2016 International Conference on Electrical, Electronics, and Optimization Techniques (ICEEOT)","volume":"44 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-03-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122522755","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2016-03-03DOI: 10.1109/ICEEOT.2016.7755252
K. O. Connell, A. Cashman
This paper presents the development of a numerical wave tank (NWT) using commercial Computational Fluid Dynamics (CFD) software, ANSYS Fluent 16.0. NWTs are widely used to analyse and optimise the performance of various wave energy converters, such as the Oscillating Water Column (OWC). A numerical modelling set-up is outlined which utilises Fluents Open Channel Wave Boundary Condition (OCWBC) along with a numerical beach scheme to dampen waves at the far field, ensuring no reflection back into the computational domain occurs. Linear waves are input into the NWT and free surface elevation and horizontal and vertical fluid velocities are compared to theory to quantify errors within the model. Variation in discretization error is observed with changing mesh density and a minimum criterion of 20 cells per wave height and 50 cells per wavelength is defined to ensure an acceptable level of model accuracy is achieved at a moderate computational expense. Further refinements show increased reduction in model error in both free surface elevation and velocity components beneath wave's peak, trough and inflection points, as expected. Further analysis focused on ensuring periodic independence was achieved and it was found that a minimum of six wave periods are required before fully developed waves propagate through the domain. The outlined numerical modelling method has quantified discretization error and outlined mesh requirements to reduce the overall error to acceptable levels for linear waves. Accurate free surface elevation and fluid velocity profiles will ensure that the NWT can now be used in future studies to analyse performance of wave energy converters and optimise device design.
{"title":"Development of a numerical wave tank with reduced discretization error","authors":"K. O. Connell, A. Cashman","doi":"10.1109/ICEEOT.2016.7755252","DOIUrl":"https://doi.org/10.1109/ICEEOT.2016.7755252","url":null,"abstract":"This paper presents the development of a numerical wave tank (NWT) using commercial Computational Fluid Dynamics (CFD) software, ANSYS Fluent 16.0. NWTs are widely used to analyse and optimise the performance of various wave energy converters, such as the Oscillating Water Column (OWC). A numerical modelling set-up is outlined which utilises Fluents Open Channel Wave Boundary Condition (OCWBC) along with a numerical beach scheme to dampen waves at the far field, ensuring no reflection back into the computational domain occurs. Linear waves are input into the NWT and free surface elevation and horizontal and vertical fluid velocities are compared to theory to quantify errors within the model. Variation in discretization error is observed with changing mesh density and a minimum criterion of 20 cells per wave height and 50 cells per wavelength is defined to ensure an acceptable level of model accuracy is achieved at a moderate computational expense. Further refinements show increased reduction in model error in both free surface elevation and velocity components beneath wave's peak, trough and inflection points, as expected. Further analysis focused on ensuring periodic independence was achieved and it was found that a minimum of six wave periods are required before fully developed waves propagate through the domain. The outlined numerical modelling method has quantified discretization error and outlined mesh requirements to reduce the overall error to acceptable levels for linear waves. Accurate free surface elevation and fluid velocity profiles will ensure that the NWT can now be used in future studies to analyse performance of wave energy converters and optimise device design.","PeriodicalId":383674,"journal":{"name":"2016 International Conference on Electrical, Electronics, and Optimization Techniques (ICEEOT)","volume":"43 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-03-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122433978","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2016-03-03DOI: 10.1109/ICEEOT.2016.7755515
Md. Sarwar Kamal, S. Nimmy, Muhammad Iqbal Hossain, N. Dey, A. Ashour, V. Santhi
Exons and Introns are complimentary parts of DNA and RNA. Due to excessive data set in biological science, it is sometimes very expensive and costly to extract meaningful information from such data set. To accelerate efficient and faster exons separation an automated system designed under Neural Skyline Filter(NeuralSF) and Bloom filter. This development allows the comparative analysis on performances among NeuralSF, Bloom Filter and processing without filter. The outcome of the experiments and simulations shows that NeuralSF outperforms other processes in both the cases as number of exons finding and timing. This system may help to reduce the redundant data set from large number of collections. Apart from that it will enable to handle big biological data.
{"title":"ExSep: An exon separation process using Neural Skyline Filter","authors":"Md. Sarwar Kamal, S. Nimmy, Muhammad Iqbal Hossain, N. Dey, A. Ashour, V. Santhi","doi":"10.1109/ICEEOT.2016.7755515","DOIUrl":"https://doi.org/10.1109/ICEEOT.2016.7755515","url":null,"abstract":"Exons and Introns are complimentary parts of DNA and RNA. Due to excessive data set in biological science, it is sometimes very expensive and costly to extract meaningful information from such data set. To accelerate efficient and faster exons separation an automated system designed under Neural Skyline Filter(NeuralSF) and Bloom filter. This development allows the comparative analysis on performances among NeuralSF, Bloom Filter and processing without filter. The outcome of the experiments and simulations shows that NeuralSF outperforms other processes in both the cases as number of exons finding and timing. This system may help to reduce the redundant data set from large number of collections. Apart from that it will enable to handle big biological data.","PeriodicalId":383674,"journal":{"name":"2016 International Conference on Electrical, Electronics, and Optimization Techniques (ICEEOT)","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-03-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116557628","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2016-03-03DOI: 10.1109/ICEEOT.2016.7754958
P. M. Drusya, Dr.Vinodkumar Jacob
Addition is the most frequently used operation in many algorithms and applications. The limited precision in the floating point representation requires rounding and basically makes the FP addition sensitive to the operand order. When adding multiple FP operands using a network of 2-input floating point adders, the error in the final result can be significant. Besides, the use of several two input floating point adders on a circuit may result in long delays that could be avoided with an integrated solution. The fused three-term floating-point adder performs two additions in a single unit to achieve better performance and better accuracy compared to a network of traditional floating-point two-term adders. Floating-point operations require complex processes such as alignment, normalization and rounding, which increases the area, power consumption and latency. In order to further improve the performance of the three-term adder, several optimization techniques are applied including a new exponent compare and significand alignment, dual-reduction, early normalization, three-input leading zero anticipation, compound addition/rounding and pipelining. The proposed design is implemented for single precision. This paper is trying to demonstrate a novel design for fused floating point three term adder.
{"title":"Area efficient fused floating point three term adder","authors":"P. M. Drusya, Dr.Vinodkumar Jacob","doi":"10.1109/ICEEOT.2016.7754958","DOIUrl":"https://doi.org/10.1109/ICEEOT.2016.7754958","url":null,"abstract":"Addition is the most frequently used operation in many algorithms and applications. The limited precision in the floating point representation requires rounding and basically makes the FP addition sensitive to the operand order. When adding multiple FP operands using a network of 2-input floating point adders, the error in the final result can be significant. Besides, the use of several two input floating point adders on a circuit may result in long delays that could be avoided with an integrated solution. The fused three-term floating-point adder performs two additions in a single unit to achieve better performance and better accuracy compared to a network of traditional floating-point two-term adders. Floating-point operations require complex processes such as alignment, normalization and rounding, which increases the area, power consumption and latency. In order to further improve the performance of the three-term adder, several optimization techniques are applied including a new exponent compare and significand alignment, dual-reduction, early normalization, three-input leading zero anticipation, compound addition/rounding and pipelining. The proposed design is implemented for single precision. This paper is trying to demonstrate a novel design for fused floating point three term adder.","PeriodicalId":383674,"journal":{"name":"2016 International Conference on Electrical, Electronics, and Optimization Techniques (ICEEOT)","volume":"22 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-03-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116860760","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2016-03-03DOI: 10.1109/ICEEOT.2016.7755366
Pankaj Kumar, D. Dey, S. Samantaray
Nanofluid is a mixture of a small concentration of nanometer sized solid particle like nanoparticles, nanotubes or nanowires suspended in the liquid and making a colloidal suspension. It is relatively a new field which is less than two decades old. Nanofluid attracts researchers in many ways for their enhanced heat transfer properties. Nanofluid has better heat transfer performance than the base fluid. This paper represents a comprehensive review on the preparation and stability of nanofluid, maintaining stability, evaluating stability etc. and different thermal physical properties like convective heat transfer coefficient for laminar and turbulent region, thermal conductivity, specific heat capacity, viscosity etc. and some transport phenomena like pool boiling heat transfer, flow boiling heat transfer.
{"title":"A recent review on thermo-physical properties of nanofluid","authors":"Pankaj Kumar, D. Dey, S. Samantaray","doi":"10.1109/ICEEOT.2016.7755366","DOIUrl":"https://doi.org/10.1109/ICEEOT.2016.7755366","url":null,"abstract":"Nanofluid is a mixture of a small concentration of nanometer sized solid particle like nanoparticles, nanotubes or nanowires suspended in the liquid and making a colloidal suspension. It is relatively a new field which is less than two decades old. Nanofluid attracts researchers in many ways for their enhanced heat transfer properties. Nanofluid has better heat transfer performance than the base fluid. This paper represents a comprehensive review on the preparation and stability of nanofluid, maintaining stability, evaluating stability etc. and different thermal physical properties like convective heat transfer coefficient for laminar and turbulent region, thermal conductivity, specific heat capacity, viscosity etc. and some transport phenomena like pool boiling heat transfer, flow boiling heat transfer.","PeriodicalId":383674,"journal":{"name":"2016 International Conference on Electrical, Electronics, and Optimization Techniques (ICEEOT)","volume":"60 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-03-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116256829","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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